PTMUX1134PWR

Texas Instruments

5-V, Low-Leakage-Current, 2:1 (SPDT), 3 or 4-Channel Precision Switches

Manufacturer: Texas Instruments

Document: 39 Pages / 769Kb

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ADVANCE□INFORMATION TMUX1134 S1A D1 S1B S2A S2B S3A S3B S4A S4B SEL1 SEL2 SEL3 SEL4 TMUX1133 S1A D1 S1B S2A S2B S3A S3B SEL1 SEL2 SEL3 EN Product Folder Order Now T echnical Documents Tools & Software Support & Community An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. ADVANCE INFORMATION for pre-production products; subject to change without notice. TMUX1133, TMUX1134 SCDS412 –JUNE 2019 TMUX113x5-V,Low-Leakage-Current,2:1(SPDT),3or4-ChannelPrecisionSwitches

1 Features

1• Single supply range: 1.08 V to 5.5 V

Dual supply range: ±2.75 V
Low leakage current: 3 pA
Low charge injection: -1 pC
Low on-resistance: 2 Ω
-40°C to +125°C operating temperature
1.8 V Logic Compatible
Fail-Safe Logic
Rail to Rail Operation
Bidirectional Signal Path
Break-before-make switching
ESD protection HBM: 2000 V

2 Applications

Field transmitters
Programmable logic controllers (PLC)
Factory automation and control
Ultrasound scanners
Patient monitoring & diagnostics
Electrocardiogram (ECG)
Data acquisition systems (DAQ)
ATE test equipment
Battery test equipment
Instrumentation: lab, analytical, portable
Smart meters: Water and Gas
Optical networking
Optical test equipment
Portable POS
Remote radio units
Active antenna system (mMIMIO)

3 Description

The TMUX113x devices are precision complementary metal-oxide semiconductor (CMOS) switches with multiple channels. The TMUX1133 is a 2:1, single- pole double-throw (SPDT), configuration with three independently controlled channels and an EN pin to enable or disable all three switches. The TMUX1134 contains four independently controlled SPDT switches. Wide operating supply of 1.08 V to 5.5 V, or ±2.75 V dual supply, allows for use in a broad array of applications from medical equipment to industrial systems. The device supports bidirectional analog and digital signals on the source (Sx) and drain (Dx) pins ranging from VSS to VDD. For single supply applications VSS can be connected to GND. All logic inputs have 1.8 V logic compatible thresholds, ensuring both TTL and CMOS logic compatibility when operating in the valid supply voltage range. Fail-Safe Logic circuitry allows voltages on the control pins to be applied before the supply pin, protecting the device from potential damage. The TMUX113x devices are part of the precision switches and multiplexers family. These devices have very low on and off leakage currents and low charge injection, allowing them to be used in high precision measurement applications. A low supply current of 8 nA enables use in portable applications. Device Information(1) PART NUMBER PACKAGE BODY SIZE (NOM) TMUX1133 TSSOP (16) (PW) 5.00 mm × 4.40 mm TMUX1134 TSSOP (20) (PW) 6.50 mm × 4.40 mm (1) For all available packages, see the package option addendum at the end of the data sheet. TMUX113x Block Diagrams

13.3 Receiving Notification of Documentation Updates 31

14 Mechanical, Packaging, and Orderable

4 Revision History

NOTE: Page numbers for previous revisions may differ from page numbers in the current version. DATE REVISION NOTES June 2019 * Initial release.

ADVANCE□INFORMATION 1S2B 16 V DD 2S2A 15 D2 3S3B 14 D1 4D3 13 S1B 5S3A 12 S1A 6 11 SEL1 7VSS 10 SEL2 8GND 9 SEL3 Not to scale TMUX1133, TMUX1134 www.ti.com SCDS412 –JUNE 2019 Product Folder Links: TMUX1133 TMUX1134 Submit Documentation FeedbackCopyright © 2019, Texas Instruments Incorporated

5 Device Comparison Table

TMUX1133 2:1 (SPDT), 3-Channel Switch TMUX1134 2:1 (SPDT), 4-Channel Switch

6 Pin Configuration and Functions

TMUX1133: PW Package 16-Pin TSSOP Top View (1) I = input, O = output, I/O = input and output, P = power Pin Functions TMUX1133 PIN TYPE(1) DESCRIPTION NAME NO. S2B 1 I/O Source pin 2B. Can be an input or output. S2A 2 I/O Source pin 2A. Can be an input or output. S3B 3 I/O Source pin 3B. Can be an input or output. D3 4 I/O Drain pin 3. Can be an input or output. S3A 5 I/O Source pin 3A. Can be an input or output. EN 6 I Active low logic enable. When this pin is high, all switches are turned off. When this pin is low, the SELx inputs determine switch connection as shown in Table 1. VSS 7 P Negative power supply. This pin is the most negative power-supply potential. For reliable operation, connect a decoupling capacitor ranging from 0.1 µF to 10 µF between VSS and GND. VSS can be connected to ground for single supply applications. GND 8 P Ground (0 V) reference SEL3 9 I Logic control select pin 3. Controls switch 3 connection as shown in Table 1. SEL2 10 I Logic control select pin 2. Controls switch 2connection as shown in Table 1. SEL1 11 I Logic control select pin 1. Controls switch 1 connection as shown in Table 1. S1A 12 I/O Source pin 1A. Can be an input or output. S1B 13 I/O Source pin 1B. Can be an input or output. D1 14 I/O Drain pin 1. Can be an input or output. D2 15 I/O Drain pin 2. Can be an input or output. VDD 16 P Positive power supply. This pin is the most positive power-supply potential. For reliable operation, connect a decoupling capacitor ranging from 0.1 µF to 10 µF between VDD and GND.

ADVANCE□INFORMATION 1SEL1 20 SEL4 2S1A 19 S4A 3D1 18 D4 4S1B 17 S4B 5VSS 16 V DD 6GND 15 N.C. 7S2B 14 S3B 8D2 13 D3 9S2A 12 S3A 10SEL2 11 SEL3 Not to scale TMUX1133, TMUX1134 SCDS412 –JUNE 2019 www.ti.com Product Folder Links: TMUX1133 TMUX1134 Submit Documentation Feedback Copyright © 2019, Texas Instruments Incorporated TMUX1134: PW Package 20-Pin TSSOP Top View (1) I = input, O = output, I/O = input and output, P = power Pin Functions TMUX1134 PIN TYPE(1) DESCRIPTION NAME NO. SEL1 1 I Logic control select pin 1. Controls switch 1 connection as shown in Table 2. S1A 2 I/O Source pin 1A. Can be an input or output. D1 3 I/O Drain pin 1. Can be an input or output. S1B 4 I/O Source pin 1B. Can be an input or output. VSS 5 P Negative power supply. This pin is the most negative power-supply potential. For reliable operation, connect a decoupling capacitor ranging from 0.1 µF to 10 µF between VSS and GND. VSS can be connected to ground for single supply applications. GND 6 P .Ground (0 V) reference. S2B 7 I/O Source pin 2B. Can be an input or output. D2 8 I/O Drain pin 2. Can be an input or output. S2A 9 I/O Source pin 2A. Can be an input or output. SEL2 10 I Logic control select pin 2. Controls switch 2 connection as shown in Table 2. SEL3 11 I Logic control select pin 3. Controls switch 3 connection as shown in Table 2. S3A 12 I/O Source pin 3A. Can be an input or output. D3 13 I/O Drain pin 3. Can be an input or output. S3B 14 I/O Source pin 3B. Can be an input or output. N.C. 15 Not Connected Not Connected. Can be shorted to GND or left floating. VDD 16 P Positive power supply. This pin is the most positive power-supply potential. For reliable operation, connect a decoupling capacitor ranging from 0.1 µF to 10 µF between VDD and GND. S4B 17 I/O Source pin 4B. Can be an input or output. D4 18 I/O Drain pin 4. Can be an input or output. S4A 19 I/O Source pin 4A. Can be an input or output. SEL4 20 I Logic control select pin 4. Controls switch 4 connection as shown in Table 2.

ADVANCE□INFORMATION TMUX1133, TMUX1134 www.ti.com SCDS412 –JUNE 2019 Product Folder Links: TMUX1133 TMUX1134 Submit Documentation FeedbackCopyright © 2019, Texas Instruments Incorporated (1) Stresses beyond those listed under Absolute Maximum Rating may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Condition. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. (2) The algebraic convention, whereby the most negative value is a minimum and the most positive value is a maximum. (3) All voltages are with respect to ground, unless otherwise specified.

7 Specifications

7.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)(1)(2)(3) MIN MAX UNIT VDD–VSS Supply voltage –0.5 6 V VDD –0.5 6 V VSS –3.0 0.3 V VSEL or VEN Logic control input pin voltage (EN, SELx) –0.5 6 V ISEL or IEN Logic control input pin current (EN, SELx) –30 30 mA VS or VD Source or drain voltage (SxA, SxB, Dx) –0.5 VDD + 0.5 V IS or ID (CONT) Source or drain continuous current (SxA, SxB, Dx) –30 30 mA Tstg Storage temperature –65 150 °C TJ Junction temperature 150 °C (1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. (2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

7.2 ESD Ratings

V(ESD) Electrostatic discharge Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins(1) ±2000 VCharged device model (CDM), per JEDEC specification JESD22-C101 or ANSI/ESDA/JEDEC JS-002, all pins(2) ±750

7.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted) MIN NOM MAX UNIT VDD Positive power supply voltage (single) 1.08 5.5 V VSS Negative power supply voltage (dual) –2.75 0 V VDD - VSS Supply rail voltage difference 1.08 5.5 V VS or VD Signal path input/output voltage (source or drain pin) (SxA, SxB, Dx) VSS VDD V VSEL or VEN Logic control input pin voltage (EN, SELx) 0 5.5 V TA Ambient temperature –40 125 °C (1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report.

7.4 Thermal Information

THERMAL METRIC(1) TMUX1133 TMUX1134 UNITPW (TSSOP) PW (TSSOP)

16 PINS 16 PINS

RθJA Junction-to-ambient thermal resistance 120.6 102.2 °C/W RθJC(top) Junction-to-case (top) thermal resistance 51.0 43.1 °C/W RθJB Junction-to-board thermal resistance 66.8 53.6 °C/W ΨJT Junction-to-top characterization parameter 8.7 6.6 °C/W ΨJB Junction-to-board characterization parameter 66.2 53.1 °C/W RθJC(bot) Junction-to-case (bottom) thermal resistance N/A N/A °C/W

7.5 Electrical Characteristics (VDD = 5 V ±10 %)

at TA = 25°C, VDD = 5 V (unless otherwise noted) PARAMETER TEST CONDITIONS TA MIN TYP MAX UNIT ANALOG SWITCH RON On-resistance VS = 0 V to VDD ISD = 10 mA Refer to On-Resistance 25°C 2 4 Ω –40°C to +85°C 4.5 Ω –40°C to +125°C 4.9 Ω ΔRON On-resistance matching between channels VS = 0 V to VDD ISD = 10 mA Refer to On-Resistance 25°C 0.18 Ω –40°C to +85°C 0.4 Ω –40°C to +125°C 0.5 Ω RON FLAT On-resistance flatness VS = 0 V to VDD ISD = 10 mA Refer to On-Resistance 25°C 0.85 Ω –40°C to +85°C 1.6 Ω –40°C to +125°C 1.6 Ω IS(OFF) Source off leakage current(1) VDD = 5 V Switch Off VD = 4.5 V / 1.5 V VS = 1.5 V / 4.5 V Refer to Off-Leakage Current 25°C –0.08 ±0.005 0.08 nA ID(OFF) Drain off leakage current(1) VDD = 5 V Switch Off VD = 4.5 V / 1.5 V VS = 1.5 V / 4.5 V Refer to Off-Leakage Current –40°C to +85°C –0.35 0.35 nA –40°C to +125°C –2 2 nA ID(ON) IS(ON) Channel on leakage current VDD = 5 V Switch On VD = VS = 4.5 V / 1.5 V Refer to On-Leakage Current –40°C to +85°C –0.35 0.35 nA –40°C to +125°C –2 2 nA LOGIC INPUTS (EN, SELx) VIH Input logic high –40°C to +125°C 1.49 5.5 V VIL Input logic low 0 0.87 V IIH IIL Input leakage current 25°C ±0.005 µA IIH IIL Input leakage current –40°C to +125°C ±0.05 µA CIN Logic input capacitance 25°C 1 pF –40°C to +125°C 2 pF POWER SUPPLY IDD VDD supply current Logic inputs = 0 V or 5.5 V 25°C 0.008 µA –40°C to +125°C 1 µA

ADVANCE□INFORMATION TMUX1133, TMUX1134 www.ti.com SCDS412 –JUNE 2019 Product Folder Links: TMUX1133 TMUX1134 Submit Documentation FeedbackCopyright © 2019, Texas Instruments Incorporated Electrical Characteristics (VDD = 5 V ±10 %) (continued) at TA = 25°C, VDD = 5 V (unless otherwise noted) PARAMETER TEST CONDITIONS TA MIN TYP MAX UNIT DYNAMIC CHARACTERISTICS tTRAN Transition time between channels VS = 3 V RL = 200 Ω, CL = 15 pF Refer to Transition Time 25°C 12 ns –40°C to +85°C 18 ns –40°C to +125°C 19 ns tOPEN (BBM) Break before make time VS = 3 V RL = 200 Ω, CL = 15 pF Refer to Break-Before-Make 25°C 8 ns –40°C to +85°C 1 ns –40°C to +125°C 1 ns tON(EN) Enable turn-on time (TMUX1133 Only) VS = 3 V RL = 200 Ω, CL = 15 pF Refer to tON(EN) and tOFF(EN) 25°C 12 ns –40°C to +85°C 21 ns –40°C to +125°C 22 ns tOFF(EN) Enable turn-off time (TMUX1133 Only) VS = 3 V RL = 200 Ω, CL = 15 pF Refer to tON(EN) and tOFF(EN) 25°C 6 ns –40°C to +85°C 11 ns –40°C to +125°C 12 ns QC Charge Injection VS = 1 V RS = 0 Ω, CL = 1 nF Refer to Charge Injection 25°C –1 pC OISO Off Isolation RL = 50 Ω, CL = 5 pF f = 1 MHz Refer to Off Isolation 25°C –65 dB RL = 50 Ω, CL = 5 pF f = 10 MHz Refer to Off Isolation 25°C –45 dB XTALK Crosstalk RL = 50 Ω, CL = 5 pF f = 1 MHz Refer to Crosstalk 25°C –100 dB RL = 50 Ω, CL = 5 pF f = 10 MHz Refer to Crosstalk 25°C –90 dB BW Bandwidth RL = 50 Ω, CL = 5 pF Refer to Bandwidth 25°C 220 MHz CSOFF Source off capacitance f = 1 MHz 25°C 6 pF CDOFF Drain off capacitance f = 1 MHz 25°C 17 pF CSON CDON On capacitance f = 1 MHz 25°C 20 pF

ADVANCE□INFORMATION TMUX1133, TMUX1134 SCDS412 –JUNE 2019 www.ti.com Product Folder Links: TMUX1133 TMUX1134 Submit Documentation Feedback Copyright © 2019, Texas Instruments Incorporated (1) When VS is 3 V, VD is 1 V or when VS is 1 V, VD is 3 V. 7.6 Electrical Characteristics (VDD = 3.3 V ±10 %) at TA = 25°C, VDD = 3.3 V (unless otherwise noted) PARAMETER TEST CONDITIONS TA MIN TYP MAX UNIT ANALOG SWITCH RON On-resistance VS = 0 V to VDD ISD = 10 mA Refer to On-Resistance 25°C 3.7 8.8 Ω –40°C to +85°C 9.5 Ω –40°C to +125°C 9.8 Ω ΔRON On-resistance matching between channels VS = 0 V to VDD ISD = 10 mA Refer to On-Resistance 25°C 0.13 Ω –40°C to +85°C 0.4 Ω –40°C to +125°C 0.5 Ω RON FLAT On-resistance flatness VS = 0 V to VDD ISD = 10 mA Refer to On-Resistance 25°C 1.9 Ω –40°C to +85°C 2 Ω –40°C to +125°C 2.2 Ω IS(OFF) Source off leakage current(1) VDD = 3.3 V Switch Off VD = 3 V / 1 V VS = 1 V / 3 V Refer to Off-Leakage Current 25°C –0.05 ±0.001 0.05 nA ID(OFF) Drain off leakage current(1) (TMUX1133 Only) VDD = 3.3 V Switch Off VD = 3 V / 1 V VS = 1 V / 3 V Refer to Off-Leakage Current –40°C to +85°C –0.35 0.35 nA –40°C to +125°C –2 2 nA ID(ON) IS(ON) Channel on leakage current VDD = 3.3 V Switch On VD = VS = 3 V / 1 V Refer to On-Leakage Current –40°C to +85°C –0.35 0.35 nA –40°C to +125°C –2 2 nA LOGIC INPUTS (EN, SELx) VIH Input logic high –40°C to +125°C 1.35 5.5 V VIL Input logic low 0 0.8 V IIH IIL Input leakage current 25°C ±0.005 µA IIH IIL Input leakage current –40°C to +125°C ±0.05 µA CIN Logic input capacitance 25°C 1 pF –40°C to +125°C 2 pF POWER SUPPLY IDD VDD supply current Logic inputs = 0 V or 5.5 V 25°C 0.006 µA –40°C to +125°C 1 µA

ADVANCE□INFORMATION TMUX1133, TMUX1134 www.ti.com SCDS412 –JUNE 2019 Product Folder Links: TMUX1133 TMUX1134 Submit Documentation FeedbackCopyright © 2019, Texas Instruments Incorporated Electrical Characteristics (VDD = 3.3 V ±10 %) (continued) at TA = 25°C, VDD = 3.3 V (unless otherwise noted) PARAMETER TEST CONDITIONS TA MIN TYP MAX UNIT DYNAMIC CHARACTERISTICS tTRAN Transition time between channels VS = 2 V RL = 200 Ω, CL = 15 pF Refer to Transition Time 25°C 14 ns –40°C to +85°C 22 ns –40°C to +125°C 22 ns tOPEN (BBM) Break before make time VS = 2 V RL = 200 Ω, CL = 15 pF Refer to Break-Before-Make 25°C 9 ns –40°C to +85°C 1 ns –40°C to +125°C 1 ns tON(EN) Enable turn-on time (TMUX1133 Only) VS = 2 V RL = 200 Ω, CL = 15 pF Refer to tON(EN) and tOFF(EN) 25°C 15 ns –40°C to +85°C 22 ns –40°C to +125°C 23 ns tOFF(EN) Enable turn-off time (TMUX1133 Only) VS = 2 V RL = 200 Ω, CL = 15 pF Refer to tON(EN) and tOFF(EN) 25°C 8 ns –40°C to +85°C 13 ns –40°C to +125°C 14 ns QC Charge Injection VS = 1 V RS = 0 Ω, CL = 1 nF Refer to Charge Injection 25°C –1 pC OISO Off Isolation RL = 50 Ω, CL = 5 pF f = 1 MHz Refer to Off Isolation 25°C –65 dB RL = 50 Ω, CL = 5 pF f = 10 MHz Refer to Off Isolation 25°C –45 dB XTALK Crosstalk RL = 50 Ω, CL = 5 pF f = 1 MHz Refer to Crosstalk 25°C –100 dB RL = 50 Ω, CL = 5 pF f = 10 MHz Refer to Crosstalk 25°C –90 dB BW Bandwidth RL = 50 Ω, CL = 5 pF Refer to Bandwidth 25°C 220 MHz CSOFF Source off capacitance f = 1 MHz 25°C 6 pF CDOFF Drain off capacitance f = 1 MHz 25°C 17 pF CSON CDON On capacitance f = 1 MHz 25°C 20 pF

ADVANCE□INFORMATION TMUX1133, TMUX1134 SCDS412 –JUNE 2019 www.ti.com Product Folder Links: TMUX1133 TMUX1134 Submit Documentation Feedback Copyright © 2019, Texas Instruments Incorporated (1) When VS is positive, VD is negative or when VS is negative, VD is positive. 7.7 Electrical Characteristics (VDD = 2.5 V ±10 %), (VSS = –2.5 V ±10 %) at TA = 25°C, VDD = +2.5 V, VSS = –2.5 V (unless otherwise noted) PARAMETER TEST CONDITIONS TA MIN TYP MAX UNIT ANALOG SWITCH RON On-resistance VS = VSS to VDD ISD = 10 mA Refer to On-Resistance 25°C 2 4 Ω –40°C to +85°C 4.5 Ω –40°C to +125°C 4.9 Ω ΔRON On-resistance matching between channels VS = VSS to VDD ISD = 10 mA Refer to On-Resistance 25°C 0.18 Ω –40°C to +85°C 0.4 Ω –40°C to +125°C 0.5 Ω RON FLAT On-resistance flatness VS = VSS to VDD ISD = 10 mA Refer to On-Resistance 25°C 0.85 Ω –40°C to +85°C 1.6 Ω –40°C to +125°C 1.6 Ω IS(OFF) Source off leakage current(1) VDD = +2.5 V, VSS = –2.5 V Switch Off VD = +2 V / –1 V VS = –1 V / +2 V Refer to Off-Leakage Current 25°C –0.08 ±0.005 0.08 nA ID(OFF) Drain off leakage current(1) VDD = +2.5 V, VSS = –2.5 V Switch Off VD = +2 V / –1 V VS = –1 V / +2 V Refer to Off-Leakage Current –40°C to +85°C –0.35 0.35 nA –40°C to +125°C –2 2 nA ID(ON) IS(ON) Channel on leakage current VDD = +2.5 V, VSS = –2.5 V Switch On VD = VS = +2 V / –1 V Refer to On-Leakage Current –40°C to +85°C –0.35 0.35 nA –40°C to +125°C –2 2 nA LOGIC INPUTS (EN, SELx) VIH Input logic high –40°C to +125°C 1.2 2.75 V VIL Input logic low 0 0.73 V IIH IIL Input leakage current 25°C ±0.005 µA IIH IIL Input leakage current –40°C to +125°C ±0.05 µA CIN Logic input capacitance 25°C 1 pF –40°C to +125°C 2 pF POWER SUPPLY IDD VDD supply current Logic inputs = 0 V or 2.75 V 25°C 0.008 µA –40°C to +125°C 1 µA ISS VSS supply current Logic inputs = 0 V or 2.75 V 25°C 0.008 µA –40°C to +125°C 1 µA

ADVANCE□INFORMATION TMUX1133, TMUX1134 www.ti.com SCDS412 –JUNE 2019 Product Folder Links: TMUX1133 TMUX1134 Submit Documentation FeedbackCopyright © 2019, Texas Instruments Incorporated Electrical Characteristics (VDD = 2.5 V ±10 %), (VSS = –2.5 V ±10 %) (continued) at TA = 25°C, VDD = +2.5 V, VSS = –2.5 V (unless otherwise noted) PARAMETER TEST CONDITIONS TA MIN TYP MAX UNIT DYNAMIC CHARACTERISTICS tTRAN Transition time between channels VS = 1.5 V RL = 200 Ω, CL = 15 pF Refer to Transition Time 25°C 12 ns –40°C to +85°C 18 ns –40°C to +125°C 19 ns tOPEN (BBM) Break before make time VS = 1.5 V RL = 200 Ω, CL = 15 pF Refer to Break-Before-Make 25°C 8 ns –40°C to +85°C 1 ns –40°C to +125°C 1 ns tON(EN) Enable turn-on time (TMUX1133 Only) VS = 1.5 V RL = 200 Ω, CL = 15 pF Refer to tON(EN) and tOFF(EN) 25°C 12 ns –40°C to +85°C 21 ns –40°C to +125°C 22 ns tOFF(EN) Enable turn-off time (TMUX1133 Only) VS = 1.5 V RL = 200 Ω, CL = 15 pF Refer to tON(EN) and tOFF(EN) 25°C 6 ns –40°C to +85°C 14 ns –40°C to +125°C 15 ns QC Charge Injection VS = –1 V RS = 0 Ω, CL = 1 nF Refer to Charge Injection 25°C –1 pC OISO Off Isolation RL = 50 Ω, CL = 5 pF f = 1 MHz Refer to Off Isolation 25°C –65 dB RL = 50 Ω, CL = 5 pF f = 10 MHz Refer to Off Isolation 25°C –45 dB XTALK Crosstalk RL = 50 Ω, CL = 5 pF f = 1 MHz Refer to Crosstalk 25°C –100 dB RL = 50 Ω, CL = 5 pF f = 10 MHz Refer to Crosstalk 25°C –90 dB BW Bandwidth RL = 50 Ω, CL = 5 pF Refer to Bandwidth 25°C 220 MHz CSOFF Source off capacitance f = 1 MHz 25°C 6 pF CDOFF Drain off capacitance f = 1 MHz 25°C 17 pF CSON CDON On capacitance f = 1 MHz 25°C 20 pF

ADVANCE□INFORMATION TMUX1133, TMUX1134 SCDS412 –JUNE 2019 www.ti.com Product Folder Links: TMUX1133 TMUX1134 Submit Documentation Feedback Copyright © 2019, Texas Instruments Incorporated (1) When VS is 1.62 V, VD is 1 V or when VS is 1 V, VD is 1.62 V. 7.8 Electrical Characteristics (VDD = 1.8 V ±10 %) at TA = 25°C, VDD = 1.8 V (unless otherwise noted) PARAMETER TEST CONDITIONS TA MIN TYP MAX UNIT ANALOG SWITCH RON On-resistance VS = 0 V to VDD ISD = 10 mA Refer to On-Resistance 25°C 40 Ω –40°C to +85°C 80 Ω –40°C to +125°C 80 Ω ΔRON On-resistance matching between channels VS = 0 V to VDD ISD = 10 mA Refer to On-Resistance 25°C 0.4 Ω –40°C to +85°C 1.5 Ω –40°C to +125°C 1.5 Ω IS(OFF) Source off leakage current(1) VDD = 1.98 V Switch Off VD = 1.62 V / 1 V VS = 1 V / 1.62 V Refer to Off-Leakage Current 25°C –0.05 ±0.003 0.05 nA ID(OFF) Drain off leakage current(1) VDD = 1.98 V Switch Off VD = 1.62 V / 1 V VS = 1 V / 1.62 V Refer to Off-Leakage Current –40°C to +125°C –2 2 nA ID(ON) IS(ON) Channel on leakage current VDD = 1.98 V Switch On VD = VS = 1.62 V / 1 V Refer to On-Leakage Current –40°C to +125°C –2 2 nA LOGIC INPUTS (EN, SELx) VIH Input logic high –40°C to +125°C 1.07 5.5 V VIL Input logic low 0 0.68 V IIH IIL Input leakage current 25°C ±0.005 µA IIH IIL Input leakage current –40°C to +125°C ±0.05 µA CIN Logic input capacitance 25°C 1 pF –40°C to +125°C 2 pF POWER SUPPLY IDD VDD supply current Logic inputs = 0 V or 5.5 V 25°C 0.001 µA –40°C to +125°C 0.85 µA

ADVANCE□INFORMATION TMUX1133, TMUX1134 www.ti.com SCDS412 –JUNE 2019 Product Folder Links: TMUX1133 TMUX1134 Submit Documentation FeedbackCopyright © 2019, Texas Instruments Incorporated Electrical Characteristics (VDD = 1.8 V ±10 %) (continued) at TA = 25°C, VDD = 1.8 V (unless otherwise noted) PARAMETER TEST CONDITIONS TA MIN TYP MAX UNIT DYNAMIC CHARACTERISTICS tTRAN Transition time between channels VS = 1 V RL = 200 Ω, CL = 15 pF Refer to Transition Time 25°C 28 ns –40°C to +85°C 48 ns –40°C to +125°C 48 ns tOPEN (BBM) Break before make time VS = 1 V RL = 200 Ω, CL = 15 pF Refer to Break-Before-Make 25°C 16 ns –40°C to +85°C 1 ns –40°C to +125°C 1 ns tON(EN) Enable turn-on time (TMUX1133 Only) VS = 1 V RL = 200 Ω, CL = 15 pF Refer to tON(EN) and tOFF(EN) 25°C 28 ns –40°C to +85°C 48 ns –40°C to +125°C 48 ns tOFF(EN) Enable turn-off time (TMUX1133 Only) VS = 1 V RL = 200 Ω, CL = 15 pF Refer to tON(EN) and tOFF(EN) 25°C 16 ns –40°C to +85°C 27 ns –40°C to +125°C 27 ns QC Charge Injection VS = 1 V RS = 0 Ω, CL = 1 nF Refer to Charge Injection 25°C –1 pC OISO Off Isolation RL = 50 Ω, CL = 5 pF f = 1 MHz Refer to Off Isolation 25°C –65 dB RL = 50 Ω, CL = 5 pF f = 10 MHz Refer to Off Isolation 25°C –45 dB XTALK Crosstalk RL = 50 Ω, CL = 5 pF f = 1 MHz Refer to Crosstalk 25°C –100 dB RL = 50 Ω, CL = 5 pF f = 10 MHz Refer to Crosstalk 25°C –90 dB BW Bandwidth RL = 50 Ω, CL = 5 pF Refer to Bandwidth 25°C 220 MHz CSOFF Source off capacitance f = 1 MHz 25°C 6 pF CDOFF Drain off capacitance f = 1 MHz 25°C 17 pF CSON CDON On capacitance f = 1 MHz 25°C 20 pF

ADVANCE□INFORMATION TMUX1133, TMUX1134 SCDS412 –JUNE 2019 www.ti.com Product Folder Links: TMUX1133 TMUX1134 Submit Documentation Feedback Copyright © 2019, Texas Instruments Incorporated (1) When VS is 1 V, VD is 0.8 V or when VS is 0.8 V, VD is 1 V. 7.9 Electrical Characteristics (VDD = 1.2 V ±10 %) PARAMETER TEST CONDITIONS TA MIN TYP MAX UNIT ANALOG SWITCH RON On-resistance VS = 0 V to VDD ISD = 10 mA Refer to On-Resistance 25°C 70 Ω –40°C to +85°C 105 Ω –40°C to +125°C 105 Ω ΔRON On-resistance matching between channels VS = 0 V to VDD ISD = 10 mA Refer to On-Resistance 25°C 0.4 Ω –40°C to +85°C 1.5 Ω –40°C to +125°C 1.5 Ω IS(OFF) Source off leakage current(1) VDD = 1.32 V Switch Off VD = 1 V / 0.8 V VS = 0.8 V / 1 V Refer to Off-Leakage Current 25°C –0.05 ±0.003 0.05 nA ID(OFF) Drain off leakage current(1) VDD = 1.32 V Switch Off VD = 1 V / 0.8 V VS = 0.8 V / 1 V Refer to Off-Leakage Current –40°C to +125°C –2 2 nA ID(ON) IS(ON) Channel on leakage current VDD = 1.32 V Switch On VD = VS = 1 V / 0.8 V Refer to On-Leakage Current –40°C to +125°C –2 2 nA LOGIC INPUTS (EN, SELx) VIH Input logic high –40°C to +125°C 0.96 5.5 V VIL Input logic low 0 0.36 V IIH IIL Input leakage current 25°C ±0.005 µA IIH IIL Input leakage current –40°C to +125°C ±0.05 µA CIN Logic input capacitance 25°C 1 pF –40°C to +125°C 2 pF POWER SUPPLY IDD VDD supply current Logic inputs = 0 V or 5.5 V 25°C 0.001 µA –40°C to +125°C 0.7 µA

ADVANCE□INFORMATION TMUX1133, TMUX1134 www.ti.com SCDS412 –JUNE 2019 Product Folder Links: TMUX1133 TMUX1134 Submit Documentation FeedbackCopyright © 2019, Texas Instruments Incorporated Electrical Characteristics (VDD = 1.2 V ±10 %) (continued) PARAMETER TEST CONDITIONS TA MIN TYP MAX UNIT DYNAMIC CHARACTERISTICS tTRAN Transition time between channels VS = 1 V RL = 200 Ω, CL = 15 pF Refer to Transition Time 25°C 55 ns –40°C to +85°C 190 ns –40°C to +125°C 190 ns tOPEN (BBM) Break before make time VS = 1 V RL = 200 Ω, CL = 15 pF Refer to Break-Before-Make 25°C 28 ns –40°C to +85°C 1 ns –40°C to +125°C 1 ns tON(EN) Enable turn-on time (TMUX1133 Only) VS = 1 V RL = 200 Ω, CL = 15 pF Refer to tON(EN) and tOFF(EN) 25°C 60 ns –40°C to +85°C 190 ns –40°C to +125°C 190 ns tOFF(EN) Enable turn-off time (TMUX1133 Only) VS = 1 V RL = 200 Ω, CL = 15 pF Refer to tON(EN) and tOFF(EN) 25°C 45 ns –40°C to +85°C 150 ns –40°C to +125°C 150 ns QC Charge Injection VS = 1 V RS = 0 Ω, CL = 1 nF Refer to Charge Injection 25°C –1 pC OISO Off Isolation RL = 50 Ω, CL = 5 pF f = 1 MHz Refer to Off Isolation 25°C –65 dB RL = 50 Ω, CL = 5 pF f = 10 MHz Refer to Off Isolation 25°C –45 dB XTALK Crosstalk RL = 50 Ω, CL = 5 pF f = 1 MHz Refer to Crosstalk 25°C –100 dB RL = 50 Ω, CL = 5 pF f = 10 MHz Refer to Crosstalk 25°C –90 dB BW Bandwidth RL = 50 Ω, CL = 5 pF Refer to Bandwidth 25°C 220 MHz CSOFF Source off capacitance f = 1 MHz 25°C 6 pF CDOFF Drain off capacitance f = 1 MHz 25°C 17 pF CSON CDON On capacitance f = 1 MHz 25°C 20 pF

7.10 Typical Characteristics

Figure 1. On-Resistance vs Source or Drain Voltage Figure 2. On-Resistance vs Temperature Figure 3. On-Resistance vs Temperature Figure 4. On-Resistance vs Temperature Figure 5. On-Resistance vs Source or Drain Voltage Figure 6. On-Leakage vs Source or Drain Voltage

8 Parameter Measurement Information

8.1 On-Resistance

The on-resistance of a device is the ohmic resistance between the source (Sx) and drain (Dx) pins of the device. The on-resistance varies with input voltage and supply voltage. The symbol RON is used to denote on-resistance. Figure 16. On-Resistance Measurement Setup

8.2 Off-Leakage Current

Source off-leakage current
Drain off-leakage current

off. This current is denoted by the symbol IS(OFF). Drain leakage current is defined as the leakage current flowing into or out of the drain pin when the switch is off. This current is denoted by the symbol ID(OFF). The setup used to measure both off-leakage currents is shown in Figure 17. Figure 17. Off-Leakage Measurement Setup

8.3 On-Leakage Current

is on. This current is denoted by the symbol IS(ON). on. This current is denoted by the symbol ID(ON). measuring the on-leakage current, denoted by IS(ON) or ID(ON). Figure 18. On-Leakage Measurement Setup

8.4 Transition Time

capacitance. Figure 19 shows the setup used to measure transition time, denoted by the symbol tTRANSITION. Figure 19. Transition-Time Measurement Setup

8.5 Break-Before-Make

the setup used to measure break-before-make delay, denoted by the symbol tOPEN(BBM). Figure 20. Break-Before-Make Delay Measurement Setup shows the setup used to measure turn-on time, denoted by the symbol tON(EN). shows the setup used to measure turn-off time, denoted by the symbol tOFF(EN). Figure 21. Turn-On and Turn-Off Time Measurement Setup

8.7 Charge Injection

transistors results in a charge injected into the drain or source during the falling or rising edge of the gate signal. by the symbol QC. Figure 22 shows the setup used to measure charge injection from source (Sx) to drain (D). Figure 22. Charge-Injection Measurement Setup

8.8 Off Isolation

Figure 23. Off Isolation Measurement Setup

8.9 Crosstalk

Figure 24. Crosstalk Measurement Setup

8.10 Bandwidth

shows the setup used to measure bandwidth. Figure 25. Bandwidth Measurement Setup

9 Detailed Description

9.1 Functional Block Diagram

independently controlled SPDT switches. Figure 26. TMUX1133 Functional Block Diagram

9.2 Feature Description

9.2.1 Bidirectional Operation

The TMUX113x devices conduct equally well from source (Sx) to drain (Dx) or from drain (Dx) to source (Sx). Each channel has very similar characteristics in both directions and supports both analog and digital signals.

9.2.2 Rail to Rail Operation

VSS can be connected to GND.

9.2.4 Fail-Safe Logic

Safe Logic feature allows the select pins of the TMUX113x devices to be ramped to 5.5 V while VDD = 0 V. pins to interface with a logic level of another device up to 5.5 V.

9.2.5 Ultra-low Leakage Current

the TMUX113x devices versus input voltage. Figure 27. Leakage Current vs Input Voltage

9.2.6 Ultra-low Charge Injection

charge injection to -1 pC at VS = 1 V as shown in Figure 29. Figure 28. Transmission Gate Topology Figure 29. Charge Injection vs Source Voltage

9.3 Device Functional Modes

source pin is selected the switch conducts to drain. The logic control pins can be as high as 5.5 V. the drain pin for each channel.

9.4 Truth Tables

Table 1 and Table 2 show the truth tables for the TMUX1133 and TMUX1134 respectively. Table 1. TMUX1133 Truth table(1)

0 X 0 X S2A to D2

0 X 1 X S2B to D2

0 X X 0 S3A to D3

0 X X 1 S3B to D3

1 X X X Hi-Z (OFF)

Table 2. TMUX1134 Truth table(1)

0 X X X S1B to D1

1 X X X S1A to D1

0 V-5 V

validate and test their design implementation to confirm system functionality.

10.1 Application Information

and multiplexers for low-voltage applications.

10.2 Typical Application

4-channel SPDT switch in order to optimize the tradeoffs of system flexibility and board space. Figure 30. Multi-channel 2:1, Switching Applications

10.3 Design Requirements

For this design example, use the parameters listed in Table 3. Table 3. Design Parameters

10.4 Detailed Design Procedure

range can be 0 V to 5 V, and the max continuous current can be 30 mA. multi-channel 2:1 switch because it allows additional flexibility in the design.

Switching between an analog signal path and a calibration path in order to ensure the system is calibrated

across the life of a product or after installation.

Configuring a single channel to accept either a voltage or current input through software - allowing for system

flexibility across applications where the end users input signals may differ.

Allowing a single channel to be configured as either an analog input or analog output. Providing additional

leakage current of the TMUX113x devices.

10.5 Application Curve

Figure 31. On-Leakage vs Source or Drain Voltage

11 Power Supply Recommendations

can cause permanent damage to the devices. equivalent series resistance (ESR) and inductance (ESL) characteristics for power-supply decoupling purposes. the overall inductance and is beneficial for connections to ground planes.

12 Layout

12.1 Layout Guidelines

12.1.1 Layout Information

maintains constant trace width and minimizes reflections. Figure 32. Trace Example hole pins are not recommended at high frequencies. Figure 33 and Figure 34 illustrate examples of a PCB layout with the TMUX1133 and TMUX1134 respectively.

Decouple the VDD and VSS pins with a 0.1-µF capacitor, placed as close to the pin as possible. Make sure that the capacitor voltage rating is sufficient for the supply voltage.
Keep the input lines as short as possible.
Use a solid ground plane to help reduce electromagnetic interference (EMI) noise pickup.
Do not run sensitive analog traces in parallel with digital traces. Avoid crossing digital and analog traces if possible, and only make perpendicular crossings when necessary.

12.2 Layout Example

Figure 33 shows an example board layout for the TMUX1133. Figure 33. TMUX1133 Layout Example Figure 34 shows an example board layout for the TMUX1134. Figure 34. TMUX1134 Layout Example

13 Device and Documentation Support

13.1 Documentation Support

13.1.1 Related Documentation

Texas Instruments, Ultrasonic Gas Meter Front-End With MSP430™ Reference Design. Texas Instruments, True Differential, 4 x 2 MUX, Analog Front End, Simultaneous-Sampling ADC Circuit. Texas Instruments, Improve Stability Issues with Low CON Multiplexers. Texas Instruments, Simplifying Design with 1.8 V logic Muxes and Switches. Texas Instruments, Eliminate Power Sequencing with Powered-off Protection Signal Switches. Texas Instruments, System-Level Protection for High-Voltage Analog Multiplexers. Texas Instruments, QFN/SON PCB Attachment. Texas Instruments, Quad Flatpack No-Lead Logic Packages.

13.2 Related Links

resources, tools and software, and quick access to order now. Table 4. Related Links

13.3 Receiving Notification of Documentation Updates

changed. For change details, review the revision history included in any revised document.

13.4 Community Resources

solve problems with fellow engineers. contact information for technical support.

13.5 Trademarks

E2E is a trademark of Texas Instruments.

13.6 Electrostatic Discharge Caution

appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.

13.7 Glossary

SLYZ022 — TI Glossary. This glossary lists and explains terms, acronyms, and definitions.

14 Mechanical, Packaging, and Orderable Information

The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation.

www.ti.com 4-Jul-2019 Addendum-Page 1 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead/Ball Finish (6) MSL Peak Temp (3) Op Temp (°C) Device Marking (4/5) Samples PTMUX1133PWR ACTIVE TSSOP PW 16 2000 TBD Call TI Call TI -40 to 125 PTMUX1134PWR ACTIVE TSSOP PW 20 2000 TBD Call TI Call TI -40 to 125 TMUX1133PWR PREVIEW TSSOP PW 16 2000 TBD Call TI Call TI -40 to 125 TMUX1134PWR PREVIEW TSSOP PW 20 2000 TBD Call TI Call TI -40 to 125 (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.

www.ti.com 4-Jul-2019 Addendum-Page 2 In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

www.ti.com PACKAGE OUTLINE C 14X 0.65 4.55 16X 0.30 0.19 TYP6.6 6.2

1.2 MAX

0.15 0.05 0.25 GAGE PLANE -80 B NOTE 4 4.5 4.3 A NOTE 3 5.1 4.9 0.75 0.50 (0.15) TYP TSSOP - 1.2 mm max heightPW0016A SMALL OUTLINE PACKAGE 4220204/A 02/2017

0.1 C A B

0.1 C NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed 0.15 mm per side. 4. This dimension does not include interlead flash. Interlead flash shall not exceed 0.25 mm per side. 5. Reference JEDEC registration MO-153. SEATING PLANE A 20 DETAIL A TYPICAL SCALE 2.500

www.ti.com EXAMPLE BOARD LAYOUT

0.05 MAX

0.05 MIN

16X (1.5) 16X (0.45) 14X (0.65) (5.8) (R0.05) TYP TSSOP - 1.2 mm max heightPW0016A SMALL OUTLINE PACKAGE 4220204/A 02/2017 NOTES: (continued) 6. Publication IPC-7351 may have alternate designs. 7. Solder mask tolerances between and around signal pads can vary based on board fabrication site. LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE: 10X SYMM SYMM 8 9 15.000 METALSOLDER MASK OPENING METAL UNDER SOLDER MASK SOLDER MASK OPENING EXPOSED METALEXPOSED METAL SOLDER MASK DETAILS NON-SOLDER MASK DEFINED (PREFERRED) SOLDER MASK DEFINED

www.ti.com EXAMPLE STENCIL DESIGN 16X (1.5) 16X (0.45) 14X (0.65) (5.8) (R0.05) TYP TSSOP - 1.2 mm max heightPW0016A SMALL OUTLINE PACKAGE 4220204/A 02/2017 NOTES: (continued) 8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 9. Board assembly site may have different recommendations for stencil design. SOLDER PASTE EXAMPLE BASED ON 0.125 mm THICK STENCIL SCALE: 10X SYMM SYMM 8 9

IMPORTANT NOTICE AND DISCLAIMER TI PROVIDES TECHNICAL AND RELIABILITY DATA (INCLUDING DATASHEETS), DESIGN RESOURCES (INCLUDING REFERENCE DESIGNS), APPLICATION OR OTHER DESIGN ADVICE, WEB TOOLS, SAFETY INFORMATION, AND OTHER RESOURCES “AS IS” AND WITH ALL FAULTS, AND DISCLAIMS ALL WARRANTIES, EXPRESS AND IMPLIED, INCLUDING WITHOUT LIMITATION ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT OF THIRD PARTY INTELLECTUAL PROPERTY RIGHTS. These resources are intended for skilled developers designing with TI products. You are solely responsible for (1) selecting the appropriate TI products for your application, (2) designing, validating and testing your application, and (3) ensuring your application meets applicable standards, and any other safety, security, or other requirements. These resources are subject to change without notice. TI grants you permission to use these resources only for development of an application that uses the TI products described in the resource. Other reproduction and display of these resources is prohibited. No license is granted to any other TI intellectual property right or to any third party intellectual property right. TI disclaims responsibility for, and you will fully indemnify TI and its representatives against, any claims, damages, costs, losses, and liabilities arising out of your use of these resources. TI’s products are provided subject to TI’s Terms of Sale (www.ti.com/legal/termsofsale.html) or other applicable terms available either on ti.com or provided in conjunction with such TI products. TI’s provision of these resources does not expand or otherwise alter TI’s applicable warranties or warranty disclaimers for TI products. Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265 Copyright © 2019, Texas Instruments Incorporated

Product Information

PTMUX1134PWR specifications and overview.

Summary

5-V, Low-Leakage-Current, 2:1 (SPDT), 3 or 4-Channel Precision Switches

Description

5-V, Low-Leakage-Current, 2:1 (SPDT), 3 or 4-Channel Precision Switches

Source title PTMUX1134PWR Datasheet(PDF) - Texas Instruments

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