Interface

PTMP1075DGKT

Texas Instruments

Temperature Sensor With I2C and SMBus Interface in Industry Standard LM75 Form Factor and Pinout

Manufacturer: Texas Instruments

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ADVANCE□INFORMATION Diode Senso r ΔΣ ADC OSC Control Logic Serial Interface Config. and T e mp. Reg ister T emperature ALERT SDA 1 5GND SCL 2 7 A0 T emp. Product Folder Order Now T echnical Documents Tools & Software Support & Community An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. ADVANCE INFORMATION for pre-production products; subject to change without notice. TMP1075 SBOS854 –MARCH 2018 TMP1075TemperatureSensorWithI2CandSMBusInterfaceinIndustryStandardLM75 FormFactorandPinout

1 Features

1• Digital Output: SMBus™ , I2C

Compatible to I3C Mixed Fast Mode
Supports up to 32 Device Addresses
Alert Pin Function
Resolution: 12 Bits
Accuracy: – ±2°C (Maximum) from −25°C to +85°C – ±3°C (Maximum) from −55°C to +125°C
Operating Low Quiescent Current: 10-μA (typical)
Shutdown Low Quiescent Current: 0.3-μA (typical)
Wide Supply Range: 1.7 V to 3.6 V
Small 8-Pin Package: VSSOP, SOIC and DFN

2 Applications

Power-Supply Temperature Monitoring
Computer Peripheral Thermal Protection
Notebook Computers
Cell Phones
Battery Management
Office Machines
Thermostat Controls
Environmental Monitoring and HVAC
Electro Mechanical Device Temperature

3 Description

The TMP1075 is a lower power, higher accuracy replacement to the industry standard LM75 and TMP75 digital temperature sensors. Available in SOIC-8 and SOP-8 packages, the TMP1075 offers pin to pin and software compatibility to quickly upgrade any existing xx75 design. New with the TMP1075 is an optional 2x2mm DFN package reducing the PCB footprint by 79% compared to an SOIC package. The TMP1075 provides a 25% improvement in accuracy over standard xx75 temperature sensors and offers an on-chip 12-bit analog-to digital converter (ADC) providing a temperature resolution of 0.0625°C. Compatible with SMBus, two-wire, and I2C interfaces, the TMP1075 supports up to 32 devices address and provides SMBus Alert. The TMP1075 devices are ideal for temperature measurement in a variety of communication, computer, consumer, environmental, industrial, and instrumentation applications. The TMP1075 devices are specified for operation over a temperature range of −55°C to +125°C. The TMP1075 units are 100% tested on a production setup that is NIST traceable and verified with equipment that is calibrated to ISO/IEC 17025 accredited standards. Device Information(1) PART NUMBER PACKAGE BODY SIZE (NOM) TMP1075 SOIC (8) 4.90 mm × 3.91 mm VSSOP (8) 3.00 mm × 3.00 mm DFN (8) 2.00 mm × 2.00 mm (1) For all available packages, see the orderable addendum at the end of the data sheet. TMP1075 Internal Block Diagram

11.1 Receiving Notification of Documentation Updates 23

12 Mechanical, Packaging, and Orderable

4 Revision History

NOTE: Page numbers for previous revisions may differ from page numbers in the current version. DATE REVISION NOTES March 2018 * Initial release.

5 Pin Configuration and Functions

NOTE: Pin 1 is determined by orienting the package marking as indicated in the diagram. Pin Functions PIN I/O DESCRIPTION NO. NAME 1 SDA I/O Serial data. Open-drain output; requires a pullup resistor. 2 SCL I Serial clock. 3 ALERT O Overtemperature alert. Open-drain output; requires a pullup resistor.

4 GND — Ground

5 A2 I Address select A2: Connect to GND or V+

6 A1 I Address select A1: Connect to GND, V+, SDA or SCL

7 A0 I Address select A0: Connect to GND, V+, SDA or SCL

8 V+ I Supply voltage, 1.7 V to 5.5 V

ADVANCE□INFORMATION TMP1075 SBOS854 –MARCH 2018 www.ti.com Product Folder Links: TMP1075 Submit Documentation Feedback Copyright © 2018, Texas Instruments Incorporated (1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

6 Specifications

6.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)(1) MIN MAX UNIT Power supply, V+ 6 V Input voltage –0.5 6 V Input voltage –0.5 (V+) + 0.5 V Input current 10 mA Operating temperature –55 150 °C Junction temperature, TJ 150 °C Storage temperature, Tstg –60 130 °C (1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. (2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

6.2 ESD Ratings

V(ESD) Electrostatic discharge Human body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) 2K V Charged device model (CDM), per JEDEC specification JESD22-C101(2) TBD

6.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted) MIN NOM MAX UNIT Supply voltage 1.7 5.5 V Operating free-air temperature, TA –55 150 °C (1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report.

6.4 Thermal Information

THERMAL METRIC(1) TMP1075 UNITDGK (SOIC), D (VSSOP)

8 PINS

RθJA Junction-to-ambient thermal resistance 202.5 °C/W RθJC(top) Junction-to-case (top) thermal resistance 82 °C/W RθJB Junction-to-board thermal resistance 124.4 °C/W ψJT Junction-to-top characterization parameter 17.9 °C/W ψJB Junction-to-board characterization parameter 122.6 °C/W RθJC(bot) Junction-to-case (bottom) thermal resistance TBD °C/W Thermal Mass TBD TBD

6.5 Electrical Characteristics

at TA = −55°C to +125°C and V+ = 1.7 V to 3.6 V (unless noted); typical specification are at TA = 25°C and V+=3.3 V PARAMETER TEST CONDITIONS MIN TYP MAX UNIT TEMPERATURE INPUT Range –55 125 °C Accuracy (temperature error) Accuracy (temperature error) vs supply PSRR 0 ±0.02 °C/V Resolution 1 LSB (12 bit) 0.0625 °C DIGITAL INPUT/OUTPUT Input capacitance 5 pF VIH High-level input logic 0.7(V+) V VIL Low-level input logic -0.3 0.3(V+) V IIN Leakage input current -0.1 0.1 µA Input voltage hysteresis SCL and SDA pins 600 mV VOL Low-level output logic IOL = -3 mA, SDA and ALERT pins 0 0.15 0.4 V ADC Conversion time 12 bits one-shot mode 4.5 5 5.75 ms Conversion Rate CR1 = 0, CR0 = 0 (default) 27.5 ms CR1 = 0, CR0 = 1 55 CR1 = 1, CR0 = 0 110 CR1 = 1, CR0 = 1 220 Sampling Period Precision -10 5 10 % Timeout time 20 25 35 ms POWER SUPPLY Operating range 1.7 3.3 3.6 V IQ Quiescent current CR1 = 0, CR0 = 0 (default) 10 16 µA CR1 = 0, CR0 = 1 5.5 µACR1 = 1, CR0 = 0 4 CR1 = 1, CR0 = 1 2.7 During active conversion ,serial bus inactive 52 98 µA ISD Shutdown current Serial bus active, SCL frequency = 400 kHz 13 µA Serial bus inactive 0.37 1.5 µA POR, Power-on reset threshold Rising 1.22 V Falling 1.1 Reset time 0.3 ms

6.6 Timing Requirements

see the Timing Diagrams and Two-Wire Timing Diagrams sections for additional information FAST MODE HIGH-SPEED MODE UNIT MIN MAX MIN MAX f(SCL) SCL operating frequency V+ 0.001 0.4 0.001 2.38 MHz t(BUF) Bus-free time between STOP and START conditions See the Timing Diagrams section 1300 160 ns t(HDSTA) Hold time after repeated START condition. After this period, the first clock is generated. 600 160 ns t(SUSTA) Repeated START condition setup time 600 160 ns t(SUSTO) STOP condition setup time 600 160 ns t(HDDAT) Data hold time 4 900 4 120 ns t(SUDAT) Data setup time 100 10 ns t(LOW) SCL clock low period V+, see the Timing Diagrams section 1300 280 ns t(HIGH) SCL clock high period See the Timing Diagrams section 600 60 ns tFD Data fall time See the Timing Diagrams section 300 150 ns tRC Clock rise time See the Two-Wire Timing Diagrams section 300 40 nsSCLK ≤ 100 kHz, see the Timing Diagrams section 1000 tFC Clock fall time See the Two-Wire Timing Diagrams section 300 40 ns

6.7 Switching Characteristics

over operating free-air temperature range (unless otherwise noted) MIN TYP MAX UNIT tLPF Spike filter for I3C compatibility SCL= 12.5 MHz 50 ns

ADVANCE□INFORMATION Diode Senso r ΔΣ ADC OSC Control Logic Serial Interface Config. and T e mp. Reg ister T emperature ALERT SDA 1 5GND SCL 2 7 A0 T emp. TMP1075 www.ti.com SBOS854 –MARCH 2018 Product Folder Links: TMP1075 Submit Documentation FeedbackCopyright © 2018, Texas Instruments Incorporated

7 Detailed Description

7.1 Overview

The TMP1075 device are digital temperature sensors that are optimal for thermal management and thermal protection applications. The TMP1075 is a two-wire, SMBus, and I2C interface-compatible. The devices are specified over a temperature range of −40°C to +125°C. The Functional Block Diagram section shows an internal block diagram of TMP1075 device. The temperature sensor in the TMP1075 is the device itself. Thermal paths run through the package leads as well as the plastic package. The package leads provide the primary thermal path because of the lower thermal resistance of the metal.

7.2 Functional Block Diagram

7.3 Feature Description

7.3.1 Digital Temperature Output

are used to indicate temperature with all remaining bits equal to zero. Data format for temperature is listed in . Temperature register reads 0°C until the first conversion is complete. Table 1. Temperature Data Format

7.3.2 Serial Interface

The TMP1075 operate only as slave devices on the SMBus, two-wire, and I2C interface-compatible bus. integrated spike suppression filters and Schmitt triggers to minimize the effects of input spikes and bus noise. The TMP1075 support the transmission protocol for fast (up to 400 kHz) and high-speed (up to 2 MHz) modes. All data bytes are transmitted MSB first.

7.3.2.1 Bus Overview

generates the START and STOP conditions. responds to the master by generating an Acknowledge and pulling SDA low.

7.3.2.2 Serial Bus Address

To communicate with the TMP1075, the master must first address slave devices through a slave address byte.

The TMP1075 features three address pins to allow up to 32 devices to be addressed on a single bus interface. sampled on every bus communication and must be set prior to any activity on the interface. Table 2. Address Pins and Slave Addresses for the TMP1075

0 SDA SDA A0

0 SDA SCL A2

0 SCL SDA A4

0 SCL SCL A6

1 SDA SDA A8

1 SDA SCL AA

1 SCL SDA AC

1 SCL SCL AE

0 SDA 0 B0

0 SDA 1 B2

0 SCL 0 B4

0 SCL 1 B6

1 SDA 0 B8

1 SDA 1 BA

1 SCL 0 BC

1 SCL 1 BE

7.3.2.3 Writing and Reading to the TMP1075

the R/W bit low. Every write operation to the TMP1075 requires a value for the Pointer register (see Figure 2). generate a START condition and send the slave address byte with the R/W bit high to initiate the read command. the value is changed by the next write operation.

ADVANCE□INFORMATION TMP1075 SBOS854 –MARCH 2018 www.ti.com Product Folder Links: TMP1075 Submit Documentation Feedback Copyright © 2018, Texas Instruments Incorporated Register bytes are sent MSB first, followed by the LSB.

7.3.2.4 Slave Mode Operations

The TMP1075 can operate as a slave receiver or slave transmitter.

7.3.2.4.1 Slave Receiver Mode

The first byte transmitted by the master is the slave address, with the R/W bit low. The TMP1075 then acknowledges reception of a valid address. The next byte transmitted by the master is the Pointer register. The TMP1075 then acknowledges reception of the Pointer register byte. The next byte or bytes are written to the register addressed by the Pointer register. The TMP1075 acknowledge reception of each data byte. The master can terminate data transfer by generating a START or STOP condition.

7.3.2.4.2 Slave Transmitter Mode

The first byte is transmitted by the master and is the slave address, with the R/W bit high. The slave acknowledges reception of a valid slave address. The next byte is transmitted by the slave and is the most significant byte of the register indicated by the Pointer register. The master acknowledges reception of the data byte. The next byte transmitted by the slave is the least significant byte. The master acknowledges reception of the data byte. The master can terminate data transfer by generating a Not-Acknowledge on reception of any data byte, or generating a START or STOP condition.

7.3.2.5 SMBus Alert Function

The TMP1075 support the SMBus Alert function. When the TMP1075 is operating in interrupt mode (TM = 1), the ALERT pin of the TMP1075 can be connected as an SMBus Alert signal. When a master senses that an ALERT condition is present on the ALERT line, the master sends an SMBus Alert command (00011001) on the bus. If the ALERT pin of the TMP1075 is active, the devices acknowledge the SMBus Alert command and respond by returning its slave address on the SDA line. The eighth bit (LSB) of the slave address byte indicates if the temperature exceeding THIGH or falling below TLOW caused the ALERT condition. This bit is high if the temperature is greater than or equal to THIGH. This bit is low if the temperature is less than TLOW. See Figure 5 for details of this sequence. If multiple devices on the bus respond to the SMBus Alert command, arbitration during the slave address portion of the SMBus Alert command determine which device clears its ALERT status. If theTMP1075 wins the arbitration, its ALERT pin becomes inactive at the completion of the SMBus Alert command. If the TMP1075 loses the arbitration, its ALERT pin remains active.

7.3.2.6 General Call

The TMP1075 respond to a two-wire general call address (0000000) if the eighth bit is 0. The device acknowledges the general call address and responds to commands in the second byte. If the second byte is 00000100, the TMP1075 latch the status of their address pins, but do not reset. If the second byte is 00000110, the TMP1075 latch the status of their address pins and reset their internal registers to their power-up values.

7.3.2.7 High-Speed Mode

In order for the two-wire bus to operate at frequencies above 400 kHz, the master device must issue an Hs-mode master code (00001XXX) as the first byte after a START condition to switch the bus to high-speed operation. The TMP1075 devices do not acknowledge this byte, but do switch their input filters on SDA and SCL and their output filters on SDA to operate in Hs-mode, allowing transfers at up to 2 MHz. After the Hs-mode master code is issued, the master transmits a two-wire slave address to initiate a data transfer operation. The bus continues to operate in Hs-mode until a STOP condition occurs on the bus. Upon receiving the STOP condition, the TMP1075 switch the input and output filter back to fast-mode operation.

7.3.2.8 Time-Out Function

The TMP1075 resets the serial interface if either SCL or SDA is held low for 25 ms (typical) between a START and STOP condition. The TMP1075 releases the bus if it is pulled low and waits for a START condition. To avoid activating the time-out function, a communication speed of at least 1 kHz must be maintained for the SCL operating frequency.

7.3.3 Timing Diagrams

defined in the Timing Requirements. Bus Idle: Both SDA and SCL lines remain high. START condition. Each data transfer is initiated with a START condition. STOP condition. Each data transfer is terminated with a repeated START or STOP condition. is determined by the master device. The receiver acknowledges the transfer of data. Not-Acknowledge on the last byte that is transmitted by the slave.

7.3.4 Two-Wire Timing Diagrams

Figure 1. Two-Wire Timing Diagram Figure 2. Two-Wire Timing Diagram for the TMP1075 Write Word Format

NOTE: Address pins A0, A1, A2 = 0. Figure 5. Timing Diagram for SMBus ALERT

7.4 Device Functional Modes

7.4.1 Shutdown Mode (SD)

The shutdown mode of the TMP1075 devices lets the user save maximum power by shutting down all device circuitry other than the serial interface, which reduces current consumption to typically less than 0.1 μA. Shutdown mode is enabled when the SD bit is 1; the device shuts down when the current conversion is completed. When SD is equal to 0, the device maintains a continuous conversion state.

7.4.2 One-Shot (OS)

The TMP1075 feature a one-shot temperature measurement mode. When the device is in shutdown mode, writing 1 to the OS bit starts a single temperature conversion. The device returns to the shutdown state at the completion of the single conversion. This feature is useful to reduce power consumption in the TMP1075 when continuous temperature monitoring is not required. When the configuration register is read, the OS always reads zero.

7.4.3 Thermostat Mode (TM)

The thermostat mode bit of the TMP1075 indicates to the device whether to operate in comparator mode (TM = 0) or interrupt mode (TM = 1). For more information on comparator and interrupt modes, see the High and Low Limit Registers section.

7.4.4 Comparator Mode (TM = 0)

In comparator mode (TM = 0), the ALERT pin is activated when the temperature equals or exceeds the value in the T(HIGH) register and remains active until the temperature falls below the value in the T(LOW)register. For more information on the comparator mode, see the High and Low Limit Registers section.

7.4.5 Interrupt Mode (TM = 1)

In interrupt mode (TM = 1), the ALERT pin is activated when the temperature exceeds T(HIGH) or goes below T(LOW) registers. The ALERT pin is cleared when the host controller reads the temperature register. For more information on the interrupt mode, see the High and Low Limit Registers section.

7.5 Programming

Table 3. TMP1075 Normal Operation Register Map

7.5.1 Pointer Register

pointer address of the registers available in the TMP1075. Power-up reset value of P1/P0 is 00. Figure 6. Internal Register Structure of the TMP1075

7.5.1.1 Pointer Register Byte (pointer = N/A) [reset = 00h]

Table 4. Pointer Register Byte

7.5.1.2 Pointer Addresses of the TMP1075

Table 5. Pointer Addresses of the TMP1075

7.5.2 Temperature Register

first conversion is complete.

7.5.2.1 Error Status (ERR) – Read Only

This bit indicates that an error condition has occurred during the conversion and the result is invalid. Table 6. Temperature Register (0x00) [default reset = 0000h]

7.5.3 Configuration Register

reset value of the Configuration register are all bits equal to 0. Table 7. Configuration Register Format (0x01) [default reset = 00FFh]

7.5.3.1 Shutdown Mode (SD)

circuitry other than the serial interface, which reduces current consumption to typically less than 0.1 μA. conversion. Any write to the Configuration register aborts the current conversion.

7.5.3.2 Thermostat Mode (TM)

7.5.3.3 Polarity (POL)

the state of the ALERT pin is inverted. The operation of the ALERT pin in various modes is illustrated in Figure 7. Figure 7. Output Transfer Function Diagrams

7.5.3.4 Fault Queue (F1/F0)

TLOW register format and byte order, see the High and Low Limit Registers section. Table 8. Fault Settings of the TMP1075

7.5.3.5 Conversion Rate (CR)

The CR bits control the rate of conversion. Table 9 identifies the sampling period. Table 9. Sampling Period of the TMP1075

7.5.3.6 One-Shot (OS)

7.5.4 High and Low Limit Registers

remains active until the temperature falls below the indicated TLOW value for the same number of faults. until cleared by a read operation of any register or a successful response to the SMBus Alert response address. the device to comparator mode (TM = 0).

The format of the data for THIGH and TLOW is the same as for the Temperature register. Table 10. Byte 1 of the TLOW Register (0x03)[default reset = 5000h] Table 11. Byte 1 of the THIGH Register (0x02) [default reset = 4B00h]

7.5.5 Die ID Register (0x0F)

Table 12. Die ID Register (0x0F) [default reset = 7500h]

8 Application and Implementation

validate and test their design implementation to confirm system functionality.

8.1 Application Information

although a 0.1-μF bypass capacitor is recommended.

8.2 Typical Application

Figure 8. Typical Connections of the TMP1075

8.2.1 Design Requirements

supply that is equal to or higher than VS through the pullup resistors.

8.2.2 Detailed Design Procedure

Place the TMP1075 device in close proximity to the heat source that must be monitored, with a proper layout for good thermal coupling. This placement ensures that temperature changes are captured within the shortest possible time interval. To maintain accuracy in applications that require air or surface temperature measurement, take care to isolate the package and leads from ambient air temperature. A thermally-conductive adhesive is helpful in achieving accurate surface temperature measurement.

8.2.3 Application Curve

shows the step response of the TMP1075 device to a submersion in an oil bath of 100ºC from room temperature (27ºC). The time-constant, or the time for the output to reach 63% of the input step, is 1.5 s. The time-constant result depends on the printed-circuit-board (PCB) that the TMPx175 devices are mounted. For this test, the TMP1075 device were soldered to a two-layer PCB that measured 0.375 inch × 0.437 inch.

9 Power Supply Recommendations

supplies can require additional decoupling capacitors to reject power-supply noise.

10 Layout

10.1 Layout Guidelines

10.2 Layout Example

Figure 9. Layout Example

11 Device and Documentation Support

11.1 Receiving Notification of Documentation Updates

To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper right corner, click on Alert me to register and receive a weekly digest of any product information that has changed. For change details, review the revision history included in any revised document.

11.2 Community Resources

The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use. TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help solve problems with fellow engineers. Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and contact information for technical support.

11.3 Trademarks

E2E is a trademark of Texas Instruments. SMBus is a trademark of Intel Corporation. All other trademarks are the property of their respective owners.

11.4 Electrostatic Discharge Caution

This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.

11.5 Glossary

SLYZ022 — TI Glossary. This glossary lists and explains terms, acronyms, and definitions.

12 Mechanical, Packaging, and Orderable Information

The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation.

www.ti.com 28-Mar-2018 Addendum-Page 1 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead/Ball Finish (6) MSL Peak Temp (3) Op Temp (°C) Device Marking (4/5) Samples PTMP1075DGKT ACTIVE VSSOP DGK 8 250 TBD Call TI Call TI -40 to 125 TMP1075DGKR PREVIEW VSSOP DGK 8 250 TBD Call TI Call TI -40 to 125 TMP1075DGKT PREVIEW VSSOP DGK 8 250 TBD Call TI Call TI -40 to 125 (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

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Product Information

PTMP1075DGKT specifications and overview.

Summary

Temperature Sensor With I2C and SMBus Interface in Industry Standard LM75 Form Factor and Pinout

Description

Temperature Sensor With I2C and SMBus Interface in Industry Standard LM75 Form Factor and Pinout

Source title PTMP1075DGKT Datasheet(PDF) - Texas Instruments

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