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Technical content

Features

 Designed for wide RF bandwidth and low memory effects  On-chip matching, integrated input DC block, 50-ohm input and ~4-ohm output  Typical single-carrier CDMA performance at

1960 MHz, 28 V

  • Average output power = 5 W - Linear gain = 30 dB - Effi ciency = 16% - Adjacent channel power = –52 dBc  Typical two-tone CW performance at
  • Output power (PEP) = 40 W at IMD3 = –30 dBc - Effi ciency = 34%  Capable of handling 10:1 VSWR @ 28 V, 40 W (CW) output power  Integrated ESD protection. Meets HBM Class 1B (minimum), per JESD22-A114F  Thermally-enhanced, RoHS-compliant package

Confidential, Limited Internal Distribution Data Sheet 2 of 14 Rev. 08, 2011-08-10 RF Characteristics (cont.) Two-tone Specifi cations (not subject to production test—verifi ed by design/characterization in Infi neon test fi xture) VDD = 28 V, IDQ1 = 160 mA, IDQ2 = 360 mA, POUT = 40 W PEP , ƒ = 1960 MHz, tone spacing = 1 MHz Characteristic Symbol Min Typ Max Unit Gain G ps — 30 — dB Power Added Efficiency PAE — 34 — % Third Order Intermodulation Distortion IMD3 — –32 — dBc DC Characteristics Stage 1 Characteristics Conditions Symbol Min Typ Max Unit Drain Leakage Current V DS = 28 V, VGS = 0 V I DSS — — 1.0 µA V DS = 63 V, VGS = 0 V I DSS — — 10.0 µA Gate Leakage Current V GS = 10 V, VDS = 0 V I GSS — — 1.0 µA On-state Resistance Stage 1 V GS = 10 V, VDS = 0.1 V R DS(on) — 1.6 — Ω Operating Gate Voltage V DS = 28 V, IDQ1 = 160 mA, V GS 2.0 2.5 3.0 V Stage 2 Characteristics Conditions Symbol Min Typ Max Unit Drain-source Breakdown Voltage V GS = 0 V, IDS = 10 mA V (BR)DSS 65 — — V Drain Leakage Current V DS = 28 V, VGS = 0 V I DSS — — 1.0 µA V DS = 63 V, VGS = 0 V I DSS — — 10.0 µA Gate Leakage Current V GS = 10 V, VDS = 0 V I GSS — — 1.0 µA On-state Resistance Stage 2 V GS = 10 V, VDS = 0.1 V R DS(on) — 0.21 — Ω Operating Gate Voltage V DS = 28 V, IDQ2 = 360 mA V GS 2.0 2.5 3.0 V

Data Sheet 3 of 14 Rev. 08, 2011-08-10 PTMA180402M Confidential, Limited Internal Distribution -32 -22 -12 1700 1900 2100 2300 2500 Input Return Loss (dB) Gain (dB) Frequency (MHz) Broadband Sweep VDD =2 8V ,I DQ1 =1 5 0m A ,IDQ2 =4 0 0m A , Fixture tuned for 2110 - 2170 MHz Gain IRL 30 32 34 36 38 40 42 44 46 Gain (dB) Output Power (dBm) Power Sweep, P-1dB VDD =2 8V ,I DQ1 =1 5 0m A ,IDQ2 =4 0 0m A

2110 MHz

2140 MHz

2170 MHz

Power Added Efficiency (%) Power Added Efficiency Maximum Ratings Parameter Symbol Value Unit Drain-Source Voltage V DSS 65 V Gate-Source Voltage V GS –0.5 to +12 V Junction Temperature T J 200 °C Total Device Dissipation P D 175 W Above 25°C derate by 1.0 W/°C Storage Temperature Range T STG –40 to +150 °C Overall Thermal Resistance (TCASE = 70°C, 40 W CW) Stage 1 R θJC 3.6 °C/W POUT = 40 W, IDQ1 = 160 mA, IDQ2 = 360 mA Stage 2 R θJC 1.5 °C/W Moisture Sensitivity Level Level Test Standard Package Temperature Unit

3 IPC/JEDEC J-STD-020 260 °C

Ordering Information

Type and Version Package Outline Package Description Shipping PTMA180402M V1 PG-DSO-20-63 Copper heat slug, plastic EMC body Tape Typical Performance, circuit tuned for 2140 MHz (data taken in Infineon test fixture)

Confidential, Limited Internal Distribution Data Sheet 4 of 14 Rev. 08, 2011-08-10 -50 -40 -30 -20 ed Efficiency (%) MD3 (dBc Two-tone Drive Up VDD = 28 V, IDQ1 = 150 mA, IDQ2 = 400 mA,

1 MHz tone spacing

-70 -60 -50 29 31 33 35 37 39 41 43 45 Power Add IM Average Output Power (dBm) Power Added Efficiency -50 -40 -30 -20 ded Efficiency (%) MD3 (dBc) Two-tone Drive Up VDD = 28 V, IDQ1 = 150 mA, IDQ2 = 400 mA, ƒ = 2140 MHz, 1 MHz tone spacing IM3L -70 -60 29 31 33 35 37 39 41 43 45 Power Add IM Average Output Power (dBm) IM3U Power Added Efficiency Broadband Circuit Impedance — 2140 MHz Frequency Z Load  MHz R jX 1900 5.76 –6.18 1920 5.63 –6.13 1940 5.51 –6.09 1960 5.39 –6.04 1980 5.27 –5.99 2000 5.15 –5.93 2020 5.03 –5.88 2040 4.92 –5.82 2060 4.80 –5.76 2080 4.68 –5.69 2100 4.57 –5.63 2120 4.45 –5.56 2140 4.34 –5.49 2160 4.23 –5.41 2180 4.12 –5.34 2200 4.01 –5.26 Z LoadD S IN 0.1 0.3 0.5 0.2 0.4 0.1 0.2 AVELENG <---W AVELENGTHS TOW ARD LOAD - 0.0

2200 MHz

1900 MHz

Z0 = 50  Typical Performance, circuit tuned for 2140 MHz (cont.)

Data Sheet 5 of 14 Rev. 08, 2011-08-10 PTMA180402M Confidential, Limited Internal Distribution Reference Circuit, tuned for 2140 MHz Reference circuit schematic for ƒ = 2140 MHz Circuit Description DUT PTMA180402M LDMOS IC PCB Rogers RO4350, 0.76 mm [.030"] thick, εr = 3.48, 1 oz. copper Test fi xture part no. LTN/PTMA180402M Find Gerber fi les for this test fi xture on the Infi neon Web site at http://www.infi neon.com/rfpower Circuit Assembly Information Microstrip Electrical Characteristics Dimensions: L x W (mm) Dimensions: L x W (in.) at 2140 MHz 100μF 50V C11 10μF G2V V 10μF VD1 C18 10μF C16 0.1μF C15 12pF C17 1μF C13 0.1μF C12 1μF C14 12pF 12pF 0.1μF 1μF C10 12pF 1μF 10μF 0.1μF 183 PTMA180402M DUT C29 100μF 50V C27 1μF C25 12pF C26 0.1μF C28 10μF C19 100μF 50V C20 12pF C30 1.8pF C31 1.8pF D1V "11 "10 C32 2.4pF "6 "7 C33 1.2pF C34 12pF C21 0.1μF C22 1μF C23 10μF VD2 C24 100μF 50V .5pF M A 1 8 0 4 0 2 m _ 2 1 4 0 M H z _ B D _ 9 - 2 - 0 9 RF_IN RF_OUT

Confidential, Limited Internal Distribution Data Sheet 6 of 14 Rev. 08, 2011-08-10 Reference Circuit — 2140 MHz (cont.) Assembly diagram for 2140 MHz reference circuit (not to scale) Component Description Suggested Manufacturer P/N or Comment C1, C19, C24, C29 Electrolytic capacitor, 100 µF , 50 V Digi-Key PCE3718CT -ND C2, C7, C11, C18, Ceramic capacitor, 10 µF Murata GRM422Y5V106Z050AL C23, C28 C3, C8, C12, C17, Ceramic capacitor, 1 µF Digi-Key 445-1411-2-ND C22, C27 C4, C9, C13, C16, Capacitor, 0.1 µF Digi-Key 399-1267-2-ND C21, C26 C5, C10, C12, C15, Ceramic capacitor, 12 pF ATC 600S120JT C20, C25, C34 C6 Ceramic capacitor, 0.5 pF ATC 100B 0R5 C30, C31 Ceramic capacitor, 1.8 pF ATC 600S1R8CT C32 Ceramic capacitor, 2.4 pF ATC 100B 2R4 C33 Ceramic capacitor, 1.2 pF ATC 100B 1R2 Q1, Q2 Transistor Infi neon Technologies BCP56 R1, R2 Resistor, 0 Ω Digi-Key 603 R3, R4 Potentiometer, 2k Ω Digi-Key 3224W-202ETR-ND C33 C24C23 C22 C21 C20 C29 C28 C27 C26 C25 C32 C34 C31 C30 C19 C15 C16 C17 C18 C8 C9 C13 C14C10 C11 C12 MA180402m_2140 MHz_CD_9-2-09 VG2 VD1 VG1 VD2 VD2VD1 RF_IN RF_OUT R3 R4 Q2Q1

Data Sheet 7 of 14 Rev. 08, 2011-08-10 PTMA180402M Confidential, Limited Internal Distribution 30 32 34 36 38 40 42 44 46 48 Gain (dB) Output Power (dBm) CW Power Performance VDD =2 8V ,I DQ1 =1 3 0m A ,IDQ2 =3 6 0m A , ƒ = 1930, 1960, 1990 MHz

1930 MHz

1960 MHz

1990 MHz

Power Added Efficiency (%) Efficiency 30 32 34 36 38 40 42 44 46 Gain (dB) Output Power (dBm) CW Performance at Selected Drain Voltage VDD =2 4V ,2 8V ,3 2V IDQ1 =1 3 0m A ,IDQ2 = 360 mA, ƒ = 1960 MHz 24 V 32 V 28 V -60 -50 -40 -30 -20 -10 30 32 34 36 38 40 42 44 46 IMD3 (dBc) Average Output Power ( dBm ) Two-toneDrive-up VDD =2 8V ,I DQ1 = 160 mA, IDQ2 = 360 mA ƒ = 1930, 1960, 1990 MHz Power Added Efficiency (%) -65 -60 -55 -50 -45 -40 -35 29 31 33 35 37 39 41 Power Added Efficiency (%) Output Power (dBm) CDMA IS-95 Drive-up, 3 Frequencies VDD =2 8V ,I DQ1 =1 6 0 ,IDQ2 =3 6 0m A , ƒ = 1930, 1960, 1990 MHz Adjacent Channel Power Ratio (dB) Efficiency ACPR Power Added Efficiency Power Added EfficiencyPower Added Efficiency Typical Performance, circuit tuned for 1960 MHz (data taken in a production test fi xture)

Confidential, Limited Internal Distribution Data Sheet 8 of 14 Rev. 08, 2011-08-10 Edge Modulation Performance VDD = 28 V, IDQ1 = 160 mA, IDQ2 = 360 mA ƒ = 1930 1960 1990 MHz -5040 ƒ = 1930, 1960, 1990 MHz -60 -55 400 kHz ctrum (dB ency (%) -70 -65 ation Spec ded Efficie -80 -75 600 kHz ge Modula Power Add Power Added Efficiency -85 30 32 34 36 38 40 42 44 Edg P Output Power ( dBm ) -40 -35 -30 -25 -20 M3 (dBc) Two-carrier WCDMA Drive-up VDD = 28 V, IDQ1 = 160 mA, IDQ2 = 360 mA, ƒ = 1930, 1960, 1990 MHz, PAR = 8 dB, 10 MHz spacing, 3.84 MHz bandwidth dded Efficiency (%) Power Added Efficiency -50 -45 30 32 34 36 38 40 42 I Output Power ( dBm ) IM3 Power Ad Edge EVM Performance VDD = 28 V, IDQ1 = 160 mA, IDQ2 = 360 mA ƒ = 1930 1960 1990 MHz 3.540 ƒ 1930 , 1960, 1990 MHz 2.5 3.0 de (%) ncy (%) 1.5 2.0 r Magnitud ed Efficien Power Added 1.0 ror Vector EVM ower Adde Efficiency 0.0 0.5 30 32 34 36 38 40 42 44 Err Po Output Power ( dBm ) -35 -30 -25 -20 M3 (dBc) Two-carrier WCDMA at Selected Temperatures VDD = 28 V, IDQ1 = 160 mA, IDQ2 = 360 mA, ƒ = 1960 MHz, PAR = 8 dB, 10 MHz spacing,

3.84 MHz bandwidth

25°C 90°C –25°C Power Added Efficiency dded Efficiency (%) -50 -45 -40 30 32 34 36 38 40 42 IM Output Power ( dBm ) IM3 Power Ad Typical Performance —1960 MHz (cont.)

Data Sheet 9 of 14 Rev. 08, 2011-08-10 PTMA180402M Confidential, Limited Internal Distribution Broadband Circuit Impedance — 1960 MHz Z LoadD S IN MHz R jX 1800 5.56 –6.95 1810 5.48 –6.91 1820 5.39 –6.87 1830 5.31 –6.83 1840 5.23 –6.79 1850 5.15 –6.75 1860 5.07 –6.70 1870 4.99 –6.66 1880 4.91 –6.61 1890 4.84 –6.56 1900 4.76 –6.51 1910 4.69 –6.47 1920 4.61 –6.42 1930 4.54 –6.36 1940 4.47 –6.31 1950 4.40 –6.26 1960 4.33 –6.21 1970 4.26 –6.15 1980 4.19 –6.10 1990 4.12 –6.04 2000 4.06 –5.99 0.1 0.3 0.2 0.1 0.2 AVELEN <---W AVELENGTHS TOW ARD LOAD - 0.0

2200 MHz 1800 MHz

Z0 = 50 

Confidential, Limited Internal Distribution Data Sheet 10 of 14 Rev. 08, 2011-08-10 Reference Circuit, tuned for 1960 MHz Reference circuit schematic for ƒ = 1960 MHz Circuit Description DUT PTMA180402M LDMOS IC PCB Rogers RO4350, 0.76 mm [.030"] thick, εr = 3.48, 1 oz. copper Test Fixture Part No. LTN/PTMA180402M Find Gerber fi les for this test fi xture on the Infi neon Web site at http://www.infi neon.com/rfpower Microstrip Electrical Characteristics Dimensions: L x W (mm) Dimensions: L x W (in.) at 1960 MHz 1μF 12pF 0.1μF 10μF C13 12pF G2V C11 1μF C10 10μF C12 0.1μF C16 1μF C14 12pF C15 0.1μF C18 100μF 50V C17 10μF D1V VD1 G1V 100μF 50V 10μF 1μF DUT PTMA180402M 0.1μF 12pF C29 1.8pF18 C30 1.8pF "2 "3 C27 10μF C25 0.1μF C24 12pF "10 C26 1μF C28 100μF 50V VD2 C33 12pF C31 2.7pF "4 "7 C19 12pF C20 0.1μF C21 1μF "8 J2 C23 100μF 50V C22 10μF C32 1pF M A 1 8 0 4 0 2 m _ 1 9 6 0 M H z _ B D _ 9 - 2 - 0 9 RF_IN RF_OUT

Data Sheet 11 of 14 Rev. 08, 2011-08-10 PTMA180402M Confidential, Limited Internal Distribution Reference Circuit — 1960 MHz (cont.) Assembly diagram for 1960 MHz reference circuit (not to scale) Component Description Suggested Manufacturer P/N or Comment C1, C18, C23, C28 Electrolytic capacitor, 100 µF , 50 V Digi-Key PCE3718CT -ND C2, C6, C10, C17, Ceramic capacitor, 10 µF Murata GRM422Y5V106Z050AL C22, C27 C3, C7, C11, C16, Ceramic capacitor, 1 µF Digi-Key 445-1411-2-ND C21, C26 C4, C8, C12, C15, Capacitor, 0.1 µF Digi-Key 399-1267-2-ND C20, C25 C5, C9, C13, C14, Ceramic capacitor, 12 pF ATC 600S120JT C19, C24, C33 C29, C30, C31 Ceramic capacitor, 1.8 pF ATC 600S1R8CT C32 Ceramic capacitor, 1.0 pF ATC 100B 1R0 Q1, Q2 Transistor Infi neon Technologies BCP56 R1, R2 Resistor, 0 Ω Digi-Key 603 R3, R4 Potentiometer, 2k Ω Digi-Key 3224W-202ETR-ND C32 C23C22 C21 C20 C19 C28 C27 C26 C25 C24 C31 C33C30 C29 C18 C14 C15 C16 C17 C8 C12 C13C9 C10 C11 MA180402m_1960 MHz_CD_9-2-09 R4R2 Q2Q1 VG1 VG2 VD2 VD1 VD1 VD2 RF_IN RF_OUT

Confidential, Limited Internal Distribution Data Sheet 12 of 14 Rev. 08, 2011-08-10 Pinout Diagram Thermal FET a180402m_pd_9-3-2009 VD2, RF Out VD2, RF Out VD2, RF Out VD2, RF Out VD2, RF Out VD2, RF Out NC NC NC NC RF In RF In V G Thermal FET VD Thermal FET VD1 VD1 VD1 VD1 VG1 VG2 Source: Plated copper heat slug on backside of package.

Data Sheet 13 of 14 Rev. 08, 2011-08-10 PTMA180402M Confidential, Limited Internal Distribution Package Outline Specifications Package PG-DSO-20-63 2X 2.90 [0.114] MAX (2 PLS) 13.00 [0.512] MAX 110 11 20 INDEX PIN 1 14.20±0.30 11.00 [0.433] 9 X 1.27 = 11.43 9 X .050 = .450 1.10 [0.043] MAX (2 PLS) 2.95 [0.116] 6.00 [0.236] TOP VIEW BOTTOM VIEW [0.559±0.012] 0.40+0.13 [0.015+0.005] 0.25mm C A B 15.90±0.10 [0.626±0.004] 1.27 [0.050] 14°±1° (2 PLS) TOP/BOTTOM ALL SIDES 11.00±0.10 [0.433±0.004] 3.50 [0.137] MAX SEE DETAIL A SIDE VIEW END VIEW MS S 0.95±0.15 [0.037±0.006] 0.35 [0.014] GAUGE PLANE 0.15 [0.006] REF 0+0.1 [0+0.004] STANDOFF 1.60 [0.063] REF 0.25+0.07 –0.02 [0.010 ]+0.003 –0.001 DETAIL A PG -DSO -20- 63_po_02-1 9 -2010 Diagram Notes—unless otherwise specifi ed: 1. Interpret dimensions and tolerances per ASME Y14.5M-1994. 3. JEDEC drawing number: MO-166. 4. Does not include plastic or metal protrusion of 0.15 mm max per side. 5. Does not include dambar protrusion; maximum allowable dambar protrusion shall be 0.08 mm. 6. Bottom metallization. Sn plating (matte) : 5 – 15 micron [196.85 – 590.55 microinch]. Refer to Application Note “Recommendations for Printed Circuit Board Assembly of Infi neon DSO and SSOP Packages” for additional information.

Infi neon Technologies AG

81726 Munich, Germany

© 2008 Infi neon Technologies AG All Rights Reserved. Legal Disclaimer The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics. With respect to any examples or hints given herein, any typical values stated herein and/or any information regarding the application of the device, Infi neon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation, warranties of non-infringement of intellectual property rights of any third party. Information For further information on technology, delivery terms and conditions and prices, please contact the nearest Infi neon Technologies Offi ce ( www.infi neon.com/rfpower). Warnings Due to technical requirements, components may contain dangerous substances. For information on the types in question, please contact the nearest Infi neon Technologies Offi ce. Infi neon Technologies components may be used in life-support devices or systems only with the express written approval of In- fi neon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered. We Listen to Your Comments Any information within this document that you feel is wrong, unclear or missing at all? Y our feedback will help us to continuously improve the quality of this document. Please send your proposal (including a reference to this document) to: highpowerRF@infi neon.com To request other information, contact us at: +1 877 465 3667 (1-877-GO-LDMOS) USA or +1 408 776 0600 International PTMA180402M V1 Confidential, Limited Internal Distribution Page Subjects (major changes since last revision) Data Sheet 14 of 14 Rev. 08, 2011-08-10 Revision History: 2011-08-10 Data Sheet Previous Version: 2011-03-17, Data Sheet 1 Revisions to RF characteristics.

2 Changes to V (BR)DSS and RDS(on), DC table

3, 11 Corrected typos. 9 Removed voltage vs. temperature graph. all Miscellaneous cosmetic adjustments.