PTLC6946DBQR

TLC6946 TI1 | Alldatasheet

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ADVANCE□INFORMATION Controller OUT0 OUT15 SIN SCLK LAT GCLK IREF GND VCC SOUT TLC6946 Device 1 R IREF VCC OUT0 OUT15 SIN SCLK LAT GCLK IREF GND VCC SOUT TLC6946 Device 2 VCC OUT0 OUT15 SIN SCLK LAT GCLK IREF GND VCC SOUT TLC6946 Device 3 VCC VLED VLED VLED DATA SCLK LAT GSCLK DATA BACK R IREF R IREF Line 0 Line n Line 31 Product Folder Order Now T echnical Documents Tools & Software Support & Community An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. ADVANCE INFORMATION for pre-production products; subject to change without notice. TLC6946 SLVSEB3 –JUNE 2018 TLC694616-Channel32-Multiplexing16-BitES-PWMConstant-CurrentLEDDriver

1 Features

1• Power Supply Voltage Range – VCC Voltage Range: 3 V to 5.5 V – VLED Voltage Range: Up to 17 V

16 Constant-Current-Sink Channels – 0.3 mA to 25 mA (3 V ≤ VCC ≤ 5.5 V) – Channel Current Deviation: ±1.5% (typ) – Device Current Deviation: ±1.5% (typ) – Low Knee Voltage: 0.3 V (typ) at 10 mA
7-Bit (128 Steps) Global Brightness Control (BC)
16-Bit (65 536 Steps) Enhanced Spectrum PWM Grayscale Control
Built-In 16-Kbit Memory Supports 32-Multiplexing
LED Display Performance Enhancement – Low-Grayscale Uniformity Improvement – Low-Grayscale Coupling Issue Elimination – Ghosting Removal – Caterpillar Elimination
High-Speed Serial-Data Interface – Data-shift Clock: 33 MHz (max) – Grayscale Control Clock: 33 MHz (max) – Extended Grayscale Control: 50 MHz (max)
Diagnostics and Protection – LED-Open Detection (LOD) – IREF Resistor Short Protection (ISP) – Thermal Shutdown (TSD)
Smart Power-Save Mode

2 Applications

Mono-Color, Multi-Color, Full-Color LED Displays
High-Refresh-Rate LED Video Displays
High-Density, Fine-Pitch LED Matrix Displays

3 Description

In high-density, fine-pitch LED panel applications, the performance demand for multi-channel LED drivers is increasing to achieve high multiplexing, high PWM resolution, and high refresh rates. To meet strict display quality requirements, the LED drivers must have the ability to solve various issues in different LED-matrix application scenarios. The TLC6946 device is a 16-channel, constant- current-sink LED driver. Each channel has an individually adjustable 65 536 steps of PWM grayscale control. The maximum constant-current value of all 16 channels is set by a single external resistor with 128 steps of global brightness control from 0.3 mA to 25 mA. The TLC6946 device integrates enhanced circuits to solve the various display issues in fine-pitch LED display applications: the low-grayscale uniformity issue, coupling issue, ghosting issue, and caterpillar issue. Device Information(1) PART NUMBER PACKAGE BODY SIZE (NOM) TLC6946 SSOP (24) 8.65 mm × 3.90 mm VQFN (24) 4.00 mm × 4.00 mm (1) For all available packages, see the orderable addendum at the end of the data sheet.

4 Typical Application Schematic

9.1 Pin Equivalent Input and Output Schematic

14.2 Receiving Notification of Documentation Updates 23

15 Mechanical, Packaging, and Orderable

5 Revision History

June 2018 * Initial release

ADVANCE□INFORMATION

24 SCLK7OUT5

23 SIN8OUT6

22 VCC 9OUT7

21 IREF10GND

20 GCLK11OUT8

19 SOUT12OUT9

6 Description (continued)

The TLC6946 device features an LED-open detection function, and the error detection results can be read via a serial data interface port. Thermal shutdown and IREF resistor short protection ensure a higher system reliability. The TLC6946 device also has an smart power-save mode that sets the total current consumption to 0.8 mA (typ) when all outputs are off.

7 Pin Configuration and Functions

24-Pin VQFN With Exposed Thermal Pad Top View Pin Functions PIN I/O DESCRIPTION NAME NO. DBQ RGE GCLK 21 20 I Grayscale (GS) pulse-width modulation (PWM) reference-clock-signal input pin. In the default operating mode, each GCLK rising edge increments the GS counter for PWM control. GCLK supports dual-edge operation. GND 1 10 — Power-ground reference IREF 23 21 I Pin for setting the maximum constant-current value. An external resistor connected between IREF and GND sets the maximum current for each constant-current output channel. When this pin is connected directly to GND, all outputs are forced off. The external resistor should be placed close to the device. LAT 4 1 I Data latch pin. The falling edge of LAT latches the data from the common shift register into the GS data memory or the function control register.

ADVANCE□INFORMATION TLC6946 SLVSEB3 –JUNE 2018 www.ti.com Product Folder Links: TLC6946 Submit Documentation Feedback Copyright © 2018, Texas Instruments Incorporated Pin Functions (continued) PIN I/O DESCRIPTION NAME NO. DBQ RGE OUT0 5 2 O Constant-current output. Each output can be tied together with others to increase the constant current. A different voltage can be applied to each output. OUT1 6 3 O OUT2 7 4 O OUT3 8 5 O OUT4 9 6 O OUT5 10 7 O OUT6 11 8 O OUT7 12 9 O OUT8 13 11 O OUT9 14 12 O OUT10 15 13 O OUT11 16 14 O OUT12 17 15 O OUT13 18 16 O OUT14 19 17 O OUT15 20 18 O SCLK 3 24 I Clock-signal input pin. Serial data present on SIN are shifted to the LSB of the internal 16-bit common shift register on the SCLK rising edge. All data in the shift register are shifted toward the MSB of the internal 16-bit common shift register on each SCLK rising edge. SIN 2 23 I Serial-data input pin of the internal 16-bit common shift register. When SIN is high, the LSB of the internal 16-bit common shift register is set to 1 on the SCLK input rising edge. When SIN is low, the LSB of the internal 16-bit common shift register is set to 0 on the SCLK input rising edge. SOUT 22 19 O Serial data output pin of the internal 16-bit common shift register. The MSB of the internal 16-bit common shift register appears on SOUT. VCC 24 22 I Power supply pin Thermal pad — — — Internally connected to GND in the RGE package only. The thermal pad and the GND pin must be connected together on the board.

ADVANCE□INFORMATION TLC6946 www.ti.com SLVSEB3 –JUNE 2018 Product Folder Links: TLC6946 Submit Documentation FeedbackCopyright © 2018, Texas Instruments Incorporated (1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. (2) All voltage values are with respect to GND.

8 Specifications

8.1 Absolute Maximum Ratings

over operating junction temperature range (unless otherwise noted)(1)(2) MIN MAX UNIT Voltage VCC –0.3 6 VGCLK, IREF, LAT, SCLK, SIN, SOUT –0.3 VCC + 0.3 OUT0 to OUT15 –0.3 20 Current OUT0 to OUT15 0 27 mA Operating junction temperature, TJ –40 150 °C Storage temperature, Tstg –55 150 °C (1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. (2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

8.2 ESD Ratings

V(ESD) Electrostatic discharge Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) ±4000 VCharged-device model (CDM), per JEDEC specification JESD22- C101(2) ±1000

8.3 Recommended Operating Conditions

At TJ = –40°C to 125°C, unless otherwise noted MIN NOM MAX UNIT VCC Supply voltage 3 5.5 V VLED LED supply voltage 17 V VOUTn Voltage applied to OUT0 to OUT15 0 VCC V VIH High-level input voltage GCLK, LAT, SCLK, SIN 0.7 × VCC VCC V VIL Low-level input voltage GCLK, LAT, SCLK, SIN 0 0.3 × VCC V IOH High-level output current SOUT –2 mA IOL Low-level output current SOUT 2 mA IOLC, max Maximum constant-output sink current OUT0 to OUT15 0.3 25 mA TA Operating ambient temperature –40 85 °C TJ Operating junction temperature –40 125 °C (1) For more information about traditional and new thermal metrics, see Semiconductor and IC Package Thermal Metrics.

8.4 Thermal Information

THERMAL METRIC(1) TLC6946 UNITDBQ (SSOP) RGE (VQFN)

24 PINS 24 PINS

RθJA Junction-to-ambient thermal resistance 87.2 35.6 °C/W RθJC(top) Junction-to-case (top) thermal resistance 42.3 34.7 °C/W RθJB Junction-to-board thermal resistance 41.4 15.2 °C/W ψJT Junction-to-top characterization parameter 9.2 0.7 °C/W ψJB Junction-to-board characterization parameter 41 15.2 °C/W RθJC(bot) Junction-to-case (bottom) thermal resistance N/A 5 °C/W

8.5 Electrical Characteristics

VCC = 3 V to 5.5 V and TJ = –40°C to 125°C; typical values are at VCC = 3.3 V, TA = 25°C, V(LED) = 5 V, over recommended operating conditions (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT VOH High-level output voltage IOH = –2 mA at SOUT VCC – 0.4 VCC V VOL Low-level output voltage IOL = 2 mA at SOUT 0.4 V VIREF Reference voltage BC = 00h, RIREF = 10.7 kΩ (IOUTn = 0.3- mA target) 0.784 0.8 0.816 V V(LOD) LED open-detection threshold All OUTn = on, LODVTH = 00b 0.12 0.2 0.28 V All OUTn = on, LODVTH = 01b 0.42 0.5 0.58 V All OUTn = on, LODVTH = 10b 0.82 0.9 0.98 V All OUTn = on, LODVTH = 11b 1.12 1.2 1.28 V V(KNEE) Knee voltage (OUT0 to OUT15) All OUTn = on, BC = 36h, RIREF = 1.27 kΩ (IOUTn = 10-mA target) 0.3 V II Input current VI = VCC or GND at SCLK or SIN –1 1 µA ICC Supply current GCLK = LAT = SCLK = SIN = GND, GSn = 0000h, BC = 00h, precharge function is enabled, VOUTn = VCC, RIREF = open 4.5 6 mA GCLK = LAT = SCLK = SIN = GND, GSn = 0000h, BC = 36h, precharge function is enabled, VOUTn is floating, RIREF = 1.27 kΩ (IOUTn = 10-mA target) 6 8 GCLK = LAT = SCLK = SIN = GND, GSn = 0000h, BC = 7Eh, precharge function is enabled, VOUTn is floating, RIREF = 1.27 kΩ (IOUTn = 20-mA target) 7 9 LAT = SCLK = SIN = GND, GCLK = 33 MHz, GSn = FFFFh, BC = 36h, precharge function is enabled, VOUTn = 1 V, RIREF = 1.27 kΩ (IOUTn = 10-mA target) 6 9 LAT = SCLK = SIN = GND, GCLK = 33 MHz, GSn = FFFFh, BC = 7Eh, precharge function is enabled, VOUTn = 1 V, RIREF = 1.27 kΩ (IOUTn = 20-mA target) 7 9 LAT = SCLK = SIN = GND, GCLK = 33 MHz, GSn = FFFFh, BC = 7Eh, precharge function is enabled, VOUTn = 1 V, RIREF = 1.02 kΩ (IOUTn = 25-mA target) 8 9 In power-save mode, precharge function is disabled 0.9 1.5 IOLC Constant-output sink current All OUTn = on, BC = 00h, VOUTn = 1 V, RIREF = 10.7 kΩ (IOUTn = 0.3-mA target), TA = 25°C 0.291 0.3 0.309 mA All OUTn = on, BC = 36h, VOUTn = 1 V, RIREF = 1.27 kΩ (IOUTn = 10-mA target), TA = 25°C 9.7 10 10.3 All OUTn = on, BC = 7Eh, VOUTn = 1 V, RIREF = 1.27 kΩ (IOUTn = 20-mA target), TA = 25°C 19.4 20 20.6 All OUTn = on, BC = 7Eh, VOUTn = 1 V, RIREF = 1.02 kΩ (IOUTn = 25-mA target), TA = 25°C 24.25 25 25.75 ΔIOLC0 Channel-to-channel (C-to-C) constant-current deviation All OUTn = on, BC = 00h,VOUTn = 1 V, RIREF = 10.7 kΩ (IOUTn = 0.3-mA target), TA = 25°C ±1.5% ±3% All OUTn = on, BC = 00h, VOUTn = 1 V, RIREF = 10.7 kΩ (IOUTn = 0.3-mA target), full temperature range ±1.5% ±3%

ADVANCE□INFORMATION TLC6946 www.ti.com SLVSEB3 –JUNE 2018 Product Folder Links: TLC6946 Submit Documentation FeedbackCopyright © 2018, Texas Instruments Incorporated Electrical Characteristics (continued) VCC = 3 V to 5.5 V and TJ = –40°C to 125°C; typical values are at VCC = 3.3 V, TA = 25°C, V(LED) = 5 V, over recommended operating conditions (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT ΔIOLC1 Device-to-device (D-to-D) constant-current deviation All OUTn = on, BC = 00h,VOUTn = 1 V, RIREF = 10.7 kΩ (IOUTn = 0.3-mA target), TA = 25°C ±1.5% ±3% All OUTn = on, BC = 00h,VOUTn = 1 V, RIREF = 10.7 kΩ (IOUTn = 0.3-mA target), full temperature range ±1.5% ±3% ΔIOLC2 Line regulation All OUTn = on, VCC = 3 V to 5.5 V, BC = 00h, VOUTn = 1 V, RIREF = 10.7 kΩ (IOUTn = 0.3-mA target) ±1 ±2 %/V ΔIOLC3 Load regulation All OUTn = on, BC = 00h, VOUTn = 1 V to 3 V, RIREF = 10.7 kΩ (IOUTn = 0.3-mA target) ±1 ±2 %/V ΔIOLC4 Channel-to-channel (C-to-C) constant-current deviation All OUTn = on, BC = 7Eh,VOUTn = 1 V, RIREF = 1.02 kΩ (IOUTn = 25-mA target), TA = 25°C ±1.5% ±3% All OUTn = on, BC = 7Eh,VOUTn = 1 V, RIREF = 1.02 kΩ (IOUTn = 25-mA target), full temperature range ±1.5% ±3% ΔIOLC5 Device-to-device (D-to-D) constant-current deviation All OUTn = on, BC = 7Eh,VOUTn = 1 V, RIREF = 1.02 kΩ (IOUTn = 25-mA target), TA = 25°C ±1.5% ±3% All OUTn = on, BC = 7Eh,VOUTn = 1 V, RIREF = 1.02 kΩ (IOUTn = 25-mA target), full temperature range ±1.5% ±3% ΔIOLC6 Line regulation All OUTn = on, VCC = 3 V to 5.5 V, BC = 7Eh, VOUTn = 1 V, RIREF = 1.02 kΩ (IOUTn = 25-mA target) ±1 ±2 %/V ΔIOLC7 Load regulation All OUTn = on, BC = 7Eh, VOUTn = 1 V to 3 V, RIREF = 1.02 kΩ (IOUTn = 25-mA target) ±1 ±2 %/V VIL(ISP) Voltage threshold to enter IREF-resistor short protection 0.15 0.195 V VIH(ISP) Voltage threshold to release from IREF-resistor short protection 0.325 0.4 V RDW Pulldown resistor LAT 250 500 750 kΩ GCLK 250 500 750 T(TSD) Thermal shutdown threshold 170 °C T(HYS) Thermal shutdown hysteresis 15 °C

8.6 Timing Requirements

At TJ = –40°C to 125°C, unless otherwise noted MIN NOM MAX UNIT fSCLK Data-shift clock frequency SCLK 33 MHz fGCLK Grayscale control clock frequency GCLK 33 MHz fGCLK,B Grayscale control clock frequency for dual-edge operation GCLK 25 MHz Internal extended grayscale control 50 tw(H) Pulse high duration SCLK 10 nsGCLK 10 GCLK (for dual-edge operation) 18

ADVANCE□INFORMATION TLC6946 SLVSEB3 –JUNE 2018 www.ti.com Product Folder Links: TLC6946 Submit Documentation Feedback Copyright © 2018, Texas Instruments Incorporated Timing Requirements (continued) At TJ = –40°C to 125°C, unless otherwise noted MIN NOM MAX UNIT tw(L) Pulse low duration SCLK 10 nsGCLK 10 GCLK (for dual-edge operation) 18 tsu Setup time SIN to SCLK↑ 2 ns LAT↑ to SCLK↑ 5 LAT↓ to SCLK↑ 5 LAT↓ to SCLK↑, read data from SOUT 50 LAT↓ (WRTGS) to LAT↓ (WRTGS) 1.5 µs LAT↓ (WRTGS) to LAT↓ (VSYNC) 1.5 LAT↓ (VSYNC) to GCLK↑ 2.5 LAT↓ (VSYNC) to LAT↓ (WRTGS) 2.5 Last LAT (non-0 GS data latched)↓ to the first GCLK↑ of next frame (wake up from power-save mode) tLSW Line switching time Last GCLK↓ to the first GCLK↑ of next line 1 µs th Hold time SCLK↑ to SIN 2 nsSCLK↑ to LAT↑ 2 SCLK↑ to LAT↓ 10

8.7 Switching Characteristics

VCC = 3 V to 5.5 V and TJ = –40°C to 125°C; Typical values are at VCC = 3.3 V, TA = 25°C, VLED = 5 V, over recommended operating conditions (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT tr Rise time SOUT 2 nsOUTn, BC = 7Eh, VOUTn = 1 V, RIREF = 1.02 kΩ (IOUTn = 25-mA target), TA = 25°C, RL = 160 Ω tf Fall time SOUT 2 nsOUTn, BC = 7Eh, VOUTn = 1 V, RIREF = 1.02 kΩ (IOUTn = 25-mA target), TA = 25°C, RL = 160 Ω tpd Propagation delay SCLK↑ to SOUT↑↓, SEL_TD0 = 00b 5 ns SCLK↑ to SOUT↑↓, SEL_TD0 = 01b 10 SCLK↑ to SOUT↑↓, SEL_TD0 = 10b 20 SCLK↓ to SOUT↑↓, SEL_TD0 = 11b 5 LAT↓ to SOUT, read LOD information 25 50

Figure 1. Timing Diagram

8.8 Typical Characteristics

Figure 2. Channel Sink Current vs OUTn Voltage Figure 3. Channel Sink Current vs OUTn Voltage

Figure 10. Supply Current (ICC) vs Channel Sink Current Figure 11. Supply Current (ICC) vs Temperature Figure 12. Supply Current (ICC) in Power-Save Mode vs Temperature

9 Parameter Measurement Information

9.1 Pin Equivalent Input and Output Schematic Diagrams

Figure 13. SIN, SCLK Figure 14. LAT, GCLK

Figure 15. SOUT Figure 16. OUT0 Through OUT15

9.2 Test Circuits

CL includes measurement probe and jig capacitance. Figure 17. Rise and Fall Time Test Circuit for OUTn Figure 18. Rise and Fall Time Test Circuit for SOUT Figure 19. Constant-Current Test Circuit for OUTn

10 Detailed Description

10.1 Overview

The TLC6946 device is a 16-channel constant-current-sink LED driver supporting 1- to 32-multiplexing. Each channel has an individually adjustable 65 536-step pulse-width modulation (PWM) grayscale (GS) control. The TLC6946 device implements 16Kb display memory to increase the visual refresh rate and to decrease the grayscale data-writing frequency. The TLC6946 device supports current from 0.3 mA to 25 mA for each channel, with typical 1.5% channel-to- channel current deviation and typical 1.5% device-to-device current deviation. The maximum current value of all 16 channels is set by an external IREF resistor, and can be adjusted by the 128-step global brightness control (BC). The device also implements low-grayscale enhancement technology to solve the coupling issue and improve the display quality in low-grayscale conditions. These features make the TLC6946 device a candidate for high-density-multiplexing LED-matrix-display and LED-panel applications. The TLC6946 device integrates enhanced circuits to solve the various display issues in fine-pitch LED display applications: the low-grayscale uniformity issue, coupling issue, ghosting issue, and caterpillar issue. The TLC6946 device features an LED-open detection function, and the error detection results can be read via a serial data-interface port. Thermal shutdown and IREF-resistor short protection ensure a higher system reliability. The TLC6946 device also has a smart power-save mode that sets the total current consumption to 0.8 mA (typ) when all outputs are off.

ADVANCE□INFORMATION LED Open Detection (LOD) Caterpillar Elimination and Ghosting Removal 16-CH Constant Current Sink Control 7-bit Global BC and Pre-Charge ES-PWM Decoder Timing Control LOD Threshold Reference Current Control Internal CounterVSYNC BANK A 16-bit × 16-CH × 32-line BANK B 16-bit × 16-CH × 32-line Address Decoder Writing Control Command Decoder WRTGS Function Control (FC) Registers WRTFC BANK_SELVSYNC VSYNC READFCx or READLOD 16-bit Common Shift Register 16-bit LOD Data Line Counter MSBLSB Power Save Control To Analog GND VCC VCC IREF GCLK LAT SCLK SIN GND SOUT OUT0 OUT1 OUT2 OUT15 OUT14 OUT13 16 16 Copyright © 2018, Texas Instruments Incorporated TLC6946 SLVSEB3 –JUNE 2018 www.ti.com Product Folder Links: TLC6946 Submit Documentation Feedback Copyright © 2018, Texas Instruments Incorporated

10.2 Functional Block Diagram

10.3 Feature Description

10.3.1 Built-In 16Kb Display Memory (SRAM)

The TLC6946 device integrates 16K bits of SRAM to support 1- to 32-multiplexing. SRAM is divided into two BANKs: BANK A and BANK B. While BANK A is displaying, BANK B is ready to receive the data of the next frame. While BANK B is displaying, BANK A is ready to receive the data of next frame.

10.3.2 GCLK Dual-Edge Operation

The TLC6946 device uses the rising edge or both edges of GCLK. The selection is made by setting the GCLK_EDGE bit in the function control register. By default, the TLC6946 device uses the GCLK rising edge, and the maximum input GCLK frequency is 33 MHz. By setting GCLK_EDGE = 1, the TLC6946 device operates at both GCLK edges (rising and falling), and the maximum input GCLK frequency is 25 MHz.

10.3.3 Programmable Constant-Sink Channel Current

10.3.3.1 Global Brightness Control (BC)

10.3.3.2 Select RIREF for a Given BC

pins. The voltage on IREF is typically 0.8 V. RIREF can be calculated by Equation 1.

VIREF is the internal reference voltage on IREF (0.8 V, typ)
IOLCmax is the maximum current for each channel
Gain is the current gain at BC = 7E (See Table 1) (1) RIREF must be between 1.02 kΩ and 10.7 kΩ in order to hold the channel sink current IOLC between 25 mA (typ) and 0.3 mA (typ). Otherwise, the output may be unstable.

Table 2. Maximum Constant Current vs External Resistor RIREF

10.3.4 Grayscale (GS) Function (PWM Control)

The TLC6946 device can adjust the brightness of each output channel using a pulse-width-modulation (PWM) control scheme. The architecture of 16 bits per channel results in 65 536 brightness steps, from 0% up to 100% brightness. The on-time (tOUT_ON) of each output (OUTn) can be calculated by Equation 2. where GSn is the grayscale of channel OUTn (2) The TLC6946 device implements an enhanced spectrum (ES) PWM control. The ES-PWM control can be selected with two different modes: 8-bit MSB + 8-bit LSB (8+8) mode, and 9-bit MSB + 7-bit LSB (9+7) mode. See TLC6946 Technical Reference Manual for more details.

10.3.5 LED-Open Detection (LOD)

The LED-open detection (LOD) function detects faults caused by an open circuit in any LED string or a short from OUTn to ground with low impedance. It does this by comparing the OUTn voltage to the LOD-detection threshold-voltage level set by LODVTH in the function control register. If the OUTn voltage is lower than the programmed voltage, the corresponding output LOD bit is set to 1 to indicate an open LED. Otherwise, the output of that LOD bit is 0. LOD data output by the detection circuit are valid only during the on period of that OUTn output channel. The LOD data are always 0 for outputs that are turned off.

10.3.6 Caterpillar Removal

The TLC6946 device implements an internal circuit that can eliminate the caterpillar issue caused by an open LED. The caterpillar effect is a common issue for LED panels. It is usually caused by an open or shorted LED, or LED leakage. The caterpillar removal function is enabled by setting LODRM_EN to 1 (default value after device powered on) in the function control register. When this function is enabled, the device automatically detects the open LED, and the corresponding channel does not turn on until device reset.

10.3.7 Precharge FET

The TLC6946 internal precharge FET can prevent ghosting of multiplexed LED modules. One cause of this phenomenon is the charging current from parasitic capacitance on OUTn through the LED when the supply voltage switches from one common line to the next common line. To prevent this unwanted charging current, the TLC6946 device uses an internal FET to pull up OUTn during the common-line switching period. As a result, no charging current flows through LED and ghosting is eliminated.

10.3.8 Thermal Shutdown

The thermal shutdown (TSD) function turns off all device constant-current outputs when the junction temperature (TJ) exceeds 170°C (typ). It resumes normal operation when TJ falls below 155°C (typ).

10.3.9 IREF Resistor Short Protection (ISP)

The IREF resistor short protection (ISP) function prevents unwanted large currents from flowing though the constant-current output when the IREF resistor is shorted accidently. The TLC6946 device turns off all output channels when the IREF pin voltage is lower than 0.19 V (typ). When the IREF pin voltage goes higher than 0.325 V (typ), the TLC6946 device resumes normal operation.

10.4 Device Functional Modes

10.4.1 Normal Operating Mode

The TLC6946 device is fully functional when VCC reaches 3 V and is below 5.5 V. After power on, all OUTn of the TLC6946 device are turned off. All the internal counters and function control registers are initialized. Write the proper grayscale data and function control data to enable normal device operation.

10.4.2 Power-Save Mode (PSM)

The power-save mode (PSM) is enabled by setting PSM_EN to 1 in the function control register. When powered on, the default value of this bit is 0. When this function is enabled, if all the GS data received for the next frame are 0, then device enters power-save mode during the display of the next frame. When the device is in power-save mode, it resumes normal mode when it detects non-zero GS data input. In power-save mode, all analog circuits such as constant-current output and the LOD circuit are not operational; the device total current consumption, ICC, is below 1 mA.

validate and test their design implementation to confirm system functionality.

11.1 Application Information

11.2 Typical Application

shows a typical application diagram with TLC6946 devices connected in cascade for an LED matrix. Figure 20. Cascading Three TLC6946 Devices

11.2.1 Design Requirements

For this design example, use the following as the input parameters. Table 3. Design Parameters

11.2.1.1 Serial Data Interface

ADVANCE□INFORMATION GCLK VR SCLK FPS f m n f f N n 256 f u u u u u TLC6946 www.ti.com SLVSEB3 –JUNE 2018 Product Folder Links: TLC6946 Submit Documentation FeedbackCopyright © 2018, Texas Instruments Incorporated

11.2.1.2 SCLK and GCLK Frequency

SCLK is the serial data shift-in clock signal; and GCLK is the PWM-control reference-clock signal. Equation 3 shows the minimum frequency requirement for GCLK and SCLK. where

fGCLK is the minimum GCLK frequency for single-edge operating mode
fSCLK is the minimum SCLK frequency
m is the GCLK number of each sub-period, determined by the PWM mode selected
fVR is the visual refresh rate of the entire cascading series
N is the number of cascaded TLC6946 devices
n is the number of scan lines (3) Theoretically, there is no limitation to the maximum number of TLC6946 that can be cascaded. However, the maximum number of cascading TLC6946 devices depends on the application conditions. Usually, the number is 60 devices for driving directly, and 20 devices for driving any number of multiplexed scan lines, up to a maximum of 32.

11.2.2 Detailed Design Procedure

To begin the design process, decide on a few parameters. The designer must know the following:

The maximum LED forward voltage, V(F)
The maximum current for each color LED, IOLCmax
The number of cascaded TLC6946 devices
The number of scan lines
The function control register settings

11.2.2.1 Power Supply Voltage

The LED power supply voltage VLED must be higher than V(F) + V(KNEE). The device power supply voltage, VCC could be connected to VLED, or use a separate power rail between 3 V and 5.5 V. If using a separate power rail, the VCC voltage cannot be lower than the VLED voltage, especially for an LED matrix application with multiplexed scan lines.

11.2.2.2 Channel Current and Brightness Control

See Global Brightness Control (BC) and Select RIREF for a Given BC. Select the reference-current-setting resistor RIREF to set the maximum channel current for each color LED. Select the BC data for the best white balance of the red, green, and blue LED lamp.

11.2.3 Application Curves

Figure 21. OUTn Waveform for ES-PWM Mode (GSn = Figure 22. OUTn Waveform for ES-PWM Mode (GSn =

12 Power Supply Recommendations

to get a well-regulated LED supply voltage (VLED). VLED voltage ripple must be less than 5% of its nominal value.

13 Layout

13.1 Layout Guidelines

Place the decoupling capacitor near the VCC pin and GND plane. Place the current-programming resistor, RIREF, close to the IREF pin and the GND pin. power ground pin internally, there is a large current flow through this pad when all channels turn on. suggested thermal via pattern and via size, see PowerPAD Thermally Enhanced Package.

13.2 Layout Examples

Figure 23. SSOP-24 Package Layout Example

Figure 24. VQFN-24 Package Layout Example

14 Device and Documentation Support

14.1 Documentation Support

14.1.1 Related Documentation

For related documentation see the following:

TLC694x 16-Channel LED Driver Technical Reference Manual
Semiconductor and IC Package Thermal Metrics

14.2 Receiving Notification of Documentation Updates

To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper right corner, click on Alert me to register and receive a weekly digest of any product information that has changed. For change details, review the revision history included in any revised document.

14.3 Community Resources

The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use. TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help solve problems with fellow engineers. Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and contact information for technical support.

14.4 Trademarks

E2E is a trademark of Texas Instruments. All other trademarks are the property of their respective owners.

14.5 Electrostatic Discharge Caution

This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.

14.6 Glossary

SLYZ022 — TI Glossary. This glossary lists and explains terms, acronyms, and definitions.

15 Mechanical, Packaging, and Orderable Information

The following pages include mechanical, packaging, and orderable information. This information is the most- current data available for the designated device. This data is subject to change without notice and without revision of this document. For browser-based versions of this data sheet, see the left-hand navigation pane.

www.ti.com 30-Jun-2018 Addendum-Page 1 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead/Ball Finish (6) MSL Peak Temp (3) Op Temp (°C) Device Marking (4/5) Samples PTLC6946DBQR ACTIVE SSOP DBQ 24 2500 TBD Call TI Call TI -40 to 85 TLC6946DBQR PREVIEW SSOP DBQ 24 2500 TBD Call TI Call TI -40 to 85 (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

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Summary

16-Channel 32-Multiplexing 16-Bit ES-PWM Constant-Current LED Driver

Description