PTH12020W TI | Alldatasheet

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www.ti.com 18-A, 12-V INPUT NON-ISOLATED WIDE-OUTPUT

FEATURES

APPLICATIONS

NOMINAL SIZE = 1.5 in x 0.87 in (38,1 mm x 22,1 mm)

DESCRIPTION

SLTS208E–MAY 2003–REVISED OCTOBER 2005 ADJUST POWER MODULE

  • Point-of-Load Alliance (POLA™) Compatible
  • Up to 18 A Output Current
  • 12-V Input Voltage
  • Complex multi-voltage, multi-processor• Wide-Output Voltage Adjust (1.2 V to systems5.5 V)/(0.8 V to 1.8 V)
  • Efficiencies up to 95%
  • 195 W/in3 Power Density
  • On/Off Inhibit
  • Output Voltage Sense
  • Pre-Bias Startup
  • Under-Voltage Lockout
  • Auto-Track™ Sequencing
  • Margin Up/Down Controls
  • Output Over-Current Protection (Non-Latching, Auto-Reset)
  • Over-Temperature Protection
  • Operating Temperature: –40°Ct o8 5°C
  • Safety Agency Approvals: UL/cUL 60950, EN60950 VDE The PTH12020 series of non-isolated power modules offers OEM designers a combination of high performance, small footprint, and industry leading features. As part of a new class of power modules, these products provide designers with the flexibility to power the most complex multi-processor digital systems using off-the-shelf catalog parts. The series employs double-sided surface mount construction and provides highperformance step-down power conversion for up to 18 A of output current from a 12-V input bus voltage. The output voltage of the W-suffix parts can be set to any value over the range, 1.2 V to 5.5 V. The L-suffix parts have an adjustment range of 0.8 V to 1.8 V. The output voltage is set using a single resistor. This series includes Auto-Track™ sequencing. Auto-Track sequencing simplifies the task of supply voltage sequencing in a power system by enabling modules to track each other, or any external voltage, during power up and power down. Other operating features include an on/off inhibit, output voltage adjust (trim), margin up/down controls, and the ability to start up into an existing output voltage or prebias. For improved load regulation, an output voltage sense is provided. A non-latching over-current trip and overtemperature shutdown feature protects against load faults. Target applications include complex multivoltage, multiprocessor systems that incorporate the industry's high-speed DSPs, microprocessors and bus drivers. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. POLA, TMS320 are trademarks of Texas Instruments. PRODUCTION DATA information is current as of publication date. Copyright © 2003–2005, Texas Instruments Incorporated Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.

www.ti.com PTH12020x (Top View) 10 9 8 543 GND GND L O A D Track Margin Down Margin Up VIN Inhibit VOUT VO Sense RSET+ CIN 560 /C0109F (Required) + COUT 330 /C0109F (Optional) PTH12020W/L SLTS208E–MAY 2003–REVISED OCTOBER 2005 These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. STANDARD APPLICATION

ORDERING INFORMATION

PTH12020 (Base Part Number) Output Voltage Range Part Number (1) DESCRIPTION Pb – Free and RoHS Mechanical Package (2) PTH12020WAH Horizontal T/H Yes (3) EUK 1.2 V–5.5 V (Adjustable) PTH12020WAS Standard SMD No (4) EUL PTH12020WAZ Optional SMD Yes (3) EUL PTH12020LAH Horizontal T/H Yes (3) EUK 0.8 V–1.8 V (Adjustable) PTH12020LAS Standard SMD No (4) EUL PTH12020LAZ Optional SMD Yes (3) EUL (1) Add T to end of part number for tape and reel on SMD packages only. (2) Reference the applicable package reference drawing for the dimensions and PC board layout. (3) Lead (Pb) – freeoption specifies Sn/Ag pin solder material. (4) Standard option specifies 63/37, Sn/Pb pin solder material.

www.ti.com ABSOLUTE MAXIMUM RATINGS

ELECTRICAL CHARACTERISTICS

SLTS208E–MAY 2003–REVISED OCTOBER 2005 over operating free-air temperature range unless otherwise noted (1) UNIT Vtrack Track input –0.3V to VI +0.3 V Vinh Inhibit control input – 0 . 3Vt o7V TA Operating temperature Over V I Range –40°C to 85°C range Surface temperature of module body or pins PTH12020WAH 260 °C (2) Twave Wave solder temperature (5 seconds) PTH12020WAS 235 °C (2) Treflow Solder reflow temperature Surface temperature of module body or pins PTH12020WAZ 260 °C (2) Tso Storage temperature –40°C to 125°C Mechanical shock Per Mil-STD-883D, Method 2002.3 1 msec, 1/2 Sine, mounted 500 G Mechanical vibration Mil-STD-883D, Method 2007.2 20-2000 Hz 20 G Weight 7 grams Flammability Meets UL 94V-O (1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. (2) During soldering of package version, do not elevate peak temperature of the module, pins or internal components above the stated maximum. TA =2 5°C, VI =12 V, VO = 3.3 V, CI = 560 µF, CO =0 µF, and Io =I omax) (unless otherwise noted) PTH12020W PARAMETER TEST CONDITIONS UNIT MIN TYP MAX 60°C, 200 LFM airflow 0 18 (1) IO Output current A 25°C, natural convection 0 18 (1) Vin Input voltage range Over I o range 10.8 13.2 V Votol Set-point voltage tolerance ±2(2) %Vo ∆Regtemp Temperature variation –40 °C< TA <8 5°C ±0.5 %V o ∆Regline Line regulation Over V in range ±5 mV ∆Regload Load regulation Over I o range ±5 mV ∆Regtot Total output variation Includes set-point, line, load, –40°C ≤ TA≤ 85°C ±3(2) %Vo ∆Vadj Output voltage adjust range Over V in range 1.2 5.5 V RSET = 280 Ω,V o = 5.0 V 95% RSET =2 . 0kΩ,V o = 3.3 V 93% RSET =4 . 3 2kΩ,V o = 2.5 V 92% η Efficiency I O =1 2A RSET = 11.5 kΩ,V o = 1.8 V 90% RSET = 24.3 kΩ,V o = 1.5 V 88% RSET = open ckt., Vo = 1.2 V 86% Vo ≤ 2.5 V 32 mVpp Vr Transient response 20 MHz bandwidth Vo > 2.5 V 1 %V o Io trip Over-current threshold Reset, followed by auto-recovery 30 A ttr Recovery time 70 µSec1 A/µs load step, 50 toTransient response 100% Iomax,Cout =330 µF∆Vtr Vo over/undershoot 70 mV ∆Vomargin Margin up/down adjust ±5% IIL margin Margin input current (pins 9 /10) Pin to GND –8 (3) µA IIL track Track input current (pin 8) Pin to GND –0.13 (3) mA dVtrack/dt Track slew rate capability C out≤ Cout(max) 1V / m s (1) See SOA curves or consult factory for appropriate derating. (2) The set-point voltage tolerance is affected by the tolerance and stability of R SET. The stated limit is unconditionally met if RSET has a tolerance of 1%, with 100 ppm/°C or better temperature stability. (3) A small low-leakage (<100 nA) MOSFET is recommended to control this pin. The open-circuit voltage is less than 1 Vdc.

www.ti.com SLTS208E–MAY 2003–REVISED OCTOBER 2005 ELECTRICAL CHARACTERISTICS (continued) TA =2 5°C, VI =12 V, VO = 3.3 V, CI = 560 µF, CO =0 µF, and Io =I omax) (unless otherwise noted) PTH12020W PARAMETER TEST CONDITIONS UNIT MIN TYP MAX Vin increasing 9.7 10.4 UVLO Undervoltage lockout V Vin decreasing 8.8 9.2 Inhibit control (pin 3)VIH 2 Open (4) Input high voltage Referenced to GND V VIL Input low voltage –0.2 0.5 IIL inhibit Input low current Pin to GND 0.24 mA Iin inh Input standby current Inhibit (pin 3) to GND, Track (pin 8) open 5 mA ƒs Switching frequency Over V in and Io ranges 260 320 380 kHz CI External input capacitance 560 (5) µF Non-ceramic 0 330 (6) 9900 (7) Capacitance value µF CO External output capacitance Ceramic 0 300 Equivalent series resistance (non-ceramic) 4 (8) mΩ MTBF Reliability Per Bellcore TR-332, 50% stress, T A =4 0°C, ground benign 5.3 106 Hrs (4) This control pin is pulled up to an internal supply voltage. To avoid risk of damage to the module, do not apply an external voltage greater than 7 V. If this input is left open-circuit the module will operate when input power is applied. A small low-leakage (<100 nA) MOSFET or open-drain/collector voltage supervisor IC is recommended for control. For further information, consult the related application note. (5) A 560 µF electrolytic input capacitor is required for proper operation. The capitor must be rated for a minimum of 800 mA rms of ripple current. (6) An external output capacitor is not required for basic operation. Adding 330 µF of distributed capacitance at the load will improve the transient response. (7) This is the calculated maximum. The minimum ESR limitation will often result in a lower value. When controlling the Track pin using a voltage supervisor, the maximum output capacitance is reduced to 6600 µF. Consult the application notes for further guidance. (8) This is the typical ESR for all the electrolytic (non-ceramic) output capacitance. Use 7 m Ω as the minimum when using max-ESR values to calculate. TA =2 5°C, VI =12 V, VO = 3.3 V, CI = 560 µF, CO =0 µF, and Io =I omax) (unless otherwise noted) PTH12020L PARAMETER TEST CONDITIONS UNIT MIN TYP MAX 60°C, 200 LFM airflow 0 18 (1) IO Output current A 25°C, natural convection 0 18 (1) Vin Input voltage range Over I o range 10.8 13.2 V Votol Set-point voltage tolerance ±2 (2) %Vo ∆Regtemp Temperature variation –40°C <T A <8 5°C ±0.5 %V o ∆Regline Line regulation Over V in range ±5m V ∆Regload Load regulation Over I o range ±5m V ∆Regtot Total output variation Includes set-point, line, load, –40 °C ≤ TA≤ 85°C± 3 (2) %Vo ∆Vadj Output voltage adjust range Over V in range 0.8 1.8 V RSET = 130 Ω,V o = 1.8 V 89% RSET =3 . 5 7kΩ,V o = 1.5 V 87% η Efficiency I O =1 2A R SET = 12.1 kΩ,V o = 1.2 V 85% RSET = 32.4 kΩ,V o = 1.0 V 83% RSET = open cct., Vo = 0.8 V 80% Vr Vo ripple (pk-pk) 20 MHz bandwidth V o >2 . 5V 1 % V o Io trip Over-current threshold Reset, followed by auto-recovery 30 A ttr Recovery time 70 µSec1A /µs load step, 50 toTransient response 100% Iomax,Cout = 330 µF∆Vtr Vo over/undershoot 70 mV ∆Vomargin Margin up/down adjust ±5% (1) See SOA curves or consult factory for appropriate derating. (2) The set-point voltage tolerance is affected by the tolerance and stability of RSET. The stated limit is unconditionally met if RSET has a tolerance of 1%, with 100 ppm/°C or better temperature stability.

www.ti.com PTH12020W/L SLTS208E–MAY 2003–REVISED OCTOBER 2005 ELECTRICAL CHARACTERISTICS (continued) TA =2 5°C, VI =12 V, VO = 3.3 V, CI = 560 µF, CO =0 µF, and Io =I omax) (unless otherwise noted) PTH12020L PARAMETER TEST CONDITIONS UNIT MIN TYP MAX IIL margin Margin input current (pins 9 /10) Pin to GND –8 (3) µA IIL track Track input current (pin 8) Pin to GND –0.13(3) mA dVtrack/dt Track slew rate capability C out≤ Cout(max) 1V / m s Vin increasing 9.7 10.4 UVLO Undervoltage lockout V Vin decreasing 8.8 9.2 Inhibit control (pin 3)VIH 2 Open (4) Input high voltage Referenced to GND V VIL Input low voltage –0.2 0.5 IIL inhibit Input low current Pin to GND 0.24 mA Iin inh Input standby current Inhibit (pin 3) to GND, Track (pin 8) open 5 mA ƒs Switching frequency Over V in and Io ranges 200 250 300 kHz CI External input capacitance 560(5) µF Non-ceramic 0 330 (6) 9900 (7) Capacitance value µF CO External output capacitance Ceramic 0 300 Equivalent series resistance (non-ceramic) 4 (8) mΩ MTBF Reliability Per Bellcore TR-332, 50% stress, T A =4 0°C, ground benign 5.3 106 Hrs (3) A small low-leakage (<100 nA) MOSFET is recommended to control this pin. The open-circuit voltage is less than 1 Vdc. (4) This control pin is pulled up to an internal supply voltage. To avoid risk of damage to the module, do not apply an external voltage greater than 7 V. If this input is left open-circuit the module will operate when input power is applied. A small low-leakage (<100 nA) MOSFET or open-drain/collector voltage supervisor IC is recommended for control. For further information, consult the related application note. (5) A 560 µF electrolytic input capacitor is required for proper operation. The capitor must be rated for a minimum of 800 mA rms of ripple current. (6) An external output capacitor is not required for basic operation. Adding 330 µF of distributed capacitance at the load will improve the transient response. (7) This is the calculated maximum. The minimum ESR limitation will often result in a lower value. When controlling the Track pin using a voltage supervisor, the maximum output capacitance is reduced to 6600 µF. Consult the application notes for further guidance. (8) This is the typical ESR for all the electrolytic (non-ceramic) output capacitance. Use 7 m Ω as the minimum when using max-ESR values to calculate.

400 LFM

200 LFM

100 LFM

Figure 1. Figure 2. Figure 3. Figure 4. Figure 5. Figure 6. converter. Applies to Figure 1, Figure 2, and Figure 3. pins. Please refer to the mechanical specification for more information. Applies to Figure 4, Figure 5 and Figure 6.

Figure 7. Figure 8. Figure 9. converter. Applies to Figure 7, Figure 8, and Figure 9. pins. Please refer to the mechanical specification for more information. Applies to Figure 10.

www.ti.com DEVICE INFORMATION PTHXX020 (Top View) 10 9 8 543 PTH12020W/L SLTS208E–MAY 2003–REVISED OCTOBER 2005 TERMINAL FUNCTIONS TERMINAL NAME NO. VI 2 The positive input voltage power node to the module, which is referenced to common GND. VO 6 The regulated positive power output with respect to the GND node. This is the common ground connection for the Vin and Vout power connections. It is also the 0 VDC reference for theGND 1, 7 control inputs. The Inhibit pin is an open-collector/drain negative logic input that is referenced to GND. Applying a lowlevel ground signal to this input disables the module’s output and turns off the output voltage. When the Inhibit control is active, theInhibit 3 input current drawn by the regulator is significantly reduced. If the inhibit feature is not used, the control pin should be left open-circuit. The module will then produce an output whenever a valid input source is applied. A 1% resistor must be connected directly between this pin and GND (pin 7) to set the output voltage of the module higher than its lowest value. The temperature stability of the resistor should be 100 ppm/ °C (or better). The set point lowest value. For further information on output voltage adjustment consult the related application note. The specification table gives the preferred resistor values for a number of standard output voltages. VO The sense input allows the regulation circuit to compensate for voltage drop between the module and the load. For5Sense optimal voltage accuracy V o Sense should be connected to Vout. It can also be left disconnected. This is an analog control input that enables the output voltage to follow an external voltage. This pin becomes active typically 20 ms after the input voltage has been applied, and allows direct control of the output voltage from 0 V up to the nominal set-point voltage. Within this range the output will follow the voltage at the Track pin on a volt-for-volt basis. When the control voltage is raised above this range, the module regulates at its set-point voltage. The feature allows Track 8 the output voltage to rise simultaneously with other modules powered from the same input bus. If unused this input should be connected to Vin. NOTE: Due to the under-voltage lockout feature, the output of the module cannot follow its own input voltage during power up. For more information, consult the related application note.

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APPLICATION INFORMATION

Capacitor Recommendations for the PTH12020 Series of Power Modules Input Capacitor Output Capacitors (Optional) Ceramic Capacitor Tantalum Capacitors Capacitor Table PTH12020W/L SLTS208E–MAY 2003–REVISED OCTOBER 2005 The recommended input capacitance is determined by the 560 µF minimum capacitance and 800 mArms minimum ripple current rating. Ripple current, less than 100 m Ω equivalent series resistance (ESR), and temperature are major considerations when selecting input capacitors. Unlike polymer-tantalum capacitors, regular tantalum capacitors are not recommended for the input bus. These capacitors require a recommended minimum voltage rating of 2 × ~ (maximum DC voltage + AC ripple). This is standard practice to ensure reliability. There were no tantalum capacitors, with sufficient voltage rating, found to meet this requirement. When the operating temperature is below 0 °C, the ESR of aluminum electrolytic capacitors increases. For these applications Os-Con, polymer-tantalum, and polymer-aluminum types should be considered. Adding a 10-µF ceramic capacitor to the input will reduce the ripple current reflected into the input source. For applications with load transients, the regulator response will benefit from external output capacitance. The recommended output capacitance of 330 µF will allow the module to meet its transient response specification (see product data sheet). For most applications, a high quality computer-grade aluminum electrolytic capacitor is adequate. These capacitors provide decoupling over the frequency range, 2 kHz to 150 kHz, and are suitable when ambient temperatures are above 0 °C. For operation below 0 °C, tantalum, ceramic, or Os-Con type capacitors are recommended. When using one or more non-ceramic capacitors, the calculated equivalent ESR should be no lower than 4 m Ω (7 mΩ using the manufacturer's maximum ESR for a single capacitor). A list of preferred low-ESR type capacitors are identified in Table 1. Above 150 kHz the performance of aluminum electrolytic capacitors is less effective. Multilayer ceramic capacitors have very low ESR and a resonant frequency higher than the bandwidth of the regulator. They can be used to reduce the reflected ripple current at the input as well as improve the transient response of the output. When used on the output their combined ESR is not critical as long as the total value of ceramic capacitance does not exceed 300 µF. Also, to prevent the formation of local resonances, do not place more than five identical ceramic capacitors in parallel with values of 10 µF or greater. Tantalum type capacitors can only be used on the output bus, and are recommended for applications where the ambient operating temperature can be less than 0 °C. The AVX TPS, Sprague 593D/594/595 and Kemet T495/T510 capacitor series are suggested over many other tantalum types due to their higher rated surge, power dissipation, and ripple current capability. As a caution many general purpose tantalum capacitors have considerably higher ESR, reduced power dissipation and lower ripple current capability. These capacitors are also less reliable as they have reduced power dissipation and surge current ratings. Tantalum capacitors that have no stated ESR or surge current rating are not recommended for power applications. When specifying Os-con and polymer tantalum capacitors for the output, the minimum ESR limit will be encountered well before the maximum capacitance value is reached. Table 1 identifies the characteristics of capacitors from a number of vendors with acceptable ESR and ripple current (rms) ratings. The recommended number of capacitors required at both the input and output buses is identified for each capacitor type. This is not an extensive capacitor list. Capacitors from other vendors are available with comparable specifications. Those listed are for guidance. The RMS ripple current rating and ESR (at 100 kHz) are critical parameters necessary to insure both optimum regulator performance and long capacitor life.

Table 1. Input/Output Capacitors (1)

16 V 47 3225 mm 1 (4) ≤5 GRM32ER61C476K

16 V 22 1 (4) ≤5 GRM32ER61C226K

16 V 10 1 (4) ≤5 GRM32DR61C106K

6.3 V 47 3225 mm N/R (2) ≤5 C3225X5R0J476MT

16 V 22 1 (4) ≤5 C3225X5R1C226MT

16 V 10 1 (4) ≤5 C3225X5R1C106MT

consideration for obsolescence. (2) N/R – Not recommended. The voltage rating does not meet the minimum operating limits. (3) Total capacitance of 540 µF is acceptable based on the combined ripple current rating. (4) Ceramic capacitors may be used to complement electrolytic types at the input to further reduce high-frequency ripple current.

capacitance is above 3000 µF, the selection of output capacitors becomes more important. Table 2. Preferred Values of Rset for Standard Output Voltages range of values given in Table 4 . The equation below may be used for calculating the adjust resistor value. Select the appropriate value for the parameters, R s and Vmin, from Table 3. Table 3. Adjust Formula Parameters

the stability of the regulator. Figure 11. Vo Adjust Resistor Placement Table 4. Output Voltage Set-Point Resistor Values

Table 4. Output Voltage Set-Point Resistor Values (continued) assured to be interoperable, thereby providing customers with true second-source availability. provides a quick reference to the features by product series and input bus voltage. Table 5. Operating Features by Series and Input Bus Voltage

0.1 W, 1 %

and PTH12030 (26 A) products incorporate overtemperature shutdown protection. The Auto-Track feature allows the power-up of multiple PTH modules to be directly controlled from the Track pin. Figure 12. Power-Up Application Circuit under soft-start control, the output voltage rises to the set-point at a quicker and more linear rate. Figure 13. Power-Up Waveforms

Figure 15. Power-Up from Inhibit Control family, microprocessors, and ASICs. output does not go higher than 2.5 V.

  1. Adjustments of less than 5% can also be accommodated by adding series resistors to the control

inputs. The value of the resistor can be selected from Table 6, or calculated using the formula in Equation 2.

  1. The Margin Up and Margin Dn controls were not intended to be activated simultaneously. If they are their

the output voltage set point.

  1. The ground reference should be a direct connection to the module GND at pin 7 (pin 1 for the PTHxx050).

be located close to the regulator.

  1. The Margin Up and Margin Dn control inputs are not compatible with devices that source voltage. This

(preferably a discrete MOSFET transistor). The device selected should have low off-state leakage current. Each input sources 8 µA when grounded, and has an open-circuit voltage of 0.8 V. Figure 19). For the same amount of adjustment, the resistor value calculated for RU and RD will be the same. The formula is shown in Equation 2. Where ∆% = The desired amount of margin adjust in percent. Table 6. Margin Up/Down Resistor Values Figure 19. Margin Up/Down Application Schematic

www.ti.com Pre-Bias Startup Capability Conditions for Pre-Bias Holdoff PTH12020W/L SLTS208E–MAY 2003–REVISED OCTOBER 2005 The capability to start up into an output pre-bias condition is now available to all the 12-V input, PTH series of power modules. (Note that this is a feature enhancement for the many of the W-suffix products) 1. A pre-bias startup condition occurs as a result of an external voltage being present at the output of a power module prior to its output becoming active. This often occurs in complex digital systems when current from another power source is backfed through a dual-supply logic component, such as an FPGA or ASIC. Another path might be via clamp diodes, sometimes used as part of a dual-supply power-up sequencing arrangement. A prebias can cause problems with power modules that incorporate synchronous rectifiers. This is because under most operating conditions, such modules can sink as well as source output current. The 12-V input PTH modules all incorporate synchronous rectifiers, but will not sink current during startup, or whenever the Inhibit pin is held low. Startup includes an initial delay (approximately 8–15 ms), followed by the rise of the output voltage under the control of the module's internal soft-start mechanism; see Figure 20. In order for the module to allow an output pre-bias voltage to exist (and not sink current), certain conditions must be maintained. The module holds off a pre-bias voltage when the Inhibit pin is held low, and whenver the output is allowed to rise under soft-start control. Power up under soft-start control occurs upon the removal of the ground signal to the Inhibit pin (with input voltage applied), or when input power is applied with Auto-Track disabled 2. To further ensure that the regulator does not sink output current, (even with a ground signal applied to its Inhibit), the input voltage must always be greater than the applied pre-bias source. This condition must exist throughout the power-up sequence3. The soft-start period is complete when the output begins rising above the pre-bias voltage. Once it is complete the module functions as normal, and will sink current if a voltage higher than the nominal regulation value is applied to its output. Note: If a pre-bias condition is not present, the soft-start period will be complete when the output voltage has risen to either the set-point voltage, or the voltage applied at the module's Track control pin, whichever is lowest. to its output.

Figure 22. Application Circuit Demonstrating Pre-Bias Startup between the pin and and the output node, ensures the output remains in regulation. pins, and that measured from Vo Sense to GND, is the amount of IR drop being compensated by the regulator. This should be limited to a maximum of 0.3 V.

www.ti.com TAPE AND REEL SPECIFICATIONS TRAY SPECIFICATIONS PTH12020W/L SLTS208E–MAY 2003–REVISED OCTOBER 2005

Orderable Device Status(1) Package Type Package Drawing Pins Package Qty Eco Plan(2) Lead/Ball FinishMSL Peak Temp (3) PTH12020LAH ACTIVE DIP MOD ULE EUK 10 20 TBD Call TI Level-1-235C-UNLIM PTH12020LAS ACTIVE DIP MOD ULE EUL 10 20 TBD Call TI Level-1-235C-UNLIM PTH12020LAST ACTIVE DIP MOD ULE EUL 10 200 TBD Call TI Level-1-235C-UNLIM PTH12020LAZ ACTIVE DIP MOD ULE EUL 10 20 Pb-Free (RoHS) Call TI Level-3-260C-168 HR PTH12020LAZT ACTIVE DIP MOD ULE EUL 10 200 Pb-Free (RoHS) Call TI Level-3-260C-168 HR PTH12020WAD ACTIVE DIP MOD ULE EUK 10 20 Pb-Free (RoHS) Call TI Level-NC-NC-NC PTH12020WAH ACTIVE DIP MOD ULE EUK 10 20 TBD Call TI Level-1-235C-UNLIM PTH12020WAS ACTIVE DIP MOD ULE EUL 10 20 TBD Call TI Level-1-235C-UNLIM PTH12020WAST ACTIVE DIP MOD ULE EUL 10 200 TBD Call TI Level-1-235C-UNLIM PTH12020WAZ ACTIVE DIP MOD ULE EUL 10 20 Pb-Free (RoHS) Call TI Level-3-260C-168 HR PTH12020WAZT ACTIVE DIP MOD ULE EUL 10 200 Pb-Free (RoHS) Call TI Level-3-260C-168 HR (1)The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS) or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontentfor the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS):TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Green (RoHS & no Sb/Br):TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. PACKAGE OPTION ADDENDUM www.ti.com 26-Oct-2005 Addendum-Page 1

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