PTH12010Y TI | Alldatasheet

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www.ti.com 15-A NON-ISOLATED DDR/QDR

FEATURES

(34,8 mm x 15,75 mm) 1.37 in x 0.62 in Nominal Size

DESCRIPTION

Low−ESR (Required) CIN (Required) VTT Termination Island 1 k 1 % 1 k 1 % V DDQ SSTL−2 Bus Co2 Ceramic (Optional)Q1BSS138 (Optional) Con hf−Ceramic PTHxx010Y (Top View) 10 9 8 543 CIN = Required Capacitor; 470 µF (3.3 ± 5 V Input), 560 µF (12 V Input). Co1 = Required Low-ESR Electrolyitic Capacitor; 470 µF (3.3 ± 5 V Input), 940 µF (12 V Input). Co2 = Ceramic Capacitance for Optimum Response to a 3 A ( ± 1.5 A) Load Transient; 200 µF (3.3 ± 5 V Input), 400 µF (12 V Input). Con = Distributed hf-Ceramic Decoupling Capacitors for V TT bus; as Recommended for DDR Memory Applications. PTH03010Y PTH05010Y PTH12010Y SLTS223A–MARCH 2004–REVISED OCTOBER 2005 MEMORY BUS TERMINATION MODULES

  • Efficiencies up to 91%
  • VTT Bus Termination Output • Output Overcurrent Protection (Output Tracks the System VREF) (Nonlatching, Auto-Reset)
  • 15 A Output Current (12 A for 12-V Input) • 62 W/in3 Power Density
  • 3.3-V, 5-V or 12-V Input Voltage • Safety Agency Approvals UL/cUL60950, EN60950, VDE• DDR and QDR Compatible
  • On/Off Inhibit (for VTT Standby) • Point-of-Load Alliance (POLA™) Compatible
  • Undervoltage Lockout
  • Operating Temperature: –40°Ct o8 5°C The PTHxx010Y are a series of ready-to-use switching regulator modules from Texas Instruments designed specifically for bus termination in DDR and QDR memory applications. Operating from either a 3.3-V, 5-V or 12-V input, the modules generate a V TT output that will source or sink up to 15 A of current (12 A for 12-V input) to accurately track their V REF input. VTT is the required bus termination supply voltage, and V REF is the reference voltage for the memory and chipset bus receiver comparators. V REF is usually set to half the V DDQ power supply voltage. Both the PTHxx010Y series employs an actively switched synchronous rectifier output to provide state-of-the-art stepdown switching conversion. The products are small in size (1.37 in × 0.62 in), and are an ideal choice where space, performance, and high efficiency are desired, along with the convenience of a ready-to-use module. Operating features include an on/off inhibit and output over-current protection (source mode only). The on/off inhibit feature allows the V TT bus to be turned off to save power in a standby mode of operation. To ensure tight load regulation, an output remote sense is also provided. Package options include both throughhole and surface mount configurations. STANDARD APPLICATION Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. POLA is a trademark of Texas Instruments. PRODUCTION DATA information is current as of publication date. Copyright © 2004–2005, Texas Instruments Incorporated Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.

www.ti.com ENVIRONMENTAL AND ABSOLUTE MAXIMUM RATINGS PTH03010Y PTH05010Y PTH12010Y SLTS223A–MARCH 2004–REVISED OCTOBER 2005

ORDERING INFORMATION

PTHXX010Y (Base Part Number) Input Voltage Part Number (1) DESCRIPTION Pb – free and Mechanical Package RoHS (2) PTH03010YAH Horizontal T/H Yes (3) EUH

3.3 V PTH03010YAS Standard SMD No (4) EUJ

PTH03010YAZ Optional SMD Yes (3) EUJ PTH05010YAH Horizontal T/H Yes (3) EUH

5 V PTH05010YAS Standard SMD No (4) EUJ

PTH05010YAZ Optional SMD Yes (3) EUJ PTH12010YAH Horizontal T/H Yes (3) EUH

12 V PTH12010YAS Standard SMD No (4) EUJ

PTH12010YAZ Optional SMD Yes (3) EUJ (1) Add T to end of part number for tape and reel on SMD packages only. (2) Reference the applicable package reference drawing for the dimensions and PC board layout. (3) Lead (Pb) –freeoption specifies Sn/Ag pin solder material. (4) Standard option specifies 63/37, Sn/Pb pin solder material. voltages are with respect to GND UNIT VREF Control input voltage –0.3 V to Vin+03 V TA Operating temperature Over V IN range –40 °Ct o8 5°C(1) range Twave Wave solder temperature Surface temperature of module body or pins PTHXX010YAH 260 °C (2) (5 seconds) PTHXX010YAS 235 °C (2) Treflow Solder reflow temperature Surface temperature of module body or pins PTHXX010YAZ 260 °C (2) Ts Storage temperature –40°C to 125°C Mechanical shock Per Mil-STD-883D, Method 2002.3 1 msec, 1/2 Sine, mounted 500 G Mechanical vibration Mil-STD-883D, Method 2007.2 20-2000 Hz 20 G Weight 3.7 grams Flammability Meets UL 94V-O (1) For operation below 0 °C the external capacitors must bave stable characteristics, use either a low ESR tantalum, Os-Con, or ceramic capacitor. (2) During soldering of package version, do not elevate peak temperature of the module, pins or internal components above the stated maximum.

www.ti.com ELECTRICAL SPECIFICATIONS PTH03010Y PTH05010Y PTH12010Y SLTS223A–MARCH 2004–REVISED OCTOBER 2005 TA =2 5°C; nominal VIN;V REF =1 . 2 5V ;CIN,C O1, and CO2 = typical values; and IO =I Omax (unless otherwise stated) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT PTH03010Y/PTH05010Y 0 ±15(1) A IO Output current Over ∆VREF range PTH12010Y ±12(1) PTH03010Y 2.95 3.65 VIN Input voltage range Over I O range PTH05010Y 4.5 5.5 V PTH12010Y 10.8 13.2 ∆VREF Tracking range for VREF 0.55 1.8 V |VTT–V REF| Tracking tolerance to V REF Over line, load and temperature –10 10 mV PTH03010Y 88% η Efficiency I o = 10 A PTH05010Y 88% PTH12010Y 85% Vr Vo Ripple (pk-pk) 20 MHz bandwidth 20 mVpp Reset, followed by auto recovery PTH03010Y/PTH05010Y 27.5 Io trip Overcurrent threshold A PTH12010Y 20 ttr Recovery time 30 µsec15 A/µs load step, from –1.5 A toLoad transient response 1.5 AVtr VO over/undershoot 30 40 mV PTH03010Y 2.45 2.8 VIN Increasing PTH05010Y 4.3 4.45 V PTH12010Y 9.5 10.4 UVLO Under-voltage lockout PTH03010Y 2.0 2.40 VIN Dncreasing PTH05010Y 3.4 3.7 V PTH12010Y 8.8 9 Inhibit control (pin 4) VIN–0.5 Open (2) VIH VInput high voltage Referenced to GND Inhibit control (pin 4) –0.2 0.6VIL VInput low voltage Inhibit control (pin 4)IIL inhibit Pin to GND 130 µAInput low curent IIN inh Input standby current Inhibit (pin 3) to GND 10 mA PTH03010Y/PTH05010Y 250 300 350 f s Switching frequency Over V IN and IO ranges kHz PTH12010Y 200 250 300 PTH03010Y/PTH05010Y 470 (3) CIN External input capacitance µF PTH12010Y 560 (3) PTH03010Y/PTH05010Y 470 (4) 8200(5) Capacitance value: Nonceramic µF PTH12010Y 940 (4) 6600(5) CO1, CO2 External output capacitance PTH03010Y/PTH05010Y 200 (4) 300 Capacitance value: Ceramic µF PTH12010Y 400 (4) 600 Equiv. series resistance (non-ceramic) 4 (6) mΩ MTBF Reliability Per Bellcore TR-332 50 % stress, T A =4 0°C, ground benign 6 106 Hrs (1) Rating is conditional on the module being directly soldered to a 4-layer PCB with 1 oz. copper. See the SOA curves or contact the factory for appropriate derating. (2) This control pin has an internal pull-up to the input voltage V IN. If it is left open-circuit the module will operate when input power is applied. A small low-leakage (<100 nA) MOSFET is recommended for control. For further information, consult the related application note. (3) An input capacitor is required for proper operation. The capacitor must be rated for a minimum a minimum of 500 mA rms( 750 mA rms for 12-V input) of ripple current. (4) The minimum value of external output capacitance value ensures that V TT meets the specified transient performance requirements for the memory bus terminations. Lower values of capacitance may be possible when the measured peak change in output current is consistently less than 3 A. (5) This is the calculated maximum. The minimum ESR limitation will often result in a lower value. Consult the application notes for further guidance. (6) This is the typcial ESR for all the electrolytic (non-ceramic) output capacitance. Use 7 m Ω as the minimum when using max-ESR values to calculate.

www.ti.com PTHXX010 (Top View) 10 9 8 543 PTH03010Y PTH05010Y PTH12010Y SLTS223A–MARCH 2004–REVISED OCTOBER 2005 Terminal Functions TERMINAL NAME NO. VIN 2 The positive input voltage power node to the module, which is referenced to common GND. This is the common ground connection for the V IN and VTT power connections. It is also the 0-VDC referenceGND 1, 7 for the control inputs. The module senses the voltage at this input to regulate the output voltage, V TT. The voltage at VREF is also the reference voltage for the system bus receiver comparators. It is normally set to precisely half the bus VREF 8 driver supply voltage (V DDQ÷ 2), using a resistor divider. The Thevenin impedance of the network driving the VREF pin should not exceed 500 Ω. See the Typical DDR Application Diagram in the Application Information section for reference. This is the regulated power output from the module with respect to the GND node, and the tracking termination supply for the application data and address buses. It is precisely regulated to the voltage appliedVTT 6 to the module's VREF input, and is active active about 20 ms after a valid input source is applied to the module. Once active it will track the voltage applied at V REF. The sense input allows the regulation circuit to compensate for voltage drop between the module and theVo Sense 5 load. For optimal voltage accuracy Vo Sense should be connected to VTT. The Inhibit pin is an open-collector/drain negative logic input that is referenced to GND. Applying a low-level ground signal to this input turns off the output voltage, V TT. Although the module is inhibited, a voltage, V DDQ will be present at the output terminals, fed through the DDR memory. When the Inhibit is active, the inputInhibit 3 current drawn by the regulator is significantly reduced. If the Inhibit pin is left open circuit, the module will produce an output whenever a valid input source is applied. See the Typical DDR Application Diagram in the Application Information section for reference. N/C 4, 9, 10 No connection

400 LFM

200 LFM

100 LFM

Figure 1. Figure 2. Figure 3. Figure 4. Figure 5. converter. Applies to Figure 1, Figure 2, and Figure 3. pins. Please refer to the mechanical specification for more information. Applies to Figure 4, and Figure 5.

Figure 6. Figure 7.

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APPLICATION INFORMATION

Typical DDR Application Diagram Inhibit ++ DDRII/ QDRII PTH05010W VDDQ I/O Memory Inhibit + PTH05050Y DDR Termination 2 × 330 µF 2 × 22 µF 2 × 330 µF 2 × 22 µF +SenseMargin ±Auto-Track VI +VADJ 1 kΩ 1 kΩ VI= 5V 220 µF 47 µF 470 µF 47 µF 5.51 kΩ VO +VREF VI UDG−05096 VTT VTT = 0.9 V VDDQ = 1.8 V CAPACITOR RECOMMENDATIONS FOR THE PTH03010Y AND PTH05010Y DDR POWER Input Capacitor Output Capacitors PTH03010Y PTH05010Y PTH12010Y SLTS223A–MARCH 2004–REVISED OCTOBER 2005 MODULES (3.3-V/5-V OPTION) The recommended input capacitor(s) is determined by the 470 µF minimum capacitance and 500 mArms minimum ripple current rating. Ripple current, less than 160 m Ω equivalent series resistance (ESR), and temperature are the major considerations when selecting input capacitors. Unlike polymer tantalum, regular tantalum capacitors have a recommended minimum voltage rating of 2 × (maximum dc voltage + ac ripple). This is standard practice to ensure reliability. For improved ripple reduction on the input bus, ceramic capacitors may used to complement electrolytic types to achieve the minimum required capacitance. For applications with load transients (sudden changes in load current), regulator response benefits from external output capacitance. The recommended output capacitance of 470 µF will allow the modue to meet its transieint response specification. (See Electrical Specifications table). For most applications, a high quality computer-grade aluminum electrolytic capacitor is adequate. These capacitors provide decoupling over the frequency range, 2 kHz to 150 kHz, and are suitable for ambient temperatures above 0 °C. Below 0 °C, tantalum, ceramic or Os-Con type capacitors are recommended. When using one or more nonceramic capacitors, the calculated equivalent ESR should be no lower than 4 m Ω (7 mΩ using the manufacturer’s maximum ESR for a single capacitor). A list of preferred low-ESR type capacitors are identified in Table 1. In addition to electrolytic capacitance, adding a 10-µF to 22- µF X5R/X7R ceramic capacitor to the output reduces the output ripple voltage and improve the regulator’s transient response. The measurement of both the output ripple and transient response is also best achieved across a 10-µF ceramic capacitor.

the reflected input ripple current or the output transient response, multilayer ceramic capacitors can be added. five identical ceramic capacitors in parallel with values of 10 µF or greater. have a stated ESR or surge current rating are not recommended for power applications. before the maximum capacitance value is reached. identified for each capacitor type. parameters necessary to ensure both optimum regulator performance and long capacitor life. Table 1. Input/Output Capacitors consideration for obsolescence.

Table 1. Input/Output Capacitors (continued) (2) A total capacitance of 360 µF is acceptable based on the combined ripple current rating. (3) N/R –Not recommended. The capacitor voltage rating does not meet the minimum derated operating limits. (4) A ceramic capacitor is recoommended to compliment electrolytic types at the input to further reduce high-frequency ripple current. capacitance is above 8200 µF, the selection of output capacitors becomes more important.

www.ti.com CAPACITOR RECOMMENDATIONS FOR THE PTH12010Y DDR POWER MODULES INPUT CAPACITOR OUTPUT CAPACITORS CERAMIC CAPACITORS TANTALUM CAPACITORS CAPACITOR TABLE PTH03010Y PTH05010Y PTH12010Y SLTS223A–MARCH 2004–REVISED OCTOBER 2005 (12-V OPTION) The recommended input capacitance is determined by the 560 µF minimum capacitance and 750 mArms minimum ripple current rating. A 10-µF X5R/X7R ceramic capacitor may also be added to reduce the reflected input ripple current. The ceramic capacitor should be located between the input electrolytic and the module. Ripple current, less than 100 m Ω equivalent series resistance (ESR) and temperature are major considerations when selecting input capacitors. Unlike polymer-tantalum capacitors, regular tantalum capacitors have a recommended minimum voltage rating of 2 × (max dc voltage + ac ripple). This is standard practice to ensure reliability. No tantalum capacitors were found with sufficient voltage rating to meet this requirement. At temperatures below 0°C, the ESR of aluminum electrolytic capacitors increases. For these applications, Os-Con, polymer-tantalum, and polymer-aluminum types should be considered. For applications with load transients (sudden changes in load current), regulator response benefits from external output capacitance. The recommended output capacitance of 940 µF will allow the modue to meet its transieint response specification. (See Electrical Specifications table). For most applications, a high quality computer-grade aluminum electrolytic capacitor is adequate. These capacitors provide decoupling over the frequency range, 2 kHz to 150 kHz, and are suitable for ambient temperatures above 0 °C. Below 0 °C, tantalum, ceramic or Os-Con type capacitors are recommended. When using one or more nonceramic capacitors, the calculated equivalent ESR should be no lower than 4 m Ω (7 mΩ using the manufacturer’s maximum ESR for a single capacitor). A list of preferred low-ESR type capacitors are identified in Table 2. In addition to electrolytic capacitance, adding a 10-µF to 22- µF X5R/X7R ceramic capacitor to the output reduces the output ripple voltage and improve the regulator’s transient response. The measurement of both the output ripple and transient response is also best achieved across a 10-µF ceramic capacitor. Above 150 kHz the performance of aluminum electrolytic capacitors is less effective. Multilayer ceramic capacitors have very low ESR and a resonant frequency higher than the bandwidth of the regulator. They can be used to reduce the reflected ripple current at the input as well as improve the transient response of the output. When used on the output, their combined ESR is not critical as long as the total value of ceramic capacitance does not exceed 300 µF. Also, to prevent the formation of local resonances, do not place more than five identical ceramic capacitors in parallel with values of 10 µF or greater. Tantalum type capacitors are most suited for use on the output bus, and are recommended for applications where the ambient operating temperature can be less than 0 °C. The AVX TPS, Sprague 593D/594/595 and Kemet T495/T510 capacitor series are suggested over other tantalum types due to their higher rated surge, power dissipation, and ripple current capability. As a caution, many general purpose tantalum capacitors have considerably higher ESR, reduced power dissipation and lower ripple current capability. These capacitors are also less reliable as they have lower power dissipation and surge current ratings. Tantalum capacitors that do not have a stated ESR or surge current rating are not recommended for power applications. When specifying Os-con and polymer tantalum capacitors for the output, the minimum ESR limit are encountered well before the maximum capacitance value is reached. Table 2 identifies the characteristics of capacitors from a number of vendors with acceptable ESR and ripple current (rms) ratings. The recommended number of capacitors required at both the input and output buses is identified for each capacitor type. This is not an extensive capacitor list. Capacitors from other vendors are available with comparable specifications. Those listed are for guidance. The RMS ripple current rating and ESR (at 100 kHz) are critical parameters necessary to insure both optimum regulator performance and long capacitor life.

Table 2. Input/Output Capacitors (1)

16 V 47 3225 mm 1 (5) ≤5 GRM32ER61CJ476K

16 V 22 1 (5) ≤5 GRM32ER61C226K

16 V 10 1 (5) ≤5 GRM32DR61C106K

6.3 V 47 3225 mm N/R (2) ≤5 C3225X5R0J476MT

16 V 22 1 (5) ≤5 C3225X5R1C226MT

16 V 10 1 (5) ≤5 C3225X5R1C106MT

consideration for obsolescence. (2) N/R –Not recommended. The capacitor voltage rating does not meet the minimum derated operating limits. (3) The voltage rating of this capacitor only allows it to be used for output voltages that are equal to or less than 5.1 V. (4) A total capacitance of 540 µF is acceptable based on the combined ripple current rating. (5) A ceramic capacitor can be used to complement electrolytic types at the input further reduce high-frequency ripple current.

www.ti.com DESIGNING FOR VERY FAST LOAD TRANSIENTS PTH03010Y PTH05010Y PTH12010Y SLTS223A–MARCH 2004–REVISED OCTOBER 2005 The transient response of the DC/DC converter has been characterized using a load transient with a di/dt of 1 A/µs. The typical voltage deviation for this load transient is given in the data sheet specification table using the optional value of output capacitance. As the di/dt of a transient is increased, the response of a converter’s regulation circuit ultimately depends on its output capacitor decoupling network. This is an inherent limitation with any dc/dc converter once the speed of the transient exceeds its bandwidth capability. If the target application specifies a higher di/dt or lower voltage deviation, the requirement can only be met with additional output capacitor decoupling. In these cases special attention must be paid to the type, value and ESR of the capacitors selected. If the transient performance requirements exceed that specified in the data sheet, or the total amount of load capacitance is above 6600 µF, the selection of output capacitors becomes more important.

www.ti.com TAPE AND REEL SPECIFICATION TRAY SPECIFICATION PTH03010Y PTH05010Y PTH12010Y SLTS223A–MARCH 2004–REVISED OCTOBER 2005

www.ti.com 2-Jun-2025 PACKAGING INFORMATION Orderable part number Status (1) Material type (2) Package | Pins Package qty | Carrier RoHS (3) Lead finish/ Ball material (4) MSL rating/ Peak reflow (5) Op temp (°C) Part marking (6) PTH03010YAD Active Production Through-Hole Module (EUH) | 10 25 | TIW TRAY In-Work SN N/A for Pkg Type -40 to 85 PTH03010YAD.B Active Production Through-Hole Module (EUH) | 10 25 | TIW TRAY In-Work SN N/A for Pkg Type -40 to 85 PTH05010YAZ Active Production Surface Mount Module (EUJ) | 10 25 | TIW TRAY In-Work SNAGCU Level-3-260C-168 HR -40 to 85 PTH05010YAZ.B Active Production Surface Mount Module (EUJ) | 10 25 | TIW TRAY In-Work SNAGCU Level-3-260C-168 HR -40 to 85 PTH12010YAH Active Production Through-Hole Module (EUH) | 10 25 | TIW TRAY Exempt SN N/A for Pkg Type -40 to 85 PTH12010YAST Active Production Surface Mount Module (EUJ) | 10 250 | SMALL T&R No SNPB Level-1-235C-UNLIM/ Level-3-260C-168HRS -40 to 85 PTH12010YAST.B Active Production Surface Mount Module (EUJ) | 10 250 | SMALL T&R No SNPB Level-1-235C-UNLIM/ Level-3-260C-168HRS -40 to 85 PTH12010YAZ Active Production Surface Mount Module (EUJ) | 10 25 | TIW TRAY Exempt SNAGCU Level-3-260C-168 HR -40 to 85 PTH12010YAZ.B Active Production Surface Mount Module (EUJ) | 10 25 | TIW TRAY Exempt SNAGCU Level-3-260C-168 HR -40 to 85 (1) Status: For more details on status, see our product life cycle. (2) Material type: When designated, preproduction parts are prototypes/experimental devices, and are not yet approved or released for full production. Testing and final process, including without limitation quality assurance, reliability performance testing, and/or process qualification, may not yet be complete, and this item is subject to further changes or possible discontinuation. If available for ordering, purchases will be subject to an additional waiver at checkout, and are intended for early internal evaluation purposes only. These items are sold without warranties of any kind. (3) RoHS values: Yes, No, RoHS Exempt. See the TI RoHS Statement for additional information and value definition. (4) Lead finish/Ball material: Parts may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two lines if the finish value exceeds the maximum column width. (5) MSL rating/Peak reflow: The moisture sensitivity level ratings and peak solder (reflow) temperatures. In the event that a part has multiple moisture sensitivity ratings, only the lowest level per JEDEC standards is shown. Refer to the shipping label for the actual reflow temperature that will be used to mount the part to the printed circuit board. Addendum-Page 1

www.ti.com 2-Jun-2025 (6) Part marking: There may be an additional marking, which relates to the logo, the lot trace code information, or the environmental category of the part. Multiple part markings will be inside parentheses. Only one part marking contained in parentheses and separated by a "~" will appear on a part. If a line is indented then it is a continuation of the previous line and the two combined represent the entire part marking for that device. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 2

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