PTH12010W TI | Alldatasheet
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www.ti.com 12-A, 12-V INPUT NON-ISOLATED WIDE-OUTPUT
FEATURES
APPLICATIONS
(34,8□mm□x□15,75□mm)
DESCRIPTION
Multivoltage, Multiprocessor Up to 12-A Output Current Systems 12-V Input Voltage Wide-Output Voltage Adjust (1.2 V to 5.5 V)/(0.8 V to 1.8 Efficiencies up to 94% 200 W/in Power Density On/Off Inhibit Output Voltage Sense Prebias Startup Undervoltage Lockout Auto-Track Sequencing Margin Up/Down Controls Output Overcurrent Protection (Nonlatching, Auto-Reset) Operating Temperature: C to C Safety Agency Approvals: UL/IEC/CSA-22.2 60950-1 Point of Load Alliance (POLA Compatible The PTH12010 series of non-isolated power modules that are small in size but big on performance and flexibility. The high output current, compact footprint, and industry-leading a versatile module for powering complex multi-processor digital systems. The series employs double-sided surface mount construction and provides high-performance step-down power conversion for up to A of output current. The output voltage of the W-suffix parts can be set to any value over the range, 1.2 V to 5.5 The L-suffix devices have an adjustment range of 0.8 V to 1.8 The output voltage is set using a single external resistor. This series includes Auto-Track sequencing. Auto-Track simplifies the task of supply voltage sequencing in a power system by enabling modules to track each other, or any external voltage, during power up and power down. Other operating inhibit, output voltage adjust (trim), margin up/down controls, and the ability to start up into an existing output voltage or prebias. For improved load regulation, an output voltage sense is also provided. A nonlatching overcurrent trip serves as load fault protection. Target multivoltage, multiprocessor systems that incorporate the industry s high-speed TMS320 DSP family, microprocessors, and bus drivers. For start-up into a non-prebiased output, review page in the Application Information section. For start-up into a prebiased output, review page in the Application Information section. Please be aware that an important notice concerning availability, standard warranty, and use in critical sheet. Auto-Track, TMS320 are trademarks of Texas Instruments. PRODUCTION DATA information is current as of publication date. Copyright 2003 2007, Texas Instruments Incorporated Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
www.ti.com PTH12010x (Top View) Margin□Up Margin□Down VI L O A DC 560 F (Required) I /c109 R ,□1□% (Required) SET + C 330 F (Optional) O /c109 Inhibit GND GND VO VOSense Track 9 8 ABSOLUTE MAXIMUM RATINGS PTH12010W PTH12010L SLTS205G JUNE 2003 REVISED FEBRUARY 2007 These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. STANDARD APPLICATION R SET Required to set the output voltage to a value higher than the lowest value (see the electrical characteristics table for values). ORDERING INFORMATION For the most current package and ordering information, see the Package Option Addendum at the end of this datasheet, or see the TI website at www.ti.com. Voltages are with respect to GND MIN TYP MAX UNIT V track Track Input Voltage 0.3 V I 0.3 V T A Operating Temperature Over V I Range (1) C Range T wave Wave solder Surface temperature of module body or pins PTH12010WAH 260 (2) temperature seconds) C PTH12010WAS 235 (2) Solder reflow T reflow Surface temperature of module body or pins temperature PTH12010WAZ 260 (2) T stg Storage Temperature 125 (3) C Mechanical Shock Per Mil-STD-883D, Method 2002.3, msec, Sine, mounted 500 G Mechanical Vibration Mil-STD-883D, Method 2007.2 G 20-2000 Hz Weight grams Flammability Meets UL 94V-O (1) For operation below C the external capacitors must have stable characteristics. Use either a low-ESR tantalum, Os-Con, or ceramic capacitor. (2) During soldering of package version, do not elevate peak temperature of the module, pins or internal components above the stated maximum. (3) The shipping tray or tape and reel cannot be used to bake parts at temperatures higher than Submit Documentation Feedback
www.ti.com ELECTRICAL CHARACTERISTICS PTH12010W PTH12010L SLTS205G JUNE 2003 REVISED FEBRUARY 2007 T A V I V O 3.3 C I 560 µ C O µ and I O I O max (Unless otherwise stated) PTH12010W CHARACTERISTICS CONDITIONS MIN TYP MAX UNIT 200 LFM airflow (1) I o Output current 1.2 V V o 5.5 V A natural convection (1) V I Input voltage range Over I o range 10.8 13.2 V V o tol Set-point voltage tolerance (2) o Reg temp Temperature variation C T A C 0.5 o Reg line Line regulation Over V I range mV Reg load Load regulation Over I o range mV Reg tot Total output variation Includes set-point, line, load, C T A C (2) o V adj Output voltage adjust range Over V I range 1.2 5.5 V R SET 280 Ω V o R SET 2.0 k Ω V o 3.3V R SET 4.32 k Ω V o 2.5V η Efficiency I O A R SET 11.5 k Ω V o 1.8V R SET 24.3 k Ω V o 1.5V R SET OPEN, V o 1.2V V r V O ripple (peak-to-peak) 20-MHz bandwidth All V o V O I o trip Overcurrent threshold Reset, followed by auto-recovery A t tr µ s load step, Recovery Time µ Sec Transient response to 100% I o max, V o over/undershoot 100 mV V tr C O 330 µ F V O margin Margin up/down adjust Margin Control (pins &10) I IL margin Margin input current, Pin to GND (3) µ A I IL track Track input current (pin Pin to GND 0.13 (4) mA dV track /dt Track slew rate capability C O C O (max) V/ms V I increasing 9.5 10.4 UVLO Undervoltage lockout V V I decreasing 8.8 V IH Input high voltage, Referenced to GND Open (4) V V IL Inhibit control (pin Input low voltage, Referenced to GND 0.2 0.5 I IL Input low current, Pin to GND 0.24 mA I I Input standby current Inhibit (pin to GND, Track (pin open mA f s Switching frequency Over V I and I o ranges 300 350 400 kHz C I External input capacitance 560 (5) µ F nonceramic (6) 330 (7) 6,600 (8) Capacitance value µ F C O External output capacitance ceramic 300 Equivalent series resistance (nonceramic) (9) m Ω MTBF Reliability Bellcore TR-332,50% stress,T A =40 GND benign 6.4 Hr (1) See SOA curves or consult factory for appropriate derating. (2) The set-point voltage tolerance is affected by the tolerance and stability of R SET The stated limit is unconditionally met if R SET has a tolerance of 1%, with 100 ppm/ C (or better) temperature stability. (3) A small, low-leakage <100 nA) MOSFET is recommended to control this pin. The open-circuit voltage is less than V dc (4) This control pin has an internal pull-up to the input voltage V I (7.5 V for pin 8). If it is left open-circuit the module operates when input power is applied. A small, low-leakage <100 nA) MOSFET or open-drain/collector voltage supervisor IC is recommended for control. Do not place an external pull-up on this pin. For further information, see the related application section. (5) A 560 µ F electrolytic input capacitor, rated for a minimum of 800 mA rms of ripple current is required for proper operation. (6) When operating at an output voltage 3.3 47- µ F of external output capacitance is required for proper operation. (7) External output capacitance is not required for operation. Adding 330 µ F of distributed capacitance improves the transient response. (8) This is the calculated maximum. The minimum ESR limitation often results in a lower value. When controlling the Track pin using a voltage supervisor, C O (max) is reduced to 3300 µ See the application notes for further guidance. (9) This is the typical ESR for all nonceramic ouput capacitance. Use m Ω as the minimum when using max-ESR values to calculate. Submit Documentation Feedback
www.ti.com ELECTRICAL CHARACTERISTICS PTH12010W PTH12010L SLTS205G JUNE 2003 REVISED FEBRUARY 2007 T A V I V O 1.8 C I 560 µ C O µ and I O I O max (Unless otherwise stated) PTH12010L CHARACTERISTICS CONDITIONS MIN TYP MAX UNIT 200 LFM airflow (1) I o Output current 0.8 V V O 1.8 V A natural convection (1) V I Input voltage range Over I O range 10.8 13.2 V V o tol Set-point voltage tolerance (2) o Δ Reg temp Temperature variation C A C 0.5 o Δ Reg line Line regulation Over V i range mV Δ Reg load Load regulation Over I O range mV Δ Reg tot Total output variation Includes set-point, line, load, C T A C (2) o V adj Output voltage adjust range Over V I range 0.8 1.8 V R SET 130 Ω V o 1.8V R SET 3.57 k Ω V o 1.5V η Efficiency I O A R SET 12.1 k Ω V o 1.2V R SET 32.4 k Ω V o R SET OPEN, V o 0.8V V r V O ripple (peak-to-peak) MHz bandwidth All V o O I o trip Overcurrent threshold Reset, followed by auto-recovery A t tr µ s load step, Recovery Time µ Sec Transient response to100% I o max, V O over/undershoot 100 mV Δ V tr C O 330 µ F V Omargin Margin up/down adjust Margin Control (pins &10) I IL margin Margin input current, Pin to GND (3) µ A I IL track Track input current (pin Pin to GND 0.13 (4) mA dV track /dt Track slew rate capability C O C O (max) V/ms V I increasing 9.5 10.4 UVLO Undervoltage lockout V V I decreasing 8.8 V IH Input high voltage, Referenced to GND Open (4) V V IL Inhibit control (pin Input low voltage, Referenced to GND 0.2 0.5 I IL Input low current, Pin to GND 0.24 mA I I Input standby current Inhibit (pin to GND, Track (pin open mA f s Switching frequency Over V I and I o ranges 200 250 300 kHz C I External input capacitance 560 (5) µ F nonceramic 330 (6) 6,600 (7) Capacitance value µ F C O External output capacitance ceramic 300 Equivalent series resistance (nonceramic) (8) m Ω MTBF Reliability Bellcore TR-332,50% stress,T A =40 GND benign 6.4 Hrs (1) See SOA curves or consult factory for appropriate derating. (2) The set-point voltage tolerance is affected by the tolerance and stability of R SET The stated limit is unconditionally met if R SET has a tolerance of 1%, with 100 ppm/ C (or better) temperature stability. (3) A small, low-leakage <100 nA) MOSFET is recommended to control this pin. The open-circuit voltage is less than V dc (4) This control pin has an internal pull-up to the input voltage V I (7.5 V for pin 8). If it is left open-circuit the module operates when input power is applied. A small, low-leakage <100 nA) MOSFET or open-drain/collector voltage supervisor IC is recommended for control. Do not place an external pull-up on this pin. For further information, see the related application section. (5) A 560 µ F electrolytic input capacitor, rated for a minimum of 800 mA rms of ripple current is required for proper operation. (6) External output capacitance is not required for operation. Adding 330 µ F of distributed capacitance improves the transient response. (7) This is the calculated maximum. The minimum ESR limitation oftens result in a lower value. When controlling the Track pin using a voltage supervisor, C O (max) is reduced to 3300 µ See the application notes for further guidance. (8) This is the typical ESR for all nonceramic ouput capacitance. Use m Ω as the minimum when using max-ESR values to calculate. Submit Documentation Feedback
www.ti.com DEVICE INFORMATION PTHXX010 (Top View) 10 9 8 543 PTH12010W PTH12010L SLTS205G JUNE 2003 REVISED FEBRUARY 2007 TERMINAL FUNCTIONS TERMINAL NO. This is the common ground connection for the V I and V O power connections. It is also the V dc GND 1,7 reference for the control inputs. V I The positive input voltage power node to the module, which is referenced to common GND. The Inhibit pin is an open-collector/drain negative logic input that is referenced to GND Applying a low-level ground signal to this input disables the module s output and turns off the output voltage. When the Inhibit control is active, the input current drawn by the regulator is significantly reduced. If Inhibit (1) the inhibit feature is not used, the control pin should be left open-circuit. The module then produces an output whenever a valid input source is applied. Do not place an external pull-up on this pin. For power-up into a non-prebiased output, it is recommended that AutoTrack be utilized for On/Off control. See the Application Information for additional details. A resistor must be directly connected between this pin and GND (pin to set the output voltage of the module higher than its lowest value. The temperature stability of the resistor should be 100 ppm/ C (or better). The set-point range is 1.2 V to 5.5 V for W-suffix devices, and 0.8 V to 1.8 V for L-suffix V O Adjust devices. The resistor value required for a given output voltage may be calculated using a formula. If left open circuit, the output voltage defaults to its lowest value. For further information on output voltage adjustment, see the related application section. The specification table gives the preferred resistor values for a number of standard output voltages. The sense input allows the regulation circuit to compensate for voltage drop between the module and V O Sense the load. For optimal voltage accuracy, V O Sense should be connected to V O It can also be left disconnected. V O The regulated positive power output with respect to the GND node. This is an analog control input that enables the output voltage to follow an external voltage. This pin becomes active typically ms after the input voltage has been applied, and allows direct control of the output voltage from V up to the nominal set-point voltage. Within this range the output will follow the voltage at the Track pin on a volt-for-volt basis. When the control voltage is raised above this Track range, the module regulates at its set-point voltage. The feature allows the output voltage to rise simultaneously with other modules powered from the same input bus. If unused, this input should be connected to V i Note: Due to the undervoltage lockout feature, the output of the module cannot follow its own input voltage during power up. When this input is asserted to GND, the output voltage is decreased by from the nominal. The input requires an open-collector (open-drain) interface. It is not TTL compatible. A lower percent Margin Down (1) change can be accomodated with a series resistor. For further information, see the related application section. When this input is asserted to GND the output voltage is increased by 5%. The input requires an Margin Up (1) open-collector (open-drain) interface. It is not TTL compatible. The percent change can be reduced with a series resistor. For further information, see the related application section. (1) Denotes negative logic: Open Normal operation Ground Function active Submit Documentation Feedback
www.ti.com PTH12010W TYPICAL CHARACTERISTICS I (1) (2) IL − Load Current − A VOUT = 5 V − Power Dissipation − WPD VOUT = 3.3 V VOUT = 2.5 V VOUT = 2 V VOUT = 1.8 V VOUT = 1.5 V VOUT = 1.2 V 2 4 6 8 120 10 100 2 4 6 8 120 IL − Load Current − A Output Ripple − mV VOUT = 5 V VOUT = 3.3 V VOUT = 2.5 V VOUT = 2 V VOUT = 1.8 V VOUT = 1.5 VVOUT = 1.2 V 100 Efficiency − % IO − Output Current − A 0 2 4 6 8 10 VO = 5 V VO = 3.3 V VO = 2.5 V VO = 2 V VO = 1.8 V VO = 1.5 V VO = 1.2 V
400 LFM
200 LFM
TA − Ambient Temperature −/C0053C 100 LFM VO = 3.3 V IO − Output Current − A 0 2 4 6 8 12 10 TA − Ambient Temperature −/C0053C 100 LFM VO =/charBnZrBnZrBnZrBnZrBnZrBnZrBnZrBnZr≤1.8 V IO − Output Current − A 0 2 4 6 8 12 10
100 LFM
VO = 5 V IO − Output Current − A 0 2 4 6 8 12 TA − Ambient Temperature −/C0053C PTH12010W PTH12010L SLTS205G JUNE 2003 REVISED FEBRUARY 2007 EFFICIENCY OUTPUT RIPPLE POWER DISSIPATION vs vs vs LOAD CURRENT LOAD CURRENT LOAD CURRENT Figure Figure Figure TEMPERATURE DERATING TEMPERATURE DERATING TEMPERATURE DERATING vs vs vs OUTPUT CURRENT OUTPUT CURRENT OUTPUT CURRENT Figure Figure Figure (1) The electrical characteristic data has been developed from actual products tested at This data is considered typical for the converter. Applies to Figure Figure and Figure (2) The temperature derating curves represent the conditions at which internal components are at or below the manufacturer's maximum operating temperatures. Derating limits apply to modules soldered directly to a inch inch double-sided PCB with oz. copper. For surface mount packages (AS and AZ suffix), multiple vias (plated through holes) are required to add thermal paths around the power pins. Please refer to the mechanical specification for more information. Applies to Figure Figure and Figure Submit Documentation Feedback
www.ti.com PTH12010L TYPICAL CHARACTERISTICS I (1) (2) IL − Load Current − A − Power Dissipation − WPD VOUT = 1 V VOUT = 1.2 V 2 4 6 8 120 10 VOUT = 1.8 V VOUT = 1.5 V VOUT = 0.8 V 2 4 6 8 120 IL − Load Current − A Output Ripple − mV VOUT = 1 V VOUT = 1.8 V VOUT = 0.8 V VOUT = 1.5 V VOUT = 1.2 V 100 Efficiency − % IO − Output Current − A 0 2 4 6 8 10 12 VO = 0.8 V VO = 1.8 V VO = 1.5 V VO = 1.2 V VO = 1 V TA − Ambient Temperature −/C0053C VO =/charBnZrBnZrBnZrBnZrBnZrBnZrBnZrBnZr≤1.8 V IO − Output Current − A 0 2 4 6 8 12 10 PTH12010W PTH12010L SLTS205G JUNE 2003 REVISED FEBRUARY 2007 EFFICIENCY OUTPUT RIPPLE POWER DISSIPATION vs vs vs LOAD CURRENT LOAD CURRENT LOAD CURRENT Figure Figure Figure TEMPERATURE DERATING vs OUTPUT CURRENT Figure 10. (1) The electrical characteristic data has been developed from actual products tested at This data is considered typical for the converter. Applies to Figure Figure and Figure (2) The temperature derating curves represent the conditions at which internal components are at or below the manufacturer's maximum operating temperatures. Derating limits apply to modules soldered directly to a inch x inch double-sided PCB with oz. copper. For surface mount packages (AS and AZ suffix), multiple vias (plated through holes) are required to add thermal paths around the power pins. Please refer to the mechanical specification for more information. Applies to Figure Submit Documentation Feedback
www.ti.com APPLICATION INFORMATION ADJUSTING THE OUTPUT VOLTAGE VI + C 330 F (Optional) O /c109 C 560 F (Required) I /c109 GND VO V SenseO RSET 1□% 0.1□W PTH12010x GND NOTES PTH12010W PTH12010L SLTS205G JUNE 2003 REVISED FEBRUARY 2007 The V O Adjust control (pin sets the output voltage of the PTH12010 product. The adjustment range is from 1.2 V to 5.5 V for the W-suffix modules, and 0.8 V to 1.8 V for L-suffix modules. The adjustment method requires the addition of a single external resistor, R SET that must be connected directly between the V O Adjust and GND pins. Table gives the standard value of the external resistor for a number of standard voltages, along with the actual output voltage that this resistance value provides. For other output voltages, the value of the required resistor can either be calculated using Equation or simply selected from the range of values given in Table Figure shows the placement of the required resistor. Table Standard Values of R SET for Standard Output Voltages PTH12010W PTH12010L V O (Required) R SET V O (Actual) R SET V O (Actual) V 280 Ω 5.009 V N/A N/A 3.3 V 2.0 k Ω 3.294 V N/A N/A 2.5 V 4.32 k Ω 2.503 V N/A N/A V 8.06 k Ω 2.010 V N/A N/A 1.8 V 11.5 k Ω 1.081 V 130 Ω 1.800 V 1.5 V 24.3 k Ω 1.506 V 3.57 k Ω 1.499 V 1.2 V Open 1.200 V 12.1 k Ω 1.201 V 1.1 V N/A N/A 18.7 k Ω 1.101 V 1.0 V N/A N/A 32.4 k Ω 0.999 V 0.9 V N/A N/A 71.5 k Ω 0.901 V 0.8 V N/A N/A Open 0.800 V Figure 11. V o Adjust Resistor Placement A 0.05 W rated resistor may be used. The tolerance should be 1%, with temperature stability of 100 ppm/ C (or better). Place the resistor as close to the regulator as possible. Connect the resistor directly between pins and using dedicated PCB traces. Never connect capacitors from V O Adjust to either GND or V O Any capacitance added to the V O Adjust pin affects the stability of the regulator. Submit Documentation Feedback
www.ti.com R =□10□k xSET /c87 0.8□V -□□R kS /c87V -□□VO min (1) PTH12010W PTH12010L SLTS205G JUNE 2003 REVISED FEBRUARY 2007 Use Equation to calculate the adjust resistor value. See Table for the parameters, R S and V min Table Adjust Formula Parameters PARAMETER PTH12010W PTH12010L V min 1.2 V 0.8 V V max 5.5 V 1.8 V R S 1.82 k Ω 7.87 k Ω Table Output Voltage Set-Point Resistor Values PTH12010W PTH12010L V O (V) R SET Ω V O (V) R SET Ω V O R SET Ω 1.2 Open 2.7 3.51 0.8 Open 1.225 318 2.75 3.34 0.825 312 1.25 158 2.8 3.18 0.85 152 1.275 105 2.85 3.03 0.875 98.8 1.3 78.2 2.9 2.89 0.9 72.1 1.325 62.2 2.95 2.75 0.925 56.1 1.35 51.5 2.62 0.95 45.5 1.375 43.9 3.05 2.5 0.975 37.8 1.4 38.2 3.1 2.39 32.1 1.425 33.7 3.15 2.28 1.025 27.7 1.45 30.2 3.2 2.18 1.05 24.1 1.475 27.3 3.25 2.08 1.075 21.2 1.5 24.8 3.3 1.99 1.1 18.8 1.55 3.35 1.90 1.125 16.7 1.6 18.2 3.4 1.82 1.15 1.65 3.5 1.66 1.175 13.5 1.7 14.2 3.6 1.51 1.2 12.1 1.75 12.7 3.7 1.38 1.225 1.8 11.5 3.8 1.26 1.25 9.91 1.85 10.5 3.9 1.14 1.275 8.97 1.9 9.61 1.04 1.3 8.13 1.95 8.85 4.1 0.939 1.325 7.37 8.18 4.2 0.847 1.35 6.68 2.05 7.59 4.3 0.761 1.375 6.04 2.1 7.07 4.4 0.680 1.4 5.46 2.15 6.6 4.5 0.604 1.425 4.93 2.2 6.18 4.6 0.533 1.45 4.44 2.25 5.80 4.7 0.466 1.475 3.98 2.3 5.45 4.8 0.402 1.5 3.56 2.35 5.14 4.9 0.342 1.55 2.8 2.4 4.85 0.285 1.6 2.13 2.45 4.58 5.1 0.231 1.65 1.54 2.5 4.33 5.2 0.180 1.7 1.02 2.55 4.11 5.3 0.131 1.75 0.551 2.6 3.89 5.4 0.085 1.8 0.130 2.65 3.70 5.5 0.041 Submit Documentation Feedback
www.ti.com CAPACITOR RECOMMENDATIONS FOR THE PTH12010 SERIES OF POWER MODULES INPUT CAPACITOR OUTPUT CAPACITORS (OPTIONAL) CERAMIC CAPACITORS TANTALUM CAPACITORS CAPACITOR TABLE PTH12010W PTH12010L SLTS205G JUNE 2003 REVISED FEBRUARY 2007 The recommended input capacitance is determined by the 560 µ F minimum capacitance and 800 mArms minimum ripple current rating. A µ F X5R/X7R ceramic capacitor may also be added to reduce the reflected input ripple current. The ceramic capacitor should be located between the input electrolytic and the module. Ripple current, less than 100 m Ω equivalent series resistance (ESR) and temperature are major considerations when selecting input capacitors. Unlike polymer-tantalum capacitors, regular tantalum capacitors have a recommended minimum voltage rating of (max dc voltage ac ripple). This is standard practice to ensure reliability. No tantalum capacitors were found with sufficient voltage rating to meet this requirement. At temperatures below the ESR of aluminum electrolytic capacitors increases. For these applications, Os-Con, polymer-tantalum, and polymer-aluminum types should be considered. For (sudden changes in load current), regulator response benefits from external output capacitance. The value of 330 µ F is used to define the transient response specification (see data sheet). For most applications, a high quality computer-grade aluminum electrolytic capacitor is adequate. These capacitors provide decoupling over the frequency range, kHz to 150 kHz, and are suitable for ambient temperatures above Below tantalum, ceramic or Os-Con type capacitors are recommended. When using one or more nonceramic capacitors, the calculated equivalent ESR should be no lower than m Ω m Ω using the manufacturer s maximum ESR for a single capacitor). A list of preferred low-ESR type capacitors are identified in Table In addition to electrolytic capacitance, adding a µ F X5R/X7R ceramic capacitor to the output reduces the output ripple voltage and improve the regulator s transient response. The measurement of both the output ripple and transient response is also best achieved across a µ F ceramic capacitor. Above 150 kHz the performance of aluminum electrolytic capacitors is less effective. Multilayer ceramic capacitors have very low ESR and a resonant frequency higher than the bandwidth of the regulator. They can be used to reduce the reflected ripple current at the input as well as improve the transient response of the output. When used on the output, their combined ESR is not critical as long as the total value of ceramic capacitance does not exceed 300 µ Also, to prevent the formation of local resonances, do not place more than five identical ceramic capacitors in parallel with values of µ F or greater. Tantalum type capacitors are most suited for use on the output bus, and are recommended for TPS, Sprague 593D/594/595 and Kemet T495/T510 capacitor series are suggested over other tantalum types due to their higher rated surge, power dissipation, and ripple current capability. As a caution, many general purpose tantalum capacitors have considerably higher ESR, reduced power dissipation and lower ripple current capability. These capacitors are also less reliable as they have lower power dissipation and surge current ratings. Tantalum capacitors that do not have a stated ESR or surge current rating are not recommended for power applications. When specifying Os-con and polymer tantalum capacitors for the output, the minimum ESR limit are encountered well before the maximum capacitance value is reached. Table identifies the characteristics of capacitors from a number of vendors with acceptable ESR and ripple current (rms) ratings. The recommended number of capacitors required at both the input and output buses is identified for each capacitor type. This is not an extensive capacitor list. Capacitors from other vendors are available with comparable specifications. Those listed are for guidance. The RMS ripple current rating and ESR (at 100 kHz) are critical parameters necessary to insure both optimum regulator performance and long capacitor life. Submit Documentation Feedback
www.ti.com PTH12010W PTH12010L SLTS205G JUNE 2003 REVISED FEBRUARY 2007 Table Input/Output Capacitors (1) CAPACITOR CHARACTERISTICS QUANTITY CAPACITOR VENDOR, WORKING VALUE MAX. ESR MAX RIPPLE PHYSICAL INPUT OUTPUT VENDOR PART TYPE/SERIES, (STYLE) VOLTAGE µ AT 100 kHz CURRENT AT SIZE (mm) BUS BUS NUMBER C (lrms) Panasonic, Aluminum V 560 0.065 Ω 1205 mA 12,5 x EEUFC1E561S FC, (Radial) V 1000 0.060 Ω 1100 mA 12,5 x 13,5 EEVFK1E102Q FK, (SMD) V 680 0.060 Ω 1100 mA 12,5 x 13,5 EEVFK1V681Q United Chemi-Con PS, Poly-Alum (Radial) V 330 0.014 Ω 5050 mA x 12,5 16PS330MJ12 LXZ, Aluminium (Radial) V 680 0.068 Ω 1050 mA x LXZ16VB681M10X16LL PXA, Poly-Alum (SMD) V 330 0.014 Ω 5050 mA x 12,2 PXA16VC331MJ12TP Nichicon, Aluminum (PM) V 560 0.060 Ω 1060 mA 12,5 x UPM1E561MHH6 HD, (Radial) V 680 0.038 Ω 1430 mA x UHD1C681MPR PM, (Radial) V 560 0.048 Ω 1360 mA x UPM1V561MHH6 Panasonic, Poly-Alum S/SE, (SMD) 6.3 V 180 0.005 Ω 4000 mA 7,3x4,3x4,2 N/R (2) (3) EEFSEOJ181R O 5.1V) Sanyo TPE Poscap (SMD) V 330 0.025 Ω 3000 mA 7,3 x 5,7 N/R (2) 10TPE330M SEQP, Os-Con (Radial) V 330 0.016 Ω >4720 mA x 16SEQP330M SVP, Os-Con (SMD) V 330 0.016 Ω 4700 mA x 16SVP330M AVX, Tantalum Series III V 470 0.045 Ω >1723 mA N/R (2) (3) TPSE477M010R0045 7,3x5,7x4,1 TPS (SMD) O 5.1V) V 330 0.045 Ω >1723 mA N/R (2) (3) TPSE377M010R0045 7,3x5,7x4,1 O 5.1V) Kemet, T520 V 330 0.040 Ω 1800 mA 4,3x7,3x4,0 N/R (2) T520X337M010AS T520, Poly-Tant (SMD) V 330 0.010 Ω >3800 mA 4,3x7,3x4,0 N/R (2) T530X337M010ASE010 T530, Poly-Tant/Organic 6.3 V 470 0.005 Ω 4200 mA N/R (2) (3) T530X477M006ASE005 4,3x7,3x4,0 O 5.1V) Vishay-Sprague 595D, Tantalum (SMD) V 470 0.100 Ω 1440 mA 7,2x6,0x4,1 N/R (2) (3) 595D477X0010R2T O 5.1V) 94SA, Os-con (Radial) V 1000 0.015 Ω 9750 mA x 94SA108X0016HBP 94SVP, Os-CON(SMD) 16V 330 0.017 Ω 4580 mA x 12,7 (4) 94SVP337X0016F12 Kemet, Ceramic X5R V 0.002 Ω 1210 Case (5) C1210C106M4PAC (SMD) 6.3 V 0.002 Ω 3225 mm N/R (2) C1210C476K9PAC Murata, Ceramic X5R 6.3 V 100 0.002 Ω 1210 Case N/R (2) GRM32ER60J107M (SMD) V 3225 mm (5) GRM32ER61CJ476K V (5) GRM32ER61C226K V (5) GRM32DR61C106K TDK, Ceramic X5R (SMD) 6.3 V 100 0.002 Ω 1210 Case N/R (2) C3225X5R0J107MT 6.3 V 3225 mm N/R (2) C3225X5R0J476MT V (5) C3225X5R1C226MT V (5) C3225X5R1C106MT (1) Capacitor Supplier Verification Please verify availability of capacitors identified in this table. Capacitor suppliers may recommend alternative part numbers because of limited availability or obsolete products. In some instances, the capacitor product life cycle may be in decline and have short-term consideration for obsolescence. RoHS, Lead-free and Material Details Please consult capacitor suppliers regarding material composition, RoHS status, lead-free status, and manufacturing process requirements. Component designators or part number deviations can occur when material composition or soldering requirements are updated. (2) N/R Not recommended. The capacitor voltage rating does not meet the minimum derated operating limits. (3) The voltage rating of this capacitor only allows it to be used for output voltages that are equal to or less than 5.1 (4) A total capacitance of 540 µ F is acceptable based on the combined ripple current rating. (5) A ceramic capacitor may be used to complement electrolytic types at the input to further reduce high-frequency ripple current. Submit Documentation Feedback
www.ti.com DESIGNING FOR VERY FAST LOAD TRANSIENTS PTH12010W PTH12010L SLTS205G JUNE 2003 REVISED FEBRUARY 2007 The transient response of the DC/DC converter has been characterized using a load transient with a di/dt of µ The typical voltage deviation for this load transient is given in the data sheet specification table using the optional value of output capacitance. As the di/dt of a transient is increased, the response of a converter s regulation circuit ultimately depends on its output capacitor decoupling network. This is an inherent limitation with any dc/dc converter once the speed of the transient exceeds its bandwidth capability. If the target application specifies a higher di/dt or lower voltage deviation, the requirement can only be met with additional output capacitor decoupling. In these cases special attention must be paid to the type, value and ESR of the capacitors selected. If the transient performance requirements exceed that specified in the data sheet, or the total amount of load capacitance is above 3000 µ the selection of output capacitors becomes more important. Submit Documentation Feedback
www.ti.com non-isolated, wide-output adjustable power modules are optimized for a flexible, high performance module that is small in size. Each of these products are POLA compatible. POLA-compatible products are produced by a number of manufacturers, and offer customers advanced, nonisolated modules with the same footprint and form factor. POLA parts are also ensured to be interoperable, thereby, providing customers with second-source availability. From the basic, Just Plug it In functionality of the 6-A modules, to the 30-A rated feature-rich PTHxx030, these products were designed to be very flexible, yet simple to use. The product. Table provides a quick reference to the voltage. Table Operating (V) I O (A) Adjust On/Off Over- Prebias Auto- Margin Output Thermal (Trim) Inhibit Current Startup Track Up/Down Sense Shutdown 3.3 PTHxx050 3.3 PTHxx060 3.3 PTHxx010 PTVxx010 3.3 PTHxx020 PTVxx020 3.3 PTHxx030 For simple point-of-use applications, the PTH12050 (6A) provides operating inhibit, output voltage trim, prebias start-up and overcurrent protection. The PTH12060 (10A), and PTH12010 (12A) include an output voltage sense, and margin up/down controls. Then the higher output current, PTH12020 (18A) and PTH12030 (26A) products incorporate overtemperature shutdown protection. The PTV12010 and PTV12020 are similar parts offered in a vertical, single in-line pin (SIP) profile, at slightly lower current ratings. All of the products referenced in Table include Auto-Track This feature was specifically designed to simplify the task of sequencing the supply voltages in a power system. This and other sections. Submit Documentation Feedback
www.ti.com POWER-UP INTO A NON-PREBIASED OUTPUT AUTO-TRACK FUNCTION UDG−06074 R SET 2 kΩ 0.1 W 1 % C O 330 µFC I 560 µF 8 1 7 3910 PTH12060W GND L O A D BSS1381=Turn−Off Margin Down Margin Up Inhibit Track GND GND VoAdj VO VO VO Sense VI PTH12010W PTH12010L SLTS205G JUNE 2003 REVISED FEBRUARY 2007 The Auto-Track function is unique to the PTH/PTV family, and is available with all POLA products. Auto-Track was designed to simplify the amount of circuitry required to make the output voltage from each module power up and power down in sequence. The sequencing of two or more supply voltages during power up is a common requirement for complex mixed-signal family, microprocessors, and ASICs. Basic Power-Up using Auto-Track For control, each series of the PTH family incorporates the track control pin. The Auto-Track feature should be used instead of the inhibit feature wherever there is a requirement for the output voltage from the regulator to be turned on/off. Figure shows the typical application for basic start-up. Note the discrete transistor (Q1). The track input has its own internal pull-up to a potential of V to 13.2 V The input is not compatible with TTL logic devices. An open-collector (or open-drain) discrete transistor or supply voltage supervisor (TPS3808 or TPS7712) is recommended for control. Figure 12. Basic Start-up Control Circuit Turning on applies a low voltage to the track control pin and disables the output of the module. If is then turned off, the output ramps immediately to the regulated output voltage. A regulated output voltage is produced within ms. With the initial application of the input source voltage, the track pin must be held low (Q1 turned ON) for at least ms. Figure shows the typical rise in both the output voltage and input current, following the turn off of Q1. The turn off of corresponds to the rise in the waveform, Vds. The waveforms were measured with a 10-A constant current load. Submit Documentation Feedback
www.ti.com Q1V DS (2 V/div) VO (2 V/div) II (2 A/div) t − Time − 40 ms/div PTH12010W PTH12010L SLTS205G JUNE 2003 REVISED FEBRUARY 2007 Figure 13. Power-Up from Track Control NOTE: If a prebias condition is not present, it is highly recommended that the Track control pin be used for controlled power-up and power-down. If Track control is not used, the output voltage starts up and overshoots by as much as 10%, before settling at the output voltage setpoint. How Auto-Track Works Auto-Track works by forcing the module output voltage to follow a voltage presented at the Track control pin (1) This control range is limited to between V and the module set-point voltage. Once the track-pin voltage is raised above the set-point voltage, the module output remains at its set-point (2) As an example, if the Track pin of a 2.5-V regulator is at the regulated output is If the voltage at the Track pin rises to the regulated output does not go higher than 2.5 When under Auto-Track control, the regulated output from the module follows the voltage at its Track pin on a volt-for-volt basis. By connecting the Track pin of a number of these modules together, the output voltages follow a common signal during power up and power down. The control signal can be an externally generated master ramp waveform, or the output voltage from another power supply circuit (3) For convenience, the Track input incorporates an internal RC-charge circuit. This operates off the module input voltage to produce a suitable rising waveform at power up. Submit Documentation Feedback
www.ti.com PTH12010W PTH12010L SLTS205G JUNE 2003 REVISED FEBRUARY 2007 Typical Auto-Track Application The basic implementation of Auto-Track allows for simultaneous voltage sequencing of a number of Auto-Track compliant modules. Connecting the Track inputs of two or more modules forces their track input to follow the same collective RC-ramp waveform, and allows their power-up sequence to be coordinated from a common Track control signal. This can be an open-collector (or open-drain) device, such as a power-up reset voltage supervisor IC. See in Figure To coordinate a power-up sequence, the Track control must first be pulled to ground potential through R TRK as defined in Figure This should be done at or before input power is applied to the modules. The ground signal should be maintained for at least ms after input power has been applied. This brief period gives the modules time to complete their internal soft-start initialization (4) enabling them to produce an output voltage. A low-cost supply voltage supervisor IC, that includes a built-in time delay, is an ideal component for automatically controlling the Track inputs at power up. Figure shows how the TL7712A supply voltage supervisor IC (U3) can be used to coordinate the sequenced power up of two 12-V input Auto-Track modules. The output of the TL7712A supervisor becomes active above an input voltage of 3.6 enabling it to assert a ground signal to the common track control well before the input voltage has reached the module's undervoltage lockout threshold. The ground signal is maintained until approximately ms after the input voltage has risen above U3's voltage threshold, which is 10.95 The 43-ms time period is controlled by the capacitor C3. The value of 3.3 µ F provides sufficient time delay for the modules to complete their internal soft-start initialization. The output voltage of each module remains at zero until the track control voltage is allowed to rise. When removes the ground signal, the track control voltage automatically rises. This causes the output voltage of each module to rise simultaneously with the other modules, until each reaches its respective set-point voltage. Figure shows the output voltage waveforms from the circuit of Figure after input voltage is applied to the circuit. The waveforms, V O and V O represent the output voltages from the two power modules, (3.3 and (1.8 V), respectively. V TRK V O and V O are shown rising together to produce the desired simultaneous power-up characteristic. The same circuit also provides a power-down sequence. When the input voltage falls below U3's voltage threshold, the ground signal is re-applied to the common track control. This pulls the track inputs to zero volts, forcing the output of each module to follow, as shown in Figure In order for a simultaneous power-down to occur, the track inputs must be pulled low before the input voltage has fallen below the modules' undervoltage lockout. This is an important constraint. Once the modules recognize that a valid input voltage is no longer present, their outputs can no longer follow the voltage applied at their track input. During a power-down sequence, the fall in the output voltage from the modules is limited by the maximum output capacitance and the Auto-Track slew rate. If the Track pin is pulled low at a slew rate greater than V/ms, the discharge of the output capacitors will induce large currents which could exceed the peak current rating of the module. This will result in a reduction in the maximum allowable output capacitance as listed in the Electrical Characteristics table. When controlling the Track pin of the PTH12060W using a voltage supervisor IC, the slew rate is increased, therefore C O max is reduced to 2200 µ Notes on Use of Auto-Track The Track pin voltage must be allowed to rise above the module set-point voltage before the module regulates at its adjusted set-point voltage. The Auto-Track function tracks almost any voltage ramp during power up, and is compatible with ramp speeds of up to V/ms. The absolute maximum voltage that may be applied to the Track pin is the input voltage V I The module cannot follow a voltage at its track control input until it has completed its soft-start initialization. This takes about ms from the time that a valid voltage has been applied to its input. During this period, it is recommended that the Track pin be held at ground potential. The Auto-Track function is disabled by connecting the Track pin to the input voltage I When Auto-Track is disabled, the output voltage rises at a quicker and more linear rate after input power has been applied. Submit Documentation Feedback
www.ti.com N = Number of Track pins connected together 10 kΩ # RTRK = 100 Ω / N VI = 12 V Vo1 = 3.3 V R SET1 C O1 C PTH12050W Track VI VO GNDInhibit Adjust TL7712A VCC GND SENSE RESIN REF CT RESET RESET C TC REF R RST Vo2 = 1.8 V C O2 C PTH12060W 9 8 Track VI VO GNDInhibit Up Dn Sense Adjust SET2 R TRK # 2.0 kΩ 11.5 kΩ 0.1 µF 3.3 µF 50 Ω R t − Time − 20 ms/div VTRK (1 V/div) V01 (1 V/div) V02 (1 V/div) t − Time − 400 µs/div VTRK (1 V/div) V01 (1 V/div) V02 (1 V/div) PTH12010W PTH12010L SLTS205G JUNE 2003 REVISED FEBRUARY 2007 Figure 14. Sequenced Power Up and Power Down Using Auto-Track Figure 15. Simultaneous Power Up With Auto-Track Figure 16. Simultaneous Power Down with Auto-Track Control Control Submit Documentation Feedback
www.ti.com POWER-UP INTO A PREBIASED OUTPUT START-UP USING INHIBIT CONTROL t − Time − 10 ms/div VO 1 (1 V/div) VO 2 (1 V/div) IO 2 (5 V/div) PTH12010W PTH12010L SLTS205G JUNE 2003 REVISED FEBRUARY 2007 The capability to start up into an output prebias condition is now available to all the 12-V input, PTH series of power modules. (Note that this is a feature enhancement for the many of the W-suffix products) [1] A prebias startup condition occurs as a result of an external voltage being present at the output of a power module prior to its output becoming active. This often occurs in complex digital systems when current from another power source is backfed through a dual-supply logic component, such as an FPGA or ASIC. Another path might be via clamp diodes, sometimes used as part of a dual-supply power-up sequencing arrangement. A prebias can cause problems with power modules that incorporate synchronous rectifiers. This is because under most operating conditions, such modules can sink as well as source output current. The 12-V input PTH modules all incorporate synchronous rectifiers, but does not sink current during startup, or whenever the Inhibit pin is held low. Conditions for Prebias Holdoff In order for the module to allow an output prebias voltage to exist (and not sink current), certain conditions must be maintained. The module holds off a prebias voltage when the Inhibit pin is held low, and whenever the output is allowed to rise under soft-start control. Power up under soft-start control occurs upon the removal of the ground signal to the Inhibit pin (with input voltage applied), or when input power is applied with Auto-Track disabled [2] To further ensure that the regulator doesn t sink output current, (even with a ground signal applied to its Inhibit), the input voltage must always be greater than the applied prebias source. This condition must exist throughout the power-up sequence [3] The soft-start period is complete when the output begins rising above the prebias voltage. Once it is complete the module functions as normal, and sinks current if a voltage higher than the nominal regulation value is applied to its output. Note: If a prebias condition is not present, the soft-start period is complete when the output voltage has risen to either the set-point voltage, or the voltage applied at the module's Track control pin, whichever is lowest. to its output. Prebias Demonstration Circuit Figure shows the startup waveforms for the demonstration circuit shown in Figure The initial rise in V O is the prebias voltage, which is passed from the VCCIO to the VCORE voltage rail through the ASIC. Note that the output current from the PTH12010L module O is negligible until its output voltage rises above the applied prebias. Figure 17. Prebias Startup Waveforms Submit Documentation Feedback
www.ti.com Up Dn Sense V =□12□VI ASIC VCORE VCCIO I 2O PTH12010L Tra ck GNDInhibit Vadj Sense V 1□=□3.3□VO V 2□=□1.8□VO 2□k/c87 10□k0 100□k/c87 11□k0 130 /c87
330 F/c109
0.68 F/c109
0.1 F/c109
- Application Circuit Demonstrating Prebias Startup Notes: Output prebias holdoff is an inherent feature to all PTH120x0L and PTV120x0W/L modules. It has now been incorporated into all modules (including W-suffix modules with part numbers of the form PTH120x0W), with a production lot date code of 0423 or later. The prebias start-up feature is not compatible with Auto-Track. If the rise in the output is limited by the voltage applied to the Track control pin, the output sinks current during the period that the track control voltage is below that of the back-feeding source. For this reason, it is recommended that Auto-Track be disabled when not being used. This is accomplished by connecting the Track pin to the input voltage, V I This raises the Track pin voltage well above the set-point voltage prior to the module s start up, thereby, defeating the Auto-Track feature. To further ensure that the regulator's output does not sink current when power is first applied (even with a ground signal applied to the Inhibit control pin), the input voltage must always be greater than the applied prebias source. This condition must exist throughout the power-up sequence of the power system. Submit Documentation Feedback
www.ti.com Remote Sense Overcurrent Protection Overtemperature Protection (OTP) PTH12010W PTH12010L SLTS205G JUNE 2003 REVISED FEBRUARY 2007 Products with this feature incorporate an output voltage sense pin, V O Sense. A remote sense improves the load regulation performance of the module by allowing it to compensate for any IR voltage drop between its output and the load. An IR drop is caused by the high output current flowing through the small amount of pin and trace resistance. To use this feature simply connect the V O Sense pin to the V O node, close to the load circuit (see data sheet standard application circuit). If a sense pin is left open-circuit, an internal low-value resistor (15- Ω or less) connected between the pin and the output node, ensures the output remains in regulation. With the sense pin connected, the difference between the voltage measured directly between the V O and GND pins, and that measured from V O Sense to GND, is the amount of IR drop being compensated by the regulator. This should be limited to a maximum of 0.3 Note: The remote sense feature is not designed to compensate for the forward drop of nonlinear or frequency dependent components that may be placed in series with the converter output. Examples include OR-ing diodes, filter inductors, ferrite beads, and fuses. When these components are enclosed by the remote sense connection, they are effectively placed inside the regulation control loop, which can adversely affect the stability of the regulator. For protection against load faults, all modules incorporate output overcurrent protection. Applying a load that exceeds the regulator's overcurrent threshold causes the regulated output to shut down. Following shutdown, a module periodically attempts to recover by initiating a soft-start power-up. This is described as a hiccup mode of operation, whereby, the module continues in a cycle of successive shutdown and power up until the load fault is removed. During this period, the average current flowing into the fault is significantly reduced. Once the fault is removed, the module automatically recovers and returns to normal operation. The PTH12020, PTV12020, and PTH12030 products have overtemperature protection. These products have an on-board temperature sensor that protects the module's internal circuitry against excessively high temperatures. A rise in the internal temperature may be the result of a drop in airflow, or a high ambient temperature. If the internal temperature exceeds the OTP threshold, the module's Inhibit control is internally pulled low. This turns the output off. The output voltage drops as the external output capacitors are discharged by the load circuit. The recovery is automatic, and begins with a soft-start power up. It occurs when the sensed temperature decreases by about C below the trip point. Note: The overtemperature protection is a last resort mechanism to prevent thermal stress to the regulator. Operation at or close to the thermal shutdown temperature is not recommended and will reduce the long-term reliability of the module. Always operate the regulator within the specified Safe Operating Area (SOA) limits for the worst-case conditions of ambient temperature and airflow. Submit Documentation Feedback
www.ti.com Margin Up/Down Controls R U or RD /C0043499 /C0068% /C004299.8 k/C0087 (2) CO +CI VI GND Margin□Down L O A D +VO +VO Margin□Up 0□V RD RU PTH12010W (Top□View) 10 9 8 7 543 GND R 0.1□W,□1% SET PTH12010W PTH12010L SLTS205G JUNE 2003 REVISED FEBRUARY 2007 The PTH12060, PTH12010, PTH12020, and PTH12030 products incorporate Margin Up and Margin Down control inputs. These controls allow the output voltage to be momentarily adjusted [1] either up or down, by a nominal 5%. This provides a convenient method for dynamically testing the operation of the load circuit over its supply margin or range. It can also be used to verify the function of supply voltage supervisors. The change is applied to the adjusted output voltage, as set by the external resistor, R SET at the V O Adjust pin. The adjustment is made by pulling the appropriate margin control input directly to the GND terminal [2] A low-leakage, open-drain device, such as an n-channel MOSFET or p-channel JFET is recommended for this purpose [3] Adjustments of less than can also be accommodated by adding series resistors to the control inputs. The value of the resistor can be selected from Table or calculated using Equation Margin Up/Down Adjust Resistance Calculation To reduce the margin adjustment to a value less than 5%, series resistors are required (See R D and R U in Figure For the same amount of adjustment, the resistor value calculated for R U and R D is the same. The formula is as follows. Where Δ The desired amount of margin adjust in percent. Notes: The Margin Up and Margin Down controls were not intended to be activated simultaneously. If they are activated simultaneously, the affect on the output voltage may not completely cancel, resulting in the possibility of a slightly higher error in the output voltage set point. The ground reference should be a direct connection to the module GND. This produces a more accurate adjustment at the load circuit terminals. The transistors and should be located close to the regulator. The Margin Up and Margin Down control inputs are not compatible with devices that source voltage. This includes TTL logic. These are analog inputs and should only be controlled with a true open-drain device (preferably a discrete MOSFET transistor). The device selected should have low off-state leakage current. Each input sources µ A when grounded, and has an open-circuit voltage of 0.8 Table Margin Up/Down Resistor Values Adjust R U R D Ω 0.0 24.9 66.5 150.0 397.0 Figure 19. Margin Up/Down Application Schematic Submit Documentation Feedback
www.ti.com TAPE AND REEL SPECIFICATIONS TRAY SPECIFICATIONS PTH12010W PTH12010L SLTS205G JUNE 2003 REVISED FEBRUARY 2007 Submit Documentation Feedback
www.ti.com 2-Jun-2025 PACKAGING INFORMATION Orderable part number Status (1) Material type (2) Package | Pins Package qty | Carrier RoHS (3) Lead finish/ Ball material (4) MSL rating/ Peak reflow (5) Op temp (°C) Part marking (6) PTH12010LAH Active Production Through-Hole Module (EUH) | 10 25 | TIW TRAY Exempt SN N/A for Pkg Type -40 to 85 PTH12010LAH.B Active Production Through-Hole Module (EUH) | 10 25 | TIW TRAY Exempt SN N/A for Pkg Type -40 to 85 PTH12010LAS Active Production Surface Mount Module (EUJ) | 10 25 | TIW TRAY No SNPB Level-1-235C-UNLIM/ Level-3-260C-168HRS -40 to 85 PTH12010LAS.B Active Production Surface Mount Module (EUJ) | 10 25 | TIW TRAY No SNPB Level-1-235C-UNLIM/ Level-3-260C-168HRS -40 to 85 PTH12010LAZ Active Production Surface Mount Module (EUJ) | 10 25 | TIW TRAY Exempt SNAGCU Level-3-260C-168 HR -40 to 85 PTH12010LAZ.B Active Production Surface Mount Module (EUJ) | 10 25 | TIW TRAY Exempt SNAGCU Level-3-260C-168 HR -40 to 85 PTH12010WAH Active Production Through-Hole Module (EUH) | 10 25 | TIW TRAY Exempt SN N/A for Pkg Type -40 to 85 PTH12010WAH.B Active Production Through-Hole Module (EUH) | 10 25 | TIW TRAY Exempt SN N/A for Pkg Type -40 to 85 PTH12010WAS Active Production Surface Mount Module (EUJ) | 10 25 | TIW TRAY No SNPB Level-1-235C-UNLIM/ Level-3-260C-168HRS -40 to 85 PTH12010WAS.B Active Production Surface Mount Module (EUJ) | 10 25 | TIW TRAY No SNPB Level-1-235C-UNLIM/ Level-3-260C-168HRS -40 to 85 PTH12010WAST Active Production Surface Mount Module (EUJ) | 10 250 | SMALL T&R No SNPB Level-1-235C-UNLIM/ Level-3-260C-168HRS PTH12010WAST.B Active Production Surface Mount Module (EUJ) | 10 250 | SMALL T&R No SNPB Level-1-235C-UNLIM/ Level-3-260C-168HRS -40 to 85 PTH12010WAZ Active Production Surface Mount Module (EUJ) | 10 25 | TIW TRAY Exempt SNAGCU Level-3-260C-168 HR -40 to 85 PTH12010WAZ.B Active Production Surface Mount Module (EUJ) | 10 25 | TIW TRAY Exempt SNAGCU Level-3-260C-168 HR -40 to 85 PTH12010WAZT Active Production Surface Mount Module (EUJ) | 10 250 | SMALL T&R Exempt SNAGCU Level-3-260C-168 HR -40 to 85 PTH12010WAZT.B Active Production Surface Mount Module (EUJ) | 10 250 | SMALL T&R Exempt SNAGCU Level-3-260C-168 HR -40 to 85 (1) Status: For more details on status, see our product life cycle. Addendum-Page 1
www.ti.com 2-Jun-2025 (2) Material type: When designated, preproduction parts are prototypes/experimental devices, and are not yet approved or released for full production. Testing and final process, including without limitation quality assurance, reliability performance testing, and/or process qualification, may not yet be complete, and this item is subject to further changes or possible discontinuation. If available for ordering, purchases will be subject to an additional waiver at checkout, and are intended for early internal evaluation purposes only. These items are sold without warranties of any kind. (3) RoHS values: Yes, No, RoHS Exempt. See the TI RoHS Statement for additional information and value definition. (4) Lead finish/Ball material: Parts may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two lines if the finish value exceeds the maximum column width. (5) MSL rating/Peak reflow: The moisture sensitivity level ratings and peak solder (reflow) temperatures. In the event that a part has multiple moisture sensitivity ratings, only the lowest level per JEDEC standards is shown. Refer to the shipping label for the actual reflow temperature that will be used to mount the part to the printed circuit board. (6) Part marking: There may be an additional marking, which relates to the logo, the lot trace code information, or the environmental category of the part. Multiple part markings will be inside parentheses. Only one part marking contained in parentheses and separated by a "~" will appear on a part. If a line is indented then it is a continuation of the previous line and the two combined represent the entire part marking for that device. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 2
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