PTB78560AAS.B

PTB78560C TI | Alldatasheet

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30-W, 24-V/48-V INPUT DC/DC CONVERTERS WITH AUTO-TRACK SEQUENCING Intermediate Bus Architectures Input Voltage: V to V Telecom, High-End Computing Platforms 30-W Total Output Power Multi-Rail Power Systems with Output Voltages: 3.3 and V Power-Up Sequencing Wide-Output Adjust/Trim Up To 88% Efficiency Overcurrent Protection Overtemperature Shutdown Undervoltage Lockout Input Overvoltage Protection Auto-Track Power-Up Sequencing (Includes Sequenced Output with PTB78560B) Smart-Sense Remote Sensing (PTB78560B) Dual-Logic Enable Control Space-Saving Footprint Surface Mount Package Lead (Pb) Free Option Available 1500-Vdc Isolation Agency Approvals (Pending): UL/cUL 60950, EN 60950 The PTB78560x is a series of W rated isolated dc/dc converters, designed to operate from a standard V or V telecom central office (CO) supply. Housed in a package, each model has a wide-adjust output voltage that can be set to one of the common intermediate bus voltages of 3.3 or The PTB78560 series incorporates Auto-Track a feature that simplifies the power-up sequencing of multiple power modules that operate from the same intermediate bus. During a power-up cycle, modules with this feature have the capability of following a common ramp voltage applied to an input called Track. The PTB78560 series is specifically designed to control the Track voltage of any number of nonisolated downstream modules powered from its output. This ensures that the outputs of the downstream modules all rise simultaneously during power up. The PTB78560B (3.3 has an additional sequenced output, V O Seq which also rises with the Track voltage. This allows the V O Seq output to power up simultaneously with the outputs from other power modules under the control of Auto-Track. Whether used to facilitate power-up sequencing, or operated as a stand-alone module, the PTB78560 series includes many other modules. Precise output voltage regulation is ensured with a differential remote sense. Operational (UVLO) and a dual-logic output enable control. Overcurrent and overtemperature protection ensure survival against load faults. Typical environments, particularly complex digital systems requiring power sequencing of multiple power supply rails. Please be aware that an important notice concerning availability, standard warranty, and use in critical sheet. Auto-Track is a trademark of Texas Instruments. PRODUCTION DATA information is current as of publication date. Copyright 2005, Texas Instruments Incorporated Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.

www.ti.com Auto− Track POL Module Track GND Adjust Auto− Track POL Module Track GND Adjust RSET To Other POL Modules *See note Simultaneous Powerup NEN Track PEN2 Notes: /C0123 Sequenced output is available in the PTB78560B model only. * The +Sense may be connected to either VO Seq or VO Bus output of the PTB78560B. /C0125 RSET is required to set the output voltage higher than the minimum value. See the Application Information section for values. # The PTB78560x modules require a minimum of 220 µF total output capacitance for proper operation. $ A minimum of 100 µF input capacitance is recommended for proper operation. R SET /C0125 C O # (Required) C I $ (Required) /C0123 VO Seq /C0123 VO Seq VPOL 1 VPOL 2 * +Sense −Sense VO Bus PTB78560x +VI −VI VO Adjust VO COM −VI +VI C I # R SET C O /C0123 VO Seq (3.3 V) C O VOVI VOVI C I # VPOL 1 VPOL 2 PTB78560A PTB78560B PTB78560C SLTS249 JUNE 2005 These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. Typical Circuit Submit Documentation Feedback

www.ti.com ABSOLUTE MAXIMUM RATINGS PACKAGE SPECIFICATIONS PTB78560A PTB78560B PTB78560C SLTS249 JUNE 2005 ORDERING INFORMATION PTB78560 (Base Pt. No.) Output Voltage Range Part Number Ref. (1) PTB78560AAH Horizontal T/H ERW 3.6 V to 5.5 V PTB78560AAS SMD, Standard (2) ERY PTB78560AAZ SMD, Standard (3) PTB78560BAH (4) Horizontal T/H ERW 1.8 V to 3.6 V PTB78560BAS (4) SMD, Standard (2) ERY PTB78560BAZ (4) SMD, Standard (3) PTB78560CAH Horizontal T/H ERW V to 13.2 V PTB78560CAS SMD, Standard (2) ERY PTB78560CAZ SMD, Standard (3) (1) See the applicable package reference drawing for the dimensions and PC board layout. (2) Standard option specifies 63/37, Sn/Pb pin solder material. (3) Lead-free (Pb-free) option specifies Sn/Ag pin solder material. (4) Includes an Auto-Track compatible output, V O Seq which sequences with the Track control during power up. UNIT Continuous V V I Input Voltage Surge, s max 100 V (1) V (Track) Track input voltage V to V O Bus 0.3 V I (Track) max Track input current From external source mA (2) T A Operating temperature range Over V I range C to C Overtemperature protection PCB temperature (near pin 115 C PTB78560xAS 235 C (3) Surface temperature of module T (REFLOW) Solder reflow temperature or pins PTB78560xAZ 260 C (4) T stg Storage temperature C to 125 C (1) The converter's internal protection circuitry may cause the output to turn off when the applied input voltage is greater than (2) When the Track input is fed from an external voltage source, the input current must be limited. A 2.74-k Ω value series resistor is recommended. (3) During solder reflow of standard SMD package version, do not elevate the module PCB, pins, or internal component temperatures above a peak of 235 (4) During solder reflow of Pb free SMD package version, do not elevate the module PCB, pins, or internal component temperatures above a peak of 260 PTB78560x (Suffixes AH, AS, and AZ) Weight 13.6 grams Flammability Meets UL94V-O Horizontal T/H (Suffix AH) 500 G (1) Per Mil-STD-883D, Method 2002.3, ms, Mechanical shock Sine, mounted Horizontal SMD (Suffix AS) 250 G (1) Horizontal T/H (Suffix AH) G (1) Mil-STD-883D, Method 2007.2, 20-2000 Hz, Mechanical vibration Horizontal SMD (Suffix AS G (1) PCB mounted and AZ) (1) Qualification limit. Submit Documentation Feedback

www.ti.com PTB78560B ELECTRICAL CHARACTERISTICS PTB78560A PTB78560B PTB78560C SLTS249 JUNE 2005 (Unless otherwise stated, T A V I V O 3.3 C O 330 µ and I O I O max) PTB78560B PARAMETER TEST CONDITIONS UNIT MIN TYP MAX Over V I range I O Bus 0.25 (1) (2) I O Output current I O Seq (3) A Sum total, O Bus I O Seq) 0.25 V I Input voltage range Over I O range V Set-point voltage tolerance (4) O Temperature variation -40 C T A C 0.5 O Line regulation Over V I range mV V O Load regulation Over I O range mV Total output voltage variation Includes set-point, line, load, C T A C (4) O Adjust range Over V I range 1.8 3.6 V R SET 5.36 k Ω V O 3.3 V 80% η Efficiency R SET 40.2 k Ω V O 2.5 V 77% R SET open V O 1.8 V 73% V O Ripple (peak-to-peak) 20-MHz bandwidth mV pp 0.1 µ s load step, Recovery time 100 µ s 50% to 100% Transient response I O max C O 330 V O over/undershoot 150 mV µ F Input current Track connected to -Sense -0.13 mA Track input (pin Open-circuit voltage V O Bus Input slew rate limits 0.1 (5) V/ms Referenced to I Input high voltage IH Open (6) V Output enable inputs (pins Input low voltage IL -0.2 0.8 Input low current IL 0.8 mA Standby input current Pins and open mA I O (tot) Overcurrent threshold Shutdown, followed by autorecovery A V I increasing UVLO Undervoltage lockout V V I decreasing ƒ S Switching frequency Over V I range 400 500 600 kHz Internal input capacitance µ F External input capacitance Between I and V I 100 µ F External output capacitance Between both outputs and V O COM 220 330 5,000 µ F Isolation voltage Input-output 1,500 Vdc Isolation capacitance Input-output 2,000 pF Isolation resistance Input-output M Ω Telcordia SR-332 50% stress, T A ground MTBF Reliability 3.6 Hr benign (1) The converter requires a minimum load current at either the V O Seq or V O Bus output for proper operation. The converter is not damaged when operated under a no-load condition. (2) See temperature derating curves for safe operating area (SOA), to determine output current derating at elevated ambient temperatures. (3) When load current is supplied from the V O Seq output, the module exhibits higher power dissipation and slightly lower operating efficiency. (4) The set-point voltage tolerance is affected by the tolerance and stability of R SET The stated limit is unconditionally met if R SET has a tolerance of 1%, with 100 ppm/ C temperature stability. (5) When controlling the Track input from an external source, the slew rate of the applied signal must be greater than the minimum limit. Failure to allow the voltage to completely rise to the voltage at the V O (bus) output, at no less than the minimum specified rate, may thermally overstress the converter. (6) The PEN and NEN inputs each have an internal pullup resistor. If the enable feature is not used, the PEN input (pin should be left open circuit and the NEN input (pin permanently connected to V I A discrete MOSFET or bipolar transistor is recommended for the enable control. The open-circuit voltage is less than See the Application Information for a more detailed description. Submit Documentation Feedback

www.ti.com PTB78560A ELECTRICAL CHARACTERISTICS PTB78560A PTB78560B PTB78560C SLTS249 JUNE 2005 (Unless otherwise stated, T A V I V O C O 220 µ and I O I O max) PTB78560A PARAMETER TEST CONDITIONS UNIT MIN TYP MAX I O Output current Over V I range I O Bus 0.25 (1) (2) A V I Input voltage range Over I O range V Set-point voltage tolerance (3) O Temperature variation -40 C T A C 0.5 O Line regulation Over V I range 0.2 O V O Load regulation Over I O range 0.4 O Total output voltage variation Includes set-point, line, load, C T A C (3) O Adjust range Over V I range 3.6 5.5 V η Efficiency R SET 14.3 k Ω V O V 83% V O Ripple (peak-to-peak) 20-MHz bandwidth O 0.1 µ s load step, Recovery time 100 µ s Transient response 50% to 100% V O over/undershoot 200 mV I O max Input current Track connected to -Sense 0.2 mA Track input (pin Open-circuit voltage V O Bus Referenced to I Input high voltage IH Open (4) V Output enable inputs (pins Input low voltage IL -0.2 0.8 Input low current IL 0.8 mA Standby input current Pins and open mA I O Bus Overcurrent threshold Shutdown, followed by autorecovery A V I increasing UVLO Undervoltage lockout V V I decreasing ƒ S Switching frequency Over V I range 400 500 600 kHz Internal input capacitance µ F External input capacitance Between I and V I 100 µ F External output capacitance Between both outputs and V O COM 220 5,000 µ F Isolation voltage Input-output 1,500 Vdc Isolation capacitance Input-output 2,000 pF Isolation resistance Input-output M Ω Telcordia SR-332 50% stress, T A ground MTBF Reliability 3.6 Hr benign (1) The converter requires a minimum load current for proper operation. The converter is not damaged when operated under a no-load condition. (2) See temperature derating curves for safe operating area (SOA), to determine output current derating at elevated ambient temperatures. (3) The set-point voltage tolerance is affected by the tolerance and stability of R SET The stated limit is unconditionally met if R SET has a tolerance of 1%, with 100 ppm/ C temperature stability. (4) The PEN and NEN inputs each have an internal pullup resistor. If the enable feature is not used, the PEN input (pin should be left open circuit and the NEN input (pin permanently connected to V I A discrete MOSFET or bipolar transistor is recommended for the enable control. The open-circuit voltage is less than See the Application Information for a more detailed description. Submit Documentation Feedback

www.ti.com PTB78560C ELECTRICAL CHARACTERISTICS PTB78560A PTB78560B PTB78560C SLTS249 JUNE 2005 (Unless otherwise stated, T A V I V O C O 100 µ and I O I O max) PTB78560C PARAMETER TEST CONDITIONS UNIT MIN TYP MAX I O Output current Over V I range I O Bus 0.1 (1) 2.5 (2) A V I Input voltage range Over I O range V Set-point voltage tolerance (3) O Temperature variation -40 C T A C 0.5 O Line regulation Over V I range 0.2 O V O Load regulation Over I O range 0.4 O Total output voltage variation Includes set-point, line, load, C T A C (3) O Adjust range Over V I range 13.2 V R SET 9.09 k Ω V O =12 V 88% η Efficiency R SET open, V O V 86% V O Ripple (peak-to-peak) 20-MHz bandwidth O 0.1 µ s load step, Recovery time 100 µ s Transient Response 50% to 100% V O over/undershoot 150 mV I O max Input current Track connected to -Sense 0.48 mA Track input (pin Open-circuit voltage V O Bus Referenced to I Input high voltage IH Open (4) V Output enable inputs (pins Input low voltage IL -0.2 0.8 Input low current IL 0.8 mA Standby input current Pins and open mA I O Bus Overcurrent threshold Shutdown, followed by autorecovery 3.75 A V I increasing UVLO Undervoltage lockout V V I decreasing ƒ S Switching frequency Over V I range 400 500 600 kHz Internal input capacitance µ F External input capacitance Between I and V I 100 µ F External output capacitance Between both outputs and V O COM 100 1,500 µ F Isolation voltage Input-output 1,500 Vdc Isolation capacitance Input-output 2,000 pF Isolation resistance Input-output M Ω Telcordia SR-332 50% stress, T A ground MTBF Reliability 3.4 Hrs benign (1) The converter requires a minimum load current for proper operation. The converter is not damaged when operated under a no-load condition. (2) See temperature derating curves for safe operating area (SOA), to determine output current derating at elevated ambient temperatures. (3) The set-point voltage tolerance is affected by the tolerance and stability of R SET The stated limit is unconditionally met if R SET has a tolerance of 1%, with 100 ppm/ C temperature stability. (4) The PEN and NEN enable inputs each have an internal pullup resistor. If the enable feature is not used, the PEN input (pin should be left open circuit and the NEN input (pin permanently connected to V I A discrete MOSFET or bipolar transistor is recommended for the enable control. The open-circuit voltage is less than See the Application Information for a more detailed description. Submit Documentation Feedback

www.ti.com PTB78560x (Top View) NEN Track PEN VO Seq +Sense −Sense VO Bus +VI VO Adjust VO COM −VI PTB78560A PTB78560B PTB78560C SLTS249 JUNE 2005 TERMINAL FUNCTIONS TERMINAL NO. The positive input for the module with respect to I When powering the module from a negative input voltage, I (1) this input is connected to the input source ground. The negative input supply for the module, and the 0-V reference for the PEN and NEN enable inputs. When I (1) powering the module from a positive source, this input is connected to the input source return. An open-collector (open-drain) positive logic input that is referenced to I When this input is pulled to I PEN (1) potential the converter output is disabled. This input must be open circuit for the converter to operate. The converter then produces an output whenever a valid input source is applied. An open-collector (open-drain) negative logic input that is referenced to I This input must be pulled to I potential to enable the converter. When the input is open circuit, the converter output is disabled. If the enable NEN (1) (2) feature is not used, this input should be permanently connected to I The module then produces an output whenever a valid input source is applied. This is the positive power output with respect to V O COM and the main output from the converter. It is dc isolated from the input power pins and produces a valid output voltage approximately ms before the voltage at the V O Bus Track terminal is allowed to rise. This provides the required standby power source to any downstream nonisolated modules in power-up sequencing applications. This is a sequenced output voltage from the converter that is controlled by the Track terminal during power-up transitions. It is only available to the PTB78560B, and used with the output voltage set to 3.3 V (an I/O supply V O Seq voltage). During power up, the voltage at V O Seq rises with the Track terminal, typically ms after the V O Bus output has reached regulation. This is the output power return for both the V O Bus and V O Seq output voltages. This terminal should be V O COM connected to the common of the load circuit. This terminal is used in power-up sequencing modules, powered from the converter V O Bus output. This includes the converter V O Seq output on the PTB78560B. The converter Track control has an internal transistor, which holds the voltage close to V O COM Track potential for approximately ms (40 ms with the PTB78560C) after the V O Bus output is in regulation. Following this delay, the Track voltage and V O Seq rises simultaneously with the output voltage of all other modules controlled by Auto-Track. Provides the converter with a remote sense capability when used with +Sense For optimum output voltage Sense accuracy, this pin should always be connected to V O COM close to the load circuit. This terminal is also the reference connection for both the output voltage set-point resistor and Track control. A resistor must be connected between this terminal and -Sense to set the converter output voltage. A 0.05-W rated resistor may be used, with tolerance and temperature stability of and 100 ppm/ respectively. If left V O Adjust open circuit, the converter output voltage defaults to its lowest value. The specification table gives the standard resistor values for the most common output voltages. The +Sense pin can be connected to V O Bus (or V O Seq output. When connected to V O Seq remote sense compensation is delayed until the converter's power-up sequence is complete. The voltage at V O Bus is also +Sense raised slightly. The +Sense input may be left open circuit, but connecting it to one of the output terminals improves load regulation of that output. (1) These functions indicate signals electrically common with the input. (2) Denotes negative logic: Low V I Normal operation, Open Output off Terminal Locations Submit Documentation Feedback

www.ti.com TYPICAL CHARACTERISTICS PTB78560B Characteristic Data O 1.8 (1) (2) 2 3 5 6 7 84 I O − Output Current − A VO − Output Voltage − mVPP 4 6 8 VI=18 V IO − Output Current − A Efficiency − % VI=24 V VI=60 V VI=48 V VI=36 V 4 6 8 I O − Output Current − A PD − Power Dissipation − W VI=18 V VI=24 V VI=60 V VI=48 V VI=36 V 0 1 2 3 5 6 7 8 4

400 LFM

IO − Output Current − A TA − Ambient Temperature −/charBnZrBnZrBnZrBnZrBnZrBnZrBnZrBnZr°C

200 LFM

100 LFM

0 LFM

(Natural Convection) 0 1 2 3 5 6 7 8 4 IO − Output Current − A TA − Ambient Temperature − °C (Natural Convection) PTB78560A PTB78560B PTB78560C SLTS249 JUNE 2005 EFFICIENCY POWER DISSIPATION OUTPUT VOLTAGE RIPPLE vs vs vs OUTPUT CURRENT OUTPUT CURRENT OUTPUT CURRENT Figure Figure Figure TEMPERATURE DERATING TEMPERATURE DERATING vs vs OUTPUT CURRENT I OUTPUT CURRENT I Figure Figure (1) All data listed in Figure Figure and have been developed from actual products tested at This data is considered typical data for the dc-dc converter. (2) All data listed in Figure Figure and have been developed from actual products tested at This data is considered typical data for the dc-dc converter. Submit Documentation Feedback

www.ti.com PTB78560B Characteristic Data O 3.3 (3) (4) 2 3 5 6 7 84 I O − Output Current − A VO − Output Voltage − mVPP IO − Output Current − A PD − Power Dissipation − W VI=24 V VI=18 V VI=60 V VI=48 V VI=36 V 4 6 8 4 6 8 IO − Output Current − A Efficiency − % VI=18 V VI=24 V VI=60 V VI=48 V VI=36 V 0 1 2 3 5 6 7 8 4 IO − Output Current − A TA − Ambient Temperature − °C (Natural Convection) 0 1 2 3 5 6 7 8 4 IO − Output Current − A TA − Ambient Temperature − °C (Natural Convection) PTB78560A PTB78560B PTB78560C SLTS249 JUNE 2005 TYPICAL CHARACTERISTICS (continued) EFFICIENCY POWER DISSIPATION OUTPUT VOLTAGE RIPPLE vs vs vs OUTPUT CURRENT OUTPUT CURRENT OUTPUT CURRENT Figure Figure Figure TEMPERATURE DERATING TEMPERATURE DERATING vs vs OUTPUT CURRENT I OUTPUT CURRENT I Figure Figure 10. (3) All data listed in Figure Figure and Figure have been developed from actual products tested at This data is considered typical data for the dc-dc converter. (4) The temperature derating curves represent operating conditions at which internal components are at or below manufacturer's maximum rated operating temperature. Derating limits apply to modules soldered directly to a 100 mm 100 mm, double-sided PCB with oz. copper. Applies to Figure and Figure Submit Documentation Feedback

www.ti.com PTB78560A Characteristic Data O (5) (6) 2 3 5 6 4 VI=18 V IO − Output Current − A VO − Output Voltage − mVPP VI=24 V VI=60 V VI=48 V VI=36 V 4 6 1 53 VI=18 V IO − Output Current − A PD − Power Dissipation − W VI=24 V VI=60 V VI=48 V VI=36 V 100 1 3 6 4 VI=18 V IO − Output Current − A Efficiency − % VI=24 V VI=60 V VI=48 V VI=36 V 1 2 3 5 6 4 IO − Output Current − A TA − Ambient Temperature − °C (Natural Convection) 1 2 3 5 6 4 IO − Output Current − A TA − Ambient Temperature − °C (Natural Convection) PTB78560A PTB78560B PTB78560C SLTS249 JUNE 2005 TYPICAL CHARACTERISTICS (continued) EFFICIENCY POWER DISSIPATION OUTPUT VOLTAGE RIPPLE vs vs vs OUTPUT CURRENT OUTPUT CURRENT OUTPUT CURRENT Figure 11. Figure 12. Figure 13. TEMPERATURE DERATING TEMPERATURE DERATING vs vs OUTPUT CURRENT I OUTPUT CURRENT I Figure 14. Figure 15. (5) All data listed in Figure and Figure have been developed from actual products tested at This data is considered typical data for the dc-dc converter. (6) The temperature derating curves represent operating conditions at which internal components are at or below manufacturer's maximum rated operating temperature. Derating limits apply to modules soldered directly to a 100 mm 100 mm, double-sided PCB with oz. copper. Applies to Figure and Figure Submit Documentation Feedback

www.ti.com PTB78560C Characteristic Data O (7) (8) 0.5 1.0 2.0 2.5 1.5 IO − Output Current − A PD − Power Dissipation − W VI=60 V VI=48 V VI=18 V VI=24 V VI=36 V 0.5 1.0 1.5 2.5 2.0 VI=18 V IO − Output Current − A Efficiency − % VI=24 V VI=60 V VI=48 V VI=36 V VI=18 V IO − Output Current − A VO − Output Voltage − mVPP VI=24 V VI=60 V VI=48 V VI=36 V IO − Output Current − A TA − Ambient Temperature − °C (Natural Convection) IO − Output Current − A TA − Ambient Temperature − °C (Natural Convection) PTB78560A PTB78560B PTB78560C SLTS249 JUNE 2005 TYPICAL CHARACTERISTICS (continued) EFFICIENCY POWER DISSIPATION OUTPUT VOLTAGE RIPPLE vs vs vs OUTPUT CURRENT OUTPUT CURRENT OUTPUT CURRENT Figure 16. Figure 17. Figure 18. TEMPERATURE DERATING TEMPERATURE DERATING vs vs OUTPUT CURRENT I OUTPUT CURRENT I Figure 19. Figure 20. (7) All data listed in Figure Figure and Figure have been developed from actual products tested at This data is considered typical data for the dc-dc converter. (8) The temperature derating curves represent operating conditions at which internal components are at or below manufacturer's maximum rated operating temperature. Derating limits apply to modules soldered directly to a 100 mm 100 mm, double-sided PCB with oz. copper. Applies to Figure Submit Documentation Feedback

www.ti.com APPLICATION INFORMATION Operating t − Time − 5 ms/div tDLY II (1 A/ div) UVLO Threshold VI (10 V/ div) VO (5 V/ div) Overcurrent Protection PTB78560A PTB78560B PTB78560C SLTS249 JUNE 2005 These converters incorporate electrical isolation between the input terminals (primary) and the output terminals (secondary). All converters are tested to a withstand voltage of 1500 VDC. This complies with UL/cUL 60950 and EN 60950 and the requirements for functional isolation. It allows the converter to be configured for either a positive or negative input voltage source. The data sheet Terminal Functions table provides guidance as to the correct reference that must be used for the external control signals. The undervoltage lockout (UVLO) is designed to prevent the operation of the converter until the input voltage is close to the minimum operating voltage. The converter is held off when the input voltage is below the UVLO threshold, and turns on when the input voltage rises above the threshold. This prevents high start-up current during normal power up of the converter, and minimizes the current drain from the input source during low input voltage conditions. The converter meets full specifications when the minimum specified input voltage is reached. The UVLO circuitry also overrides the operation of the PEN and NEN enable controls. Only when the input voltage is above the UVLO threshold do these inputs become functional. When the converter is first powered, the internal soft-start circuit limits how fast the output voltage can rise. The soft-start circuit functions whenever the converter output is enabled from the PEN and NEN inputs, or when a valid input source is first applied with the output enabled. It also functions on a recovery from a load fault, overtemperature, or input overvoltage condition. The purpose of the soft-start feature is to limit the surge of current drawn from the input source when the converter begins to operate. By limiting the rate at which the output voltage rises, the magnitude of current required to charge up the load circuit capacitance is significantly reduced. Figure shows the power-up characteristic of a PTB78560C converter. The output voltage is set to The soft-start circuit introduces a short time delay (typically 10-15 ms) before allowing the output to rise. The output then progressively rises to the voltage set-point. The waveforms were recorded with a resistive load of 2.5 Figure 21. Soft-Start Waveform To protect against load faults, these converters incorporate output overcurrent protection. Applying a load to the Submit Documentation Feedback

www.ti.com Input Overvoltage Protection Differential Output Voltage Sense Overtemperature Protection Output Voltage Adjustment PTB78560A PTB78560B PTB78560C SLTS249 JUNE 2005 APPLICATION INFORMATION (continued) output that exceeds the converter overcurrent threshold (see applicable specification) causes the output voltage to momentarily fold back, and then shut down. Following shutdown, the module periodically attempts to automatically recover by initiating a soft-start power up. This is often described as a hiccup mode of operation, whereby the module continues in the cycle of successive shutdown and power up until the load fault is removed. Once the fault is removed, the converter automatically recovers and returns to normal operation. The converter protects itself against input voltage surges and transients of up to 100 This is above the maximum continuous operating input voltage of In order to protect itself, the converter output is disabled at some voltage above This is to ensure that the converter internal components are not exposed to voltages above their stress ratings. The converter output remains off for some of the period that the input voltage is above the maximum continuous rating. Once the overvoltage event has passed, the output from the converter automatically restarts by executing a soft-start power up. A differential remote sense allows a converter regulation circuitry to compensate for limited amounts of IR drop, that may be incurred between the converter and load, in either the positive or return PCB traces. Connecting the +Sense and Sense pins to the respective positive and ground reference of the load terminals improves the load regulation of the converter output voltage at that connection point. The Sense pin should always be connected to the V O COM The +Sense pin may be connected to either the O Bus or O Seq outputs. When the +Sense pin is connected to the V O Seq output, the voltage at V O Bus voltage regulates slightly higher. Depending on the load conditions on the V O Seq output, the voltage at V O Bus may be up to 100 mV higher than the converter set-point voltage. In addition, the Smart-Sense feature (incorporated into the converter) only engages sense compensation to the V O Seq output when that output voltage is close to the set-point. During a power-up sequencing event, the sense circuit automatically defaults to sensing the V O Bus voltage, internal to the converter. Leaving the +Sense and Sense pins open does not damage the converter or load circuit. The converter includes default circuitry that keeps the output voltage in regulation. However, if the remote sense feature is not used, the Sense pin should still be connected to V O COM Note: The remote sense feature is not designed to compensate for the forward drop of nonlinear or frequency-dependent components that may be placed in series with the converter output. Examples include OR-ing diodes, filter inductors, ferrite beads, and fuses. When these components are enclosed by the sense pin connections, they are effectively placed inside the regulation control loop, which can adversely affect the stability of the converter. Overtemperature protection is provided by an internal temperature sensor, which monitors the temperature of the converter PCB (close to pin 1). If the PCB temperature exceeds a nominal 115 the converter shuts down. The converter then automatically restarts when the sensed temperature falls to approximately 105 When operated outside its recommended thermal derating envelope (see data sheet derating curves), the converter typcially cycles on and off at intervals from a few seconds to one or two minutes. This is to ensure that the internal components are not permanently damaged from excessive thermal stress. An external resistor is required to set the nominal output voltage(s) of the converter to a voltage higher than its minimum value. The resistor, R SET must be connected directly between the V O Adjust (pin and Sense (pin terminals. A 0.05-W rated resistor can be used. The tolerance should be 1%, with a temperature stability of 100 ppm/ C (or better). Place the resistor close to the converter and connect it using dedicated PCB traces (see Figure Table gives the nearest standard value of external resistor for the common voltages within each model's adjust range. The actual output voltage that the resistor value provides is also provided. Submit Documentation Feedback

www.ti.com R SET /C0043R O /C0032V R V O /C0042V MIN /C0042R P (1) C I 100 µF Track −Sense +VI −VI NEN PTB78560A PEN +Sense VO Bus VO Adjust VO COM R SET −VI +VI C O 220 µF PTB78560A PTB78560B PTB78560C SLTS249 JUNE 2005 Table Standard Values of R SET for Common Output Voltages PTB78560A PTB78560B PTB78560C V O (Required) R SET V O (Actual) R SET V O (Actual) R SET V O (Actual) 1.8 V Open 1.802 V V 200 k Ω 2.004 V 2.5 V 40.2 k Ω 2.498 V 3.3 V 5.36 k Ω 3.300 V 3.6 V Open 3.611 V 309 Ω 3.600 V V 14.3 k Ω 5.005 V V Open 9.015 V V 73.2 k Ω 9.993 V V 9.09 k Ω V 13.2 V Ω 13.23 V For other output voltages, the value of the required adjust resistor may be calculated using Equation Table gives the output voltage adjust range and the required equation constants for the converter model selected. To calculate the required value of R SET simply locate the applicable constants and substitute these into the formula along with the desired output voltage. Table Adjust Ranges and Equation Constants Model PTB78560A PTB78560B PTB78560C V R 1.24 V 1.24 V 2.5 V R O 49.91 k Ω 36.55 k Ω 37.27 k Ω R P 30.1 k Ω 24.9 k Ω 22.1 k Ω V MIN 3.61 V 1.8 V 9.02 V V MAX 5.5 V 3.6 V 13.2 V Figure 22. Output Voltage Adjustment Submit Documentation Feedback

www.ti.com Input Current Limiting Thermal Considerations Using the On/Off Enable Controls on the PTB78560x Auto-Track Compatible DC/DC Converters Automatic (UVLO) Power Up Positive Output Enable (Negative Inhibit) DC/DC Module PEN NEN 1+VI −VI +VI −VI 1 = Outputs Off BSS138 PTB78560A PTB78560B PTB78560C SLTS249 JUNE 2005 The converter is not internally fused. For safety and overall system protection, the maximum input current to the converter must be limited. Active or passive current limiting can be used. Passive current limiting can be a fast-acting fuse. A 125-V fuse, rated no more than is recommended. Active current limiting can be implemented with a current limited Hot-Swap controller. Airflow may be necessary to ensure that the module can supply the desired load current in environments with elevated ambient temperatures. The required airflow rate is determined from the safe operating area (SOA). The SOA is the area beneath the applicable airflow rate curve on the graph of temperature derating vs output current. (See the Typical Characteristics.) Operating the converter within the SOA limits ensures that all the internal components are at or below their stated maximum operating temperatures. The converter incorporates two output enable controls. PEN (pin is the positive enable input, and NEN (pin is the negative enable input. Both inputs are electrically referenced to I (pin on the primary or input side of the converter. The enable pins are ideally controlled with an open-collector (or open-drain) discrete transistor. Each input has an internal pullup resistor to a reference. There is no benefit to adding pullup resistors external to the module. If they are added, the maximum input voltage for these inputs must be limited to a maximum of Connecting NEN (pin to I (pin and leaving PEN (pin open-circuit, configures the converter for automatic power up. The converter control circuitry incorporates an undervoltage lockout (UVLO) function, which disables the converter until the minimum specified input voltage is present at V I (see the Electrical Characteristics table). The UVLO circuitry ensures a clean transition during power up and power down, allowing the converter to tolerate a slow rising input voltage. For most applications, the PEN and NEN enable controls can be configured for automatic power up. To configure the converter for a positive enable function, connect NEN (pin to I (pin 4), and apply the system On/Off control signal to PEN (pin 2). In this configuration, applying less than 0.8 V (with respect to I potential) to pin disables the converter output. Figure gives an example circuit that uses a MOSFET transistor. Figure 23. Positive Enable Configuration Submit Documentation Feedback

www.ti.com Negative Output Enable (Positive Inhibit) DC/DC Module PEN NEN 1+VI -VI +VI -VI 1□=□Outputs□On BSS138 On/Off Enable Turn-On Time t − 5 ms/div Q1 VDS (5 V/div) II (1 A/div) VO Bus (5 V/div) PTB78560A PTB78560B PTB78560C SLTS249 JUNE 2005 To configure the converter for a negative enable function, PEN (pin is left open circuit, and the system On/Off control signal is applied to NEN (pin 3). A low-level control signal (less than 0.8 must then be applied to pin to enable an output from the converter. An example of this configuration is detailed in Figure Figure 24. Negative Enable Configuration Once enabled, the converter executes a soft-start power up. The converter exibits a short delay of approximately ms, measured from the transition of the enable signal to the instance the V O Bus output begins to rise. The output is in regulation within ms. Figure 25. Output Enable Power-Up Characteristic Submit Documentation Feedback

www.ti.com Sequenced Power Up with POL Modules Overview Auto-Track V O Bus. In power sequencing applications, V O Bus is used as the intermediate supply voltage for powering one or more downstream nonisolated power modules that incorporate Auto-Track The output voltage from Auto-Track compliant modules can be sequenced using a control input called Track. The Track input directly controls the output of a module from zero to its set-point voltage. The control is on a volt-for-volt basis, and allows multiple modules to follow a common analog signal during power-up events. The Track signal attempts to start rising when the nonisolated modules are first powered from V O Bus. However, for proper sequencing, the voltage must be held at ground potential for at least ms (40 ms for 12-V input modules) after V O Bus is in regulation. This is necessary to allow time for the nonisolated modules to complete their power-up initialization. The Track pin of each PTB78560x converter has an internal open-drain transistor that automatically holds the Track signal at ground potential to comply with this requirement. The PTB78560B (1.8 V to 3.6 has a V O Seq output. V O Seq is internally derived from V O Bus and regulated to the same set-point voltage. It has the added feature of being controlled by the Track input. During power up, this output can sequence with the outputs of the nonisolated modules powered from V O Bus. Figure shows a block diagram of the converter Auto-Track features. The components shaded are only present in the PTB78560B. During power up, V O Bus rises promptly, after the converter is connected to a valid input source and its output is enabled. V O Seq (PTB78560B) is the Auto-Track compatible output that is controlled by the voltage presented at the Track terminal. The control is active from V up to a voltage just below the V O Bus output. Between these limits, the voltage at V O Seq follows that at the Track terminal. Once the Track voltage is at the V O Bus voltage, raising it higher has no further effect. The voltage at V O Seq cannot go higher than V O Bus, and if connected to +Sense, it regulates at the set-point voltage. The Track input to the PTB78560x series of converters include a pullup resistor TRK to V O Bus, and a µ F capacitor TRK to -Sense. These components are standard on all Auto-Track compatible modules. They form an R C time constant that cause the Track voltage to rise when the internal MOSFET is turned off. The unity-gain relationship between V O Seq and the Track input is the same as all other Auto-Track compliant outputs. The V O Seq output also follows a compatible external ramp waveform applied to the Track pin. The internal MOSFET is designed to hold the Track voltage at ground potential for the required period after the V O Bus output is in regulation. Submit Documentation Feedback

www.ti.com ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Supply Supervisor 20 ms Delay + Sense Track Smart SenseTo Internal Error Amplifier R TRK 24.9 kΩ VO Bus VO Seq C TRK 1 µF VO COM Note: Shaded functions are available only with the PTB78560B (3.3−V output) Notes: Power-Up Sequencing With A V O SEQ Output (PTB78560B) PTB78560A PTB78560B PTB78560C SLTS249 JUNE 2005 Figure 26. Block Diagram of Auto-Track a Track input that can take direct control of the output voltage during power-up transistions. The control relationship is on a volt-for-volt basis and is active between the V and the module set-point voltage. Once the Track input is above the set-point voltage, the module remains at its set-point. Connecting the Track input of a number of such modules together allows their outputs to follow a common control voltage during power up. When +Sense is connected to the V O Seq output of the PTB78560B, the V O Seq output is tightly regulated to the set-point voltage. In this configuration, the voltage at the V O Bus output is up to 100 mV higher. The V O Seq output on the PTB78560B cannot sink load current. This constraint does not allow the module to coordinate a sequenced power down. The slew rate for the Track input signal must be between 0.1 V/ms and V/ms. Above this range, the V O Seq output may no longer accurately follow the Track input voltage. A slew rate below this range may thermally stress the converter. These slew rate limits are automatically met whenever the Track voltage is controlled by the internal R-C time constant of the modules being sequenced. If an external voltage is used to control the Track terminal, the source current must be limited. A resistance value of 2.74-k Ω is recommended for this purpose. This is necessary to protect the internal transistor to the converter. This transistor holds the track control voltage at ground potential for at least ms after the V O Bus output is in regulation. Figure shows the PTB78560B converter (U1) providing two 3.3-V sources. This allows it to both power and sequence with one or more downstream nonisolated modules. The example shows two 3.3-V input PTH04000W modules (U2 and U3), each rated for up to A of output current. The selection and current rating of the nonisolated modules depends on the requirements of a specific application. The number of modules, their respective output voltage, and load current rating combine with the load required at the V O Seq output. The total must be supplied by the PTB78560B, and cannot exceed that available at the V O Bus output. The output voltage adjust range of the PTB78560B is 1.8 V to 3.6 In these applications, the output voltage Submit Documentation Feedback

www.ti.com t − 20 ms/div VO Bus (1 V/div) td = 20 ms V(POL)2 (1 V/div) VO Seq (1 V/div) V(POL)1 (1 V/div) PTB78560A PTB78560B PTB78560C SLTS249 JUNE 2005 must always be set to 3.3 V (R1 5.36 k Ω This sets the output voltage of both the V O Bus and V O Seq outputs. The output voltage of the 3.3-V input (nonisolated) modules, and U3, can be set to any voltage over the range, 0.8 V to 2.5 In this example, they are set to 2.5 V (R2 2.32 k Ω and 1.8 V (R3 6.65 k Ω respectively. Figure shows the power-up waveforms from Figure when the Track input to all three modules are simply connected together. The converter provides input power to the downstream nonisolated modules via the V O Bus output. This output rises first to allow the nonisolated modules to complete their power-up initialization. The V O Seq (3.3 V), V (POL) (2.5 and V (POL) (1.8 V), outputs supply the load circuit, and rise simultaneously when the converter removes the internal ground signal to its own Track input. The V O Seq output rises with the outputs from the nonisolated modules, until it reaches its set-point voltage. Figure 27. Power-Up Waveforms with POL Modules Submit Documentation Feedback

www.ti.com 1 5 Track GNDInhibit Adjust 1 5 Track GNDInhibit Adjust Track −Sense−VI NEN PEN VO Seq +Sense VO Bus VO Adjust VO COM C I 100 µF −VI +VI 220 µF 5.36 kΩ 47 µF PTH04000W VO Seq (3.3 V) VPOL 1 (2.5 V) VPOL 2 (1.8 V) 47 µF 47 µFR3 6.65 kΩC5 47 µF 2.32 kΩ VOVI VO PTH04000W PTB78560B VI +VI Power-Up Sequencing Without A V O SEQ Output (PTB78560A/C) PTB78560A PTB78560B PTB78560C SLTS249 JUNE 2005 Figure 28. Power-Up Sequencing With Nonisolated POL Modules Although the PTB78560A or PTB78560C do not have a V O Seq output, they can provide the input power and coordinate the power-up sequencing to two or more nonisolated, Auto-Track compliant power modules. Figure shows the PTB78560A converter (U1) configured to provide both the input source and the power-up sequence timing to two 5-V input nonisolated modules. The example shows two PTH04000W modules (U2 and U3), each rated for up to A of output current. In this case, the number of downstream modules, and their respective output voltage and load current rating, is only limited by the amount of current available at the V O Bus output. The output voltage of the PTB78560 must be set to a valid intermediate supply voltage. This depends on the input voltage requirements of the downstream modules. For 5-V input modules, the PTB78560A is selected and adjusted for an output of For 12-V input modules, the PTB78560C is used and adjusted for an output of and U3, can be set to any voltage over their applicable adjustment range. In this example, they are again set to 2.5 V (R2 2.32 k Ω and 1.8 V (R3 6.65 k Ω respectively. Figure shows the power-up waveforms from Figure when the Track control of all three modules are simply connected together. The PTB78560 converter (U1) provides the required intermediate voltage from the V O Bus output to power the downstream modules, while holding the common Track control at ground potential. After allowing times for and to initialize, removes the ground from the Track control, allowing this voltage to rise. The outputs from the two nonisolated modules then rise simultaneously to their respective set-point voltages. Submit Documentation Feedback

www.ti.com t − 10 ms/div VO Bus (1 V/div) td = 20 ms V(POL)2 (1 V/div) V(POL)1 (1 V/div) 1 5 Track GNDInhibit Adjust 1 5 Track GNDInhibit Adjust Track −Sense−VI NEN PEN +Sense VO Bus VO Adjust VO COM C I 100 µF −VI +VI 220 µF 13.7 kΩ 47 µF PTH04000W VO Bus (5 V) VPOL 1 (3.3 V) VPOL 2 (1.5 V) 47 µF 47 µFR3 11.5 kΩC5 47 µF 475 Ω VOVI VO PTH04000W PTB78560A VI +VI PTB78560A PTB78560B PTB78560C SLTS249 JUNE 2005 Figure 29. Power-Up Waveform Figure 30. Power-Up Sequencing With Nonisolated POL Modules Submit Documentation Feedback

www.ti.com Stand-Alone Operation L O A D Track −Sense +VI −VI NEN PTB78560x PEN VO Seq +Sense VO Bus VO Adjust VO COM −VI +VI R SET 220 µF PTB78560A PTB78560B PTB78560C SLTS249 JUNE 2005 The wide output voltage adjust range makes either model of the PTB78560 series of converters an attractive product as a stand-alone dc/dc converter. In these applications, it is not required to power up or sequence with any nonisolated POL modules. The output voltage can be adjusted to any value within the applicable adjust range. The Auto-Track used. Figure shows the recommended configuration when these converters are used as a stand-alone regulator. The main output O Bus) can be used to supply the load directly. Both the Track pin and the V O Seq output (PTB78560B) are simply left open circuit. The +Sense pin should be connected to the V O Bus output for improved load regulation. When the converter is operated in this mode, the output from V O Bus rises promptly on power up. Figure 31. Stand-Alone Configuration Submit Documentation Feedback

www.ti.com 2-Jun-2025 PACKAGING INFORMATION Orderable part number Status (1) Material type (2) Package | Pins Package qty | Carrier RoHS (3) Lead finish/ Ball material (4) MSL rating/ Peak reflow (5) Op temp (°C) Part marking (6) PTB78560AAH NRND Production Through-Hole Module (ERW) | 11 12 | TIW TRAY In-Work SN N/A for Pkg Type -40 to 85 PTB78560AAH.B NRND Production Through-Hole Module (ERW) | 11 12 | TIW TRAY In-Work SN N/A for Pkg Type -40 to 85 PTB78560AAS NRND Production Surface Mount Module (ERY) | 11 12 | TIW TRAY No SNPB Level-1-235C-UNLIM/ Level-3-260C-168HRS -40 to 85 PTB78560AAS.B NRND Production Surface Mount Module (ERY) | 11 12 | TIW TRAY No SNPB Level-1-235C-UNLIM/ Level-3-260C-168HRS -40 to 85 PTB78560AAZ NRND Production Surface Mount Module (ERY) | 11 12 | TIW TRAY In-Work SNAGCU Level-3-260C-168 HR -40 to 85 PTB78560AAZ.B NRND Production Surface Mount Module (ERY) | 11 12 | TIW TRAY In-Work SNAGCU Level-3-260C-168 HR -40 to 85 PTB78560BAH NRND Production Through-Hole Module (ERW) | 11 12 | TIW TRAY In-Work SN N/A for Pkg Type -40 to 85 PTB78560BAH.B NRND Production Through-Hole Module (ERW) | 11 12 | TIW TRAY In-Work SN N/A for Pkg Type -40 to 85 PTB78560BAS NRND Production Surface Mount Module (ERY) | 11 12 | TIW TRAY No SNPB Level-1-235C-UNLIM/ Level-3-260C-168HRS -40 to 85 PTB78560BAS.B NRND Production Surface Mount Module (ERY) | 11 12 | TIW TRAY No SNPB Level-1-235C-UNLIM/ Level-3-260C-168HRS -40 to 85 PTB78560CAH NRND Production Through-Hole Module (ERW) | 11 12 | TIW TRAY In-Work SN N/A for Pkg Type -40 to 85 PTB78560CAH.B NRND Production Through-Hole Module (ERW) | 11 12 | TIW TRAY In-Work SN N/A for Pkg Type -40 to 85 PTB78560CAS NRND Production Surface Mount Module (ERY) | 11 12 | TIW TRAY No SNPB Level-1-235C-UNLIM/ Level-3-260C-168HRS -40 to 85 PTB78560CAS.B NRND Production Surface Mount Module (ERY) | 11 12 | TIW TRAY No SNPB Level-1-235C-UNLIM/ Level-3-260C-168HRS -40 to 85 PTB78560CAZ NRND Production Surface Mount Module (ERY) | 11 12 | TIW TRAY In-Work SNAGCU Level-3-260C-168 HR -40 to 85 PTB78560CAZ.B NRND Production Surface Mount Module (ERY) | 11 12 | TIW TRAY In-Work SNAGCU Level-3-260C-168 HR -40 to 85 (1) Status: For more details on status, see our product life cycle. Addendum-Page 1

www.ti.com 2-Jun-2025 (2) Material type: When designated, preproduction parts are prototypes/experimental devices, and are not yet approved or released for full production. Testing and final process, including without limitation quality assurance, reliability performance testing, and/or process qualification, may not yet be complete, and this item is subject to further changes or possible discontinuation. If available for ordering, purchases will be subject to an additional waiver at checkout, and are intended for early internal evaluation purposes only. These items are sold without warranties of any kind. (3) RoHS values: Yes, No, RoHS Exempt. See the TI RoHS Statement for additional information and value definition. (4) Lead finish/Ball material: Parts may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two lines if the finish value exceeds the maximum column width. (5) MSL rating/Peak reflow: The moisture sensitivity level ratings and peak solder (reflow) temperatures. In the event that a part has multiple moisture sensitivity ratings, only the lowest level per JEDEC standards is shown. Refer to the shipping label for the actual reflow temperature that will be used to mount the part to the printed circuit board. (6) Part marking: There may be an additional marking, which relates to the logo, the lot trace code information, or the environmental category of the part. Multiple part markings will be inside parentheses. Only one part marking contained in parentheses and separated by a "~" will appear on a part. If a line is indented then it is a continuation of the previous line and the two combined represent the entire part marking for that device. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 2

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