PTB48580A TI1 | Alldatasheet

Document overview

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Technical content

Features

  • Dual Complementary Outputs (±5 V , ±12 V)
  • Input Voltage Range:

36 V to 75 V

  • On/Off Enable for Sequencing
  • 1500 VDC Isolation
  • Over-Current Protection
  • Over-T emperature Shutdown
  • Under-Voltage Lockout
  • T emp Range: –40 to +85 °C
  • Industry Standard Outline
  • Fixed Frequency Operation
  • Synchronizes with PTB48500
  • Powers line driver ICs for AC-7 and other xDSL chipsets
  • Safety Approvals: (Pending): EN60950 UL/cUL60950

Description

The PTB48580 series of isolated DC/DC converter modules produce a complementary pair of regulated supply voltages for powering line-driver ICs in xDSL telecom applications. The mod- ules operate from a standard telecom (-48 V) central office (CO) supply and can provide up to a 30 W of power in a balanced load configuration. The A-suffix module (±5 V) is designed to power the line driver ICs for the AC-7 ADSL chipset. Other voltage options will power other analog applications requiring a complementary supply with relatively balanced loads. The outputs can also be easily configured for single-ended use. The modules incorporate an On/Off enable control, output current limit, over-temperatur e protection, and input under-voltage lockout (UVLO) as stan- dard features. The control inputs, “Enable” and “Sync In,” are compatible with the “EN Out” and “Sync Out” signals of the PTB48500 DC/DC converter. This allows the power-up and switching frequency of the PTB48580 series to be directly controlled from a PTB48500. T ogether a PTB48500 and a PTB48580A converter meet all the system power and sequencing requirements of an AC-7 ADSL chipset. The PTB48580 series uses double- sided surface mount contruction. The package size is based on an industry standard outline and does not require a heatsink. Both through-hole and surface mount pin configurations are available. PTB48580 +VI Enable –VI –VO COM 6 L O A D –VO +VI –VI COM Sync In ±VO Adj 7 +VO +VO L O A D SL TS240 DECEMBER 2004 Not Recommended for New Designs

For technical support and further information visit http://power.ti.com

Ordering Information

Code Description Pkg Ref. (1) AH Horiz. T/H (ERV) AS SMD, Standard (2) (ERS) Output Voltage (PTB48580❒xx) Code V oltage A ±5 V B ±12 V Notes: (1) Reference the applicable package reference drawing for the dimensions and PC board layout (2) “Standard” option specifies 63/37, Sn/Pb pin solder material. Pin Descriptions +VI: The positive input supply for the module with respect to –VI. When powering the module from a –48 V telecom central office supply, this input is connected to the primary system ground. –VI: The negative input supply for the module, and the 0 VDC reference for the ‘Enable*’, and ‘Sync In’ signals. When the module is powered from a +48-V supply, this input is connected to the 48-V Return. O: The positive output supply voltage, which is refer- enced to the ‘COM’ node. The voltage at ‘+VO’ has the same magnitude, but is the complement to that at ‘-VO’. –VO: The negative output supply voltage, which is refer- enced to the ‘COM’ node. The voltage at ‘-VO’ has the same magnitude, but is the complement to that at ‘+VO’. COM: The secondary return reference for the module’s regulated output voltages. This node is dc isolated from the input supply pins. ±VO Adjust: Using a single resistor, this pin allows the magnitude of both ‘+VO’ and ‘–VO’ to be adjusted to- gether, either higher or lower than their preset value. If not used, this pin should be left open circuit. Enable*: This is an open-collector (open-drain) negative logic input that enables the module output. This pin is referenced to -V I. A logic ‘0’ at this pin enables the module’s outputs, and a high impedance disables the outputs. If this feature is not used the pin should be con- nected to –V I. Note: C onnecting this input directly to the “EN Out” pin of the PTB4850x enables the output voltages from both converters (PTB4850x and PTB48580) to power up in sequence. Sync In: This pin is used when the PTB48580 and PTB4850x DC/DC converter modules are used together. Connect- ing this pin to the ‘ Sync Out’ of the PTB4850x module allows the PTB48580 to be synchronized to the same switch conversion frequency as the PTB4850x. Environmental and General Specifications (Unless otherwise stated, all voltages are with respect to –V I) Characteristics Symbols Conditions Min Typ Max Units Input Voltage Range VI Over output load range 36 48 75 VDC Isolation Voltage Input–output/input–case 1500 — — V Capacitance Input to output — 1500 — pF Resistance Input to output 10 — — M Ω Operating T emperature Range T A Over VI Range –40 — +85 °C Over-T emperature Protection OTP Shutdown threshold — 115 (i) — °CHysterisis — 10 — Solder Reflow T emperature TREFLOW Surface temperature of module body or pins 235 (ii) °C Storage T emperature TS — –40 — 125 °C Mechanical Shock Per Mil-STD-883D, Method 2002.3 — 500 — G’s1 msec, ½ Sine, mounted Mechanical Vibration Mil-STD-883D, Method 2007.2 T/H — 20 — G’s20-2000 Hz SMD — 5 — Weight — — 13.5 — grams Flammability — Meets UL 94V-O Notes: (i) This parameter is guaranteed be design (ii) During reflow of SMD package version do not elevate peak temperature of the module, pins or internal components above the s tated maximum. Base Pt. No. (PTB48580xxx) Order Prefix Description PTB48580xxx Basic Model PTB48580 Series Dual Complementary-Output DC/DC Converter for DSL SL TS240 DECEMBER 2004 Not Recommended for New Designs

For technical support and further information visit http://power.ti.com PTB48580A Dual Complementary-Output DC/DC Converter for DSL SL TS240 DECEMBER 2004 Specifications (Unless otherwise stated, T A =25°C, VI =48 V , CI =0 µF, ±CO =0 µF, |+IO | = |–IO |, and |±IO | =0.5 |±IO |max) PTB48580A Characteristic Symbol Conditions Min Typ Max Units Output Power PO T otal output power from ±VO 0— 3 0 (1) W Output Current |±IO | Over VI range, |+IO | – |–IO | ≤ 0.1 A 0 — 3 (2) A Output Load Imbalance |+IO | – |–IO || +IO | ≥0.1 A, |–IO | ≥ 0.1 A 0 — 1 (3) A Output Voltage |±VO | Inlcudes set-point, line, |+IO | – |–IO | ≤ 0.1 A 4.75 (2) 5 5.25 (2) V –40 ≤TA ≤+85°C T emperature Variation ∆Regtemp –40 ≤TA ≤ +85°C, |±IO | =0.1 A ±V O —± 1—% V O Line Regulation ∆Regline Over VI range, balanced load ±VO — ±0.1 ±0.4 %V O Load Regulation ∆Regload Over ±IO range, balanced load ±VO — ±0.2 ±0.4 %V O Efficiency η PO =PO max — 86 — % Vo Ripple (pk-pk) ±Vr 20 MHz bandwidth, — 25 50 (4) mVpp CO =10 µF tantalum capacitor T ransient Response tS 0.1 A/µs load step, 50% to 75% ±IO max — 30 — µs ∆VO pk |±VO| over/undershoot — ±1 — %V O Over Current Threshold IOtrip V I =36 V 3.3 4.3 5.3 A reset followed by auto-recovery Short Circuit Current Continuous over-current trip, |±IO |PK — 6.5 — A Output Voltage Adjust Range |±VO | adj |+VO | and |–VO | adjust simulataneously 3.5 — 6 (5) V Switching Frequency ƒS Over VI and IO ranges 440 470 (6) 500 kHz Under-Voltage Lockout V Ion VI increasing — 33 — V VIoff VI decreasing — 32 — On/Off Enable (pin 3) Referenced to –VI (pin 4) Input High Voltage V IH +3.6 — +75 (7) V Input Low Voltage VIL –0.2 — +0.8 Input Low Current IIL ——– 1m A Standby Input Current II standby pin 3 open circuit — 2 — mA Start-up Time tON |±IO | =1 A, |±VO | rising 0 to 0.95 |±VO | TYP —1 0—m s Internal Input Capacitance CI —2 —µ F External Output Capacitance C O Capacitance from either output to COM (pin 6) 0 — 2,000 (8) µF Reliability MTBF Per T elcordia SR-332 2.8 — — 10 6 Hrs50% stress, TA =40°C, ground benign Notes: (1) See Safe Operating Area curves or contact the factory for the appropriate derating. (2) Under balanced load conditions, load current flowing out of +V O is balanced to within ±0.1 A of that flowing into –V O . (3) A load imbalance is the difference in current flowing from +V O to –VO . The module can operate with a higher imbalance but with reduced specifications. (4) Output voltage ripple is measured with a 10 µF tantalum capacitor connected from +V O (pin 5) or –V O (pin 8), to COM (pin 6). (5) When the output voltage is adjusted higher than the nominal output voltage the load current must not exceed the module’s max imum power rating. (6) This is the free-running frequency. The module can be made to synchronize with the PTB48500 when both modules are used toget her in a system. (7) The On/Off Enable (pin 3) has an internal pull-up and may be controlled with an open-collector (or open-drain) transistor . T he input is diode protected and may be connected to +V I . The open-circuit voltage is 7 V max. If it is left open circuit the converter will operate when input power is applied. (8) Electrolytic capacitors with very low equivalent series resistance (ESR) may induce instability when used on the output. Con sult the factory before using capacitors with organic, or polymer-aluminum type electrolytes. Not Recommended for New Designs

For technical support and further information visit http://power.ti.com Note A: Characteristic data has been developed from actual products tested at 25°C. This data is considered typical data for the converter. Note B: Under a balanced load, current flowing out of +VO is equal to that flowing into –VO. Note C: SOA curves represent the conditions at which internal components are at or below the manufacturer’s maximum operating temperatures. Derating limits apply to modules soldered directly to a 4 in. × 4 in. double-sided PCB with 2 oz. copper. Typical Characteristics PTB48580A Characteristic Data @V I =48 V (See Notes A) Efficiency vs Load Current (See Note B) Power Dissipation vs Load Current (See Note B) Safe Operating Area PTB48580A (See Note C) Balanced Load, V I =48 VDC (See Note B) Cross Regulation, ∆|+VO| vs |–IO|, with |+IO| = 1 A Cross Regulation, ∆|–VO| vs |+IO|, with |–IO| = 1 A PTB48580A Dual Complementary-Output DC/DC Converter for DSL SL TS240 DECEMBER 2004 00 . 511 . 522 . 53 |±IO| – Balanced Output Current – A Efficiency – % 00 . 511 . 522 . 53 |±IO| – Balanced Output Current – A PD – Power Dissipation – W 00 . 511 . 522 . 53 |±IO| – Balanced Output Current – A Ambient Temperature – °C 400LFM 200LFM 100LFM Nat conv Airflow -300 -200 -100 100 200 300 00 . 511 . 522 . 53 |–IO| – Output Current – A |+VO| – Cross Regulation – mV -300 -200 -100 100 200 300 00 . 511 . 522 . 53 |+IO| – Output Current – A |-VO| – Cross Regulation – mV Not Recommended for New Designs

For technical support and further information visit http://power.ti.com PTB48580B Dual Complementary-Output DC/DC Converter for DSL SL TS240 DECEMBER 2004 Specifications (Unless otherwise stated, T A =25°C, VI =48 V , CI =0 µF, ±CO =0 µF, |+IO | = |–IO |, and |±IO | =0.5 |±IO |max) PTB48580B Characteristic Symbol Conditions Min Typ Max Units Output Power PO T otal output power from ±VO 0— 3 0 (1) W Output Current |±IO | Over VI range, |+IO | – |–IO | ≤ 0.1 A 0 — 1.25 (2) A Output Load Imbalance |+IO | – |–IO || +IO | ≥0.1 A, |–IO | ≥ 0.1 A 0 — 0.5 (3) A Output Voltage |±VO | Inlcudes set-point, line, |+IO | – |–IO | ≤ 0.1 A 11.6 (2) 12 12.4 (2) V –40 ≤TA ≤+85°C T emperature Variation ∆Regtemp –40 ≤TA ≤ +85°C, |±IO | =0.1 A ±V O —± 1—% V O Line Regulation ∆Regline Over VI range, balanced load ±VO — ±0.1 ±0.5 %V O Load Regulation ∆Regload Over ±IO range, balanced load ±VO — ±0.1 ±1 %V O Efficiency η PO =PO max — 88 — % Vo Ripple (pk-pk) ±Vr 20 MHz bandwidth, — 50 100 (4) mVpp CO =10 µF tantalum capacitor T ransient Response tS 0.1 A/µs load step, 50% to 75% ±IO max — 30 — µs ∆VO pk |±VO | over/undershoot — ±1 — %V O Over Current Threshold IOtrip V I =36 V 1.4 1.9 2.4 A reset followed by auto-recovery Short Circuit Current Continuous over-current trip, |±IO |PK —3 —A Output Voltage Adjust Range |±VO | adj |+VO | and |–VO | adjust simulataneously 6.5 — 13.4 (5) V Switching Frequency ƒS Over VI and IO ranges 440 480 (6) 520 kHz Under-Voltage Lockout V Ion VI increasing — 33 — V VIoff VI decreasing — 32 — On/Off Enable (pin 3) Referenced to –VI (pin 4) Input High Voltage V IH +3.6 — +75 (7) V Input Low Voltage VIL –0.2 — +0.8 Input Low Current IIL ——– 1m A Standby Input Current II standby pin 3 open circuit — 2 — mA Start-up Time tON |±IO | =1 A, |±VO | rising 0 to 0.95 |±VO | TYP —1 0—m s Internal Input Capacitance CI —2 —µ F External Output Capacitance C O Capacitance from either output to COM (pin 6) 0 — 1,500 (8) µF Reliability MTBF Per T elcordia SR-332 2.8 — — 10 6 Hrs50% stress, TA =40°C, ground benign Notes: (1) See Safe Operating Area curves or contact the factory for the appropriate derating. (2) Under balanced load conditions, load current flowing out of +V O is balanced to within ±0.1 A of that flowing into –V O . (3) A load imbalance is the difference in current flowing from +V O to –VO . The module can operate with a higher imbalance but with reduced specifications. (4) Output voltage ripple is measured with a 10-µF tantalum capacitor connected from +V O (pin 5) or –V O (pin 8), to COM (pin 6). (5) When the output voltage is adjusted higher than the nominal output voltage the load current must not exceed the module’s maximum power rating. (6) This is the free-running frequency. The module can be made to synchronize with the PTB48500 when both modules are used toget her in a system. (7) The On/Off Enable (pin 3) has an internal pull-up and may be controlled with an open-collector (or open-drain) transistor . T he input is diode protected and may be connected to +V I . The open-circuit voltage is 7 V max. If it is left open circuit the converter will operate when input power is applied. (8) Electrolytic capacitors with very low equivalent series resistance (ESR) may induce instability when used on the output. Con sult the factory before using capacitors with organic, or polymer-aluminum type electrolytes. Not Recommended for New Designs

For technical support and further information visit http://power.ti.com Note A: Characteristic data has been developed from actual products tested at 25°C. This data is considered typical data for the converter. Note B: Under a balanced load, current flowing out of +Vo is equal to that flowing into –Vo. Note C: SOA curves represent the conditions at which internal components are at or below the manufacturer’s maximum operating temperatures. Derating limits apply to modules soldered directly to a 4 in. × 4 in. double-sided PCB with 2 oz. copper. Typical Characteristics PTB48580B Characteristic Data @V IN =48 V (See Notes A) Efficiency vs Load Current (See Note B) Power Dissipation vs Load Current (See Note B) Safe Operating Area PTB48580B (See Note C) Balanced Load, V I =48 VDC (See Note B) Cross Regulation, ∆|+VO| vs |–IO|, with |+IO| = 0.6 A Cross Regulation, ∆|–VO| vs |+IO|, with |–IO| = 0.6 A PTB48580B Dual Complementary-Output DC/DC Converter for DSL SL TS240 DECEMBER 2004 0 0.25 0.5 0.75 1 1.25 |±IO| – Balanced Output Current – A Efficiency – % 0 0.25 0.5 0.75 1 1.25 |±IO| – Balanced Output Current – A PD – Power Dissipation – W -300 -200 -100 100 200 300 0 0.25 0.5 0.75 1 1.25 |–IO| – Output Current – A |+VO| – Cross Regulation – mV -300 -200 -100 100 200 300 0 0.25 0.5 0.75 1 1.25 |+IO| – Output Current – A |–VO| – Cross Regulation – mV 0 0.25 0.5 0.75 1 1.25 |±IO| – Balanced Output Current – A Ambient Temperature – °C 200LFM 100LFM Nat conv Airflow Not Recommended for New Designs

For technical support and further information visit http://power.ti.com Adjusting the Output Voltages of the PTB48580 Series of DC/DC Converters The PTB48580 series of DC/DC converters produce a balanced pair of complementary output voltages. They are identified +V O and -VO , respectively. The magnitude of both output voltages can be adjusted together as a pair, higher or lower, by up to ±10% of their nominal. The adjustment method uses a single external resistor.

1 The

value of the resistor determines the magnitude of the adjustment, and its placement determines whether the magnitude is increased or decreased. The resistor values can be calculated using the appropriate formula (see below). The formula constants are given in T able 1-1. The placement of each resistor is as follows. Adjust Up: T o increase the magnitude (3) of both output voltages, place a resistor R1 between ±VO Adj (pin 7) and the -VO (pin 8) voltage rail; see Figure 1-1(a). Figure 1-1b PTB48580 Series Calculation of Resistor Adjust Values The value of the adjust resistor is calculated using one of the following equations. Use the equation for R1 to adjust up, or (R2) to adjust down. R1 [Adjust Up] = V R RO – RS kΩ 2 (VA – VO ) (R2) [Adjust Down] = R O (2 VA – VR ) – RS kΩ 2 (VO – VA ) Where: V O = Magitude of the original ±V O VA = Magnitude of the adjusted voltage VR = The reference voltage from T able 1-1 RO = The resistance value in T able 1-1 RS = The series resistance from T able 1-1Figure 1-1a Adjust Down: T o decrease the magnitude of both output voltages, add a resistor (R2), between VO Adj (pin 7) and the +VO (pin 5) voltage rail; see Figure 1-1(b). Notes: 1. A 0.05-W rated resistor may be used. The tolerance should be 1%, with a temperature stability of 100 ppm/°C or better. Place the resistor in either the R1 or (R2) location, as close to the converter as possible. . Never connect capacitors to the ±VO Adj pin. Capacitance added to this pin can affect the stability of the regulated output. 3. When the output voltage is adjusted higher than the nominal output voltage the load current must not exceed the module’ s maximum power rating of 30 W . For example, when the PTB48580A is adjusted to ±6 V (12 V in the single output configuration), the load current is limited to 2.5 A. Adjust Up +VO ±VO Adj +VO PTB48580 –VO –VO COM (R2) Adj Down +VO ±VO Adj +VO PTB48580 –VO –VO COM Table 1-1 ADJUSTMENT RANGE AND FORMULA PARAMETERS Series Pt. No. PTB48580A PTB48580B VO (nom) 5 V 12 V VA (min) 3.5 V 6.5 V VA (max) (3) 6 V 13.4 V VR 2.495 V 2.495 V RO (kΩ) 7.5 18.2 RS (kΩ ΩΩ ΩΩ) 9.09 16.9 Not Recommended for New Designs

www.ti.com 20-Jul-2012 Addendum-Page 1 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead/ Ball Finish MSL Peak Temp (3) Samples (Requires Login) PTB48580AAH NRND Through- Hole Module ERV 8 15 Pb-Free (RoHS) SN N / A for Pkg Type PTB48580AAS NRND Surface Mount Module ERS 8 15 TBD SNPB Level-1-235C-UNLIM/ Level-3-260C-168HRS PTB48580AAZ NRND Surface Mount Module ERS 8 15 Pb-Free (RoHS) SNAGCU Level-3-260C-168 HR PTB48580BAH NRND Through- Hole Module ERV 8 15 Pb-Free (RoHS) SN N / A for Pkg Type PTB48580BAZ NRND Surface Mount Module ERS 8 15 Pb-Free (RoHS) SNAGCU Level-3-260C-168 HR (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

www.ti.com 20-Jul-2012 Addendum-Page 2

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