PTB48501AAZ

PTB48500_06 TI | Alldatasheet

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DUAL-OUTPUT, 48-V INPUT ISOLATED DC/DC CONVERTER for xDSL Dual Outputs (Independently Regulated) The PTB4850x power modules are a dual-output isolated DC/DC converter, designed to provide the Input Voltage Range: V to V logic supply voltages for AC-7 based xDSL Power-Up/Down Sequencing applications. The PTB48500 is rated for A of total 1500 VDC Isolation output current, making it suitable for 32-channel Over-Current Protection xDSL applications. The PTB48501 and PTB48502 provide output current for powering up to xDSL Over-Temperature Shutdown channels. The PTB48501 is rated for 16.5 A total Under-Voltage Lockout output current, and the PTB48502, The Fixed Frequency Operation PTB48502 incorporates W of additional capacity for powering peripheral circuitry. Any of these Temp Range: C to C converters can be used for other

applications

requirements. Operates with PTB4851x for Complete AC7 The modules operate from a standard telecom Power Solution central office (CO) supply and include an Powers up to DSL Ports on/off enable control, output current limit, over-temperature protection, input under-voltage Safety Approvals: lockout (UVLO). The PTB48500 and PTB48501 also UL/cUL 60950 incorporates a power-up reset (POR) output. EN 60950 The modules are designed to operate with one of the PTB4851x DC/DC converter modules. The combination of PTB4850x and PTB4851x converter provides the complete the power supply for an AC7 chipset. The EN Out and Sync Out pins provide compatible output signals for controlling both the power up sequence and switching frequency the PTB48510. The PTB4850x modules employ double-sided surface mount construction, and are an industry standard size. Please be aware that an important notice concerning availability, standard warranty, and use in critical sheet. PRODUCTION DATA information is current as of publication date. Copyright 2003 2006, Texas Instruments Incorporated Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.

www.ti.com PTB4850x Enable COM L O A D L O A D Vo 1 Vo 2 COM SyncOut ENOut −VI +VI +VI −VI POR (8)* VO1 VO2 VO2 Adj 7, (8)* * Pin 8 is COM on PTB48502 Environmental and General Specifications PTB48500 PTB48501 PTB48502 SLTS218C SEPTEMBER 2003 REVISED AUGUST 2006 STAND-ALONE APPLICATION ORDERING INFORMATION Base Part No. (PTB4850_xxx) Output Voltage (PTB4850x_xx) Package Options (PT4850xx_ Order Prefix Ref. (1) PTB48500xxx A (32-Ports) A 3.3 V 1.2 V AH Horiz. T/H (ERH) PTB48501xxx 16.5 A (48/64-Ports) AS SMD, Standard (2) (ERJ) PTB48502xx A (64-Ports AZ SMD, Pb-free (ERJ) (1) Reference the applicable package reference drawing for the dimensions and PC board layout. (2) Standard option specifies 63/37, Sn/Pb pin solder material. (Unless otherwise stated, all voltages are with respect to V I VALUE UNIT V I Input Voltage Range Over output load range to VDC Isolation Voltage Input-output/input/case 1500 V Capacitance Input to output 1500 pF Resistance Input to output m Ω T A Operating Temperature Range Over V in Range to C Shutdown threshold 115 OTP Over-Temperature Protection C Hysterisis T reflow Solder Reflow Temperature Surface temperature of module body or pins 235 (1) C T s Storage Temperature to 125 C Per Mil-STD-883D, Method 2002.3 msec, Sine, 500 G Mechanical Shock mounted Method 2007.2 Suffix H Mechanical Vibration Mil-STD-883D G 20-2000 Hz Suffix C Weight grams Flammability Meets UL 94V-O (1) During reflow of SMD package version do not elevate peak temperature of the module, pins or internal components above the stated maximum. Submit Documentation Feedback

www.ti.com ELECTRICAL CHARACTERISTICS (PTB48500A) PTB48500 PTB48501 PTB48502 SLTS218C SEPTEMBER 2003 REVISED AUGUST 2006 (Unless otherwise stated, T A V I C I µ C O µ and I O 50% I o max) PTB48500A PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Po Po Output Power Vo (3.3 19.8 W Vo (1.2 8.4 Po total Both outputs W Io Io Output Current Over V I range Vo (3.3 (1) A Vo (1.2 (1) Io Io Total (both outputs) A Vo Output Voltage 3.2 3.3 3.4 Includes set point, line, load, C T A C V Vo 1.16 1.2 1.24 Vo 0.5 Δ Reg temp Temperature Variation C T A I O I O min O Vo 0.8 Δ Reg line Line Regulation Over V I range Vo Vo mV Δ Reg load Load Regulation Over IO range Vo Vo mV I O min Io I o max, Io A Δ Vo Δ Reg cross Cross Regulation mV I O min Io I o max, Io A Δ Vo η Efficiency Io Io I o max 82% Vo V r V O Ripple (pk-pk) MHz bandwidth mV pp Vo t tr µ s load step, 50% to 100% I o max µ s Transient Response Δ V tr Vo Vo over/undershoot 2.0 O I o trip Over Current Threshold V I reset followed by auto-recovery Io Io 13.5 A Output Voltage Adjust Vadj Vo only o Range f S Switching Frequency Over V I and I O ranges 500 550 600 kHz V I on V I increasing Under-Voltage Lockout V V I off V I decreasing On/Off Enable (pin Referenced to V I (pin V IH Input High Voltage 3.6 (2) V V IL Input Low Voltage 0.2 0.8 I IL Input Low Current mA I I standby Standby Input Current Pins and connected mA C I Internal Input Capacitance µ F Co (3) 5000 External Output µ F Capacitance Co (3) 5000 Per Telcordia SR-332 50% stress, T A MTBF Reliability 1.5 Hrs ground benign (1) See Safe Operating Area curves or contact the factory for the appropriate derating. (2) The On/Off Enable (pin has an internal pull-up and may be controlled with an open-collector (or open-drain) transistor. The input is diode protected and may be connected to I The maximum open-circuit voltage is If it is left open circuit the converter will operate when input power is applied. (3) An output capacitor is not required. Submit Documentation Feedback

www.ti.com ELECTRICAL CHARACTERISTICS (PTB48501A) PTB48500 PTB48501 PTB48502 SLTS218C SEPTEMBER 2003 REVISED AUGUST 2006 (Unless otherwise stated, T A V I C I µ C O µ and I O 50% I o max) PTB48501A PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Po Po Output Power Vo (3.3 19.8 W Vo (1.2 12.6 Po total Both outputs 32.4 W Io Io Output Current Over V I range Vo (3.3 (1) A Vo (1.2 10.5 (1) Io Io Total (both outputs) 16.5 A Vo Output Voltage 3.2 3.3 3.4 Includes set point, line, load, C T A C V Vo 1.16 1.2 1.24 Vo 0.5 Δ Reg temp Temperature Variation C T A I O I O min O Vo 0.8 Δ Reg line Line Regulation Over V I range Vo Vo mV Δ Reg load Load Regulation Over IO range Vo Vo mV I O min Io I o max, Io A Δ Vo Δ Reg cross Cross Regulation mV I O min Io I o max, Io A Δ Vo η Efficiency Io Io I o max 81% Vo V r V O Ripple (pk-pk) MHz bandwidth mV pp Vo t tr µ s load step, 50% to 100% I o max µ s Transient Response Δ V tr Vo Vo over/undershoot 2.0 O I o trip Over Current Threshold V I reset followed by auto-recovery Io Io A Output Voltage Adjust Vadj Vo only o Range f S Switching Frequency Over V I and I O ranges 500 550 600 kHz V I on V I increasing Under-Voltage Lockout V V I off V I decreasing On/Off Enable (pin Referenced to V I (pin V IH Input High Voltage 3.6 (2) V V IL Input Low Voltage 0.2 0.8 I IL Input Low Current mA I I standby Standby Input Current Pins and connected mA C I Internal Input Capacitance µ F Co (3) 5000 External Output µ F Capacitance Co (3) 5000 Per Telcordia SR-332 50% stress, T A MTBF Reliability 1.5 Hrs ground benign (1) See Safe Operating Area curves or contact the factory for the appropriate derating. (2) The On/Off Enable (pin has an internal pull-up and may be controlled with an open-collector (or open-drain) transistor. The input is diode protected and may be connected to I The maximum open-circuit voltage is If it is left open circuit the converter will operate when input power is applied. (3) An output capacitor is not required. Submit Documentation Feedback

www.ti.com ELECTRICAL CHARACTERISTICS (PTB48502A) PTB48500 PTB48501 PTB48502 SLTS218C SEPTEMBER 2003 REVISED AUGUST 2006 (Unless otherwise stated, T A V I C I µ C O µ and I O 50% I o max) PTB48502A PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Po Po Output Power Vo (3.3 W Vo (1.2 15.6 Po total Both outputs W Io Io Output Current Over V I range Vo (3.3 (1) A Vo (1.2 (1) Io Io Total (both outputs) A Vo 3.2 3.3 3.4 Output Voltage Includes set point, line, load, C T A C V Vo 1.16 1.2 1.24 Vo 0.5 Δ Reg temp Temperature Variation C T A I O I O min O Vo 0.8 Δ Reg line Line Regulation Over V I range Vo Vo mV Δ Reg load Load Regulation Over IO range Vo Vo mV I O min Io I o max, Io A Δ Vo Δ Reg cross Cross Regulation mV I O min Io I o max, Io A Δ Vo η Efficiency Io Io I o max 82% Vo V r V O Ripple (pk-pk) MHz bandwidth mV pp Vo t tr µ s load step, 50% to 100% I o max µ s Transient Response Δ V tr Vo Vo over/undershoot 2.0 O I o trip Over Current Threshold V I reset followed by auto-recovery Io Io A Output Voltage Adjust Vadj Vo only o Range f S Switching Frequency Over V I and I O ranges 500 550 600 kHz V I on V I increasing Under-Voltage Lockout V V I off V I decreasing On/Off Enable (pin Referenced to V I (pin V IH Input High Voltage 3.6 (2) V V IL Input Low Voltage 0.2 0.8 I IL Input Low Current mA I I standby Standby Input Current Pins and connected mA C I Internal Input Capacitance µ F Co (3) 5000 External Output µ F Capacitance Co (3) 5000 Per Telcordia SR-332 50% stress, T A MTBF Reliability 1.5 Hrs ground benign (1) See Safe Operating Area curves or contact the factory for the appropriate derating. (2) The On/Off Enable (pin has an internal pull-up and may be controlled with an open-collector (or open-drain) transistor. The input is diode protected and may be connected to I The maximum open-circuit voltage is If it is left open circuit the converter will operate when input power is applied. (3) An output capacitor is not required. Submit Documentation Feedback

www.ti.com DEVICE INFORMATION PTB48500 PTB48501 PTB48502 SLTS218C SEPTEMBER 2003 REVISED AUGUST 2006 TERMINAL FUNCTIONS TERMINAL NO. The positive input supply for the module with respect to V I When powering the module from a V telecom I (1) central office supply, this input is connected to the primary system ground. The negative input supply for the module, and the VDC reference for the Enable EN Out and Sync Out V I signals. When the module is powered from a +48-V supply, this input is connected to the 48-V Return. V O The higher regulated power output voltage, which is referenced to the COM node. V O The lower regulated power output voltage, which is referenced to the COM node. The secondary return reference for the module's two regulated output voltages. It is dc isolated from the input COM supply pins. Using a single resistor, this pin allows V O to be adjusted higher or lower than the preset value. If not used, V O Adjust this pin should be left open circuit. This is an open-collector (open-drain) positive logic input that enables the module output. This pin is Enable (2) referenced to V I A logic at this pin disables the module's outputs, and a high impedance enables the outputs. If not used the pin should be left unconnected. This open-collector output may be used to enable the output of other DC/DC converters in controlled. The output is used principally to EN Out control the startup up of a PTB4851xx module when powering ADSL circuits based on the AC7 chipset. The signal is referenced to V I and is active low. It is initially off (high impedance), and turns on when the output voltage, V O has risen to its nominal set-point voltage. The signal generated by this pin is designed to be used exclusively with the PTB48510 in AC7 ADSL Sync Out applications. When the Sync Out of this converter is connected directly to the Sync In pin of the PTB48510, both modules will operate at the same switch conversion frequency. (POR: Available to PTB48500 and PTB48501 only.) This pin produces an active-low power-on reset signal that may be used to reset logic circuitry. The output is set low during power up just as the output voltage from V O POR (3) /COM (4) starts to rise. It remains low for ms after the voltage at V O has reached its nominal set-point voltage. This signal is referenced to the COM node, and has a 3.3-k Ω internal pull-up resistor to V O (1) Shaded functions indicate signals that are referenced to V I (2) Denotes positive logic: Open Normal operation, V I Outputs Off (3) Denotes negative logic: High Normal operation, Low Reset (4) This pin is COM on the PTB48502. Submit Documentation Feedback

www.ti.com TYPICAL CHARACTERISTICS (1) (2) (3) CHARACTERISTIC DATA (PTB48500A) 100 Efficiency − % IL − Load Current − A VI = 48 V 0 2 4 6 8 10 12 VI = 36 V VI = 75 V (See Note B) − Power Dissipation − WPD IL − Load Current − A VI = 48 V 0 2 4 6 8 10 12 VI = 36 V VI = 75 V (See Note B) 0 1 2 3 4 5 6 7 Cross Regulation Δ VO − mV IL − Load Current − A VO 1 vs IO 2 VO 2 vs IO 1 Nat Conv 400LFM 200LFM 100LFM VI = 48 VDC 0 5 10 15 20 25 30 TA − Ambient Temperature −/C0053C Total Output Power − W (See Note B) PTB48500 PTB48501 PTB48502 SLTS218C SEPTEMBER 2003 REVISED AUGUST 2006 EFFICIENCY POWER DISSIPATION vs vs LOAD CURRENT LOAD CURRENT Figure Figure CROSS REGULATION Δ Vo x vs Io y SAFE OPERATING AREA Io x A and V I V V I VDC Figure Figure (1) Characteristic data has been developed from actual products tested at This data is considered typical data for the converter. (2) Load current is increased proportionally from both outputs, up to the indicated maximum value of each respective output. (3) SOA curves represent the conditions at which internal components are at or below the manufacturer's maximum operating temperatures. Derating limits apply to modules soldered directly to a in. in. double-sided PCB with oz. copper. Submit Documentation Feedback

www.ti.com TYPICAL CHARACTERISTICS (1) (2) (3) PTB48501A CHARACTERISTIC DATA (PTB48501A) 0 3 9 12 18 Efficiency − % IL − Load Current − A 100 6 15 VI = 48 V VI = 75 V VI = 36 V (See Note B) IL − Load Current − A − Power Dissipation − WPD 0 3 6 9 12 15 18 VI = 48 V VI = 36 V VI = 75 V (See Note B) 0 2 4 6 8 10 12 Cross Regulation Δ VO − mV IL − Load Current − A VO 1 vs IO 2 VO 2 vs IO 1 400LFM 200LFM 100LFM TA − Ambient Temperature −/C0053C Total Output Power − W 0 8 16 24 32 Nat Conv VI = 48 VDC (See Note C) PTB48500 PTB48501 PTB48502 SLTS218C SEPTEMBER 2003 REVISED AUGUST 2006 EFFICIENCY POWER DISSIPATION vs vs LOAD CURRENT LOAD CURRENT Figure Figure CROSS REGULATION Δ Vo x vs Io y SAFE OPERATING AREA Io x A and V I V V I VDC Figure Figure (1) Characteristic data has been developed from actual products tested at This data is considered typical data for the converter. (2) Load current is increased proportionally from both outputs, up to the indicated maximum value of each respective output. (3) SOA curves represent the conditions at which internal components are at or below the manufacturer's maximum operating temperatures. Derating limits apply to modules soldered directly to a in. in. double-sided PCB with oz. copper. Submit Documentation Feedback

www.ti.com TYPICAL CHARACTERISTICS (1) (2) (3) CHARACTERISTIC DATA (PTB48502A) 0 20 60 100 Efficiency − % IL − Load Current − A 100 40 80 VI = 48 V VI = 36 V VI = 75 V (See Note B) IL − Load Current − A − Power Dissipation − WPD 0 20 40 60 80 100 VI = 48 V VI = 36 V VI = 75 V (See Note B) Cross Regulation Δ VO − mV IL − Load Current − A 0 2 4 6 8 10 VO 1 vs IO 2 VO 2 vs IO 1 90 400LFM 200LFM 100LFM TA − Ambient Temperature −/C0053C Total Output Power − W Nat Conv VI = 48 VDC (See Note B, C) 0 10 20 30 40 50 60 70 80 90 100 PTB48500 PTB48501 PTB48502 SLTS218C SEPTEMBER 2003 REVISED AUGUST 2006 [Io Io A represents 100% load] EFFICIENCY POWER DISSIPATION vs vs LOAD CURRENT LOAD CURRENT Figure Figure 10. CROSS REGULATION Δ Vo x vs Io y SAFE OPERATING AREA Io x A and V I V V I V Figure 11. Figure 12. (1) Characteristic data has been developed from actual products tested at This data is considered typical data for the converter. (2) Load current is increased proportionally from both outputs, up to the indicated maximum value of each respective output. (3) SOA curves represent the conditions at which internal components are at or below the manufacturer's maximum operating temperatures. Derating limits apply to modules soldered directly to a in. in. double-sided PCB with oz. copper. Submit Documentation Feedback

www.ti.com TYPICAL CHARACTERISTICS (1) (2) (3) CHARACTERISTIC DATA (PTB48502A) 0 20 60 100 Efficiency − % IL − Load Current − A 100 40 80 VI = 48 V VI = 36 V VI = 75 V (See Note B) IL − Load Current − A − Power Dissipation − WPD 0 20 40 60 80 100 VI = 75 V VI = 48 V VI = 36 V (See Note B) Cross Regulation Δ VO − mV IL − Load Current − A 0 2 4 6 8 10 VO 1 vs IO 2 VO 2 vs IO 1 TA − Ambient Temperature −/C0053C Total Output Power − W 0 10 20 30 40 50 60 70 80 90 100 400LFM 200LFM 100LFM Nat Conv VI = 48 VDC (See Note B, C) PTB48500 PTB48501 PTB48502 SLTS218C SEPTEMBER 2003 REVISED AUGUST 2006 [Io Io A represents 100% load] EFFICIENCY POWER DISSIPATION vs vs LOAD CURRENT LOAD CURRENT Figure 13. Figure 14. CROSS REGULATION Δ Vo x vs Io y SAFE OPERATING AREA Io x A and V I V V I V Figure 15. Figure 16. (1) Characteristic data has been developed from actual products tested at This data is considered typical data for the converter. (2) Load current is increased proportionally from both outputs, up to the indicated maximum value of each respective output. (3) SOA curves represent the conditions at which internal components are at or below the manufacturer's maximum operating temperatures. Derating limits apply to modules soldered directly to a in. in. double-sided PCB with oz. copper. Submit Documentation Feedback

www.ti.com APPLICATION INFORMATION ADJUSTING THE LOWER OUTPUT CALCULATION OF THE ADJUST RESISTOR R 1 [Adjust Up]/C0043R p /C0032V a /C0466V a /C0042V o/C0467/C0042R s k/C0087 (1) /C0466R 2/C0467[Adjust Down]/C0043R n /C0032V a /C0466V o /C0042V a/C0467/C0042R s k/C0087 (2) +VO PTB4850x COM 7 VO2 VO2 Adj R 1 Adjust Up PTB4850x COM 7 +VO VO2 VO2 Adj (R2) Adj Down PTB48500 PTB48501 PTB48502 SLTS218C SEPTEMBER 2003 REVISED AUGUST 2006 VOLTAGE OF THE PTB4850x The value of the adjust resistor is calculated using The PTB4850x series of DC/DC converters are one of the following equations. Use the equation for designed to produce two logic-level supply voltages R to adjust up, or to adjust down. for use with the AC-7 ADSL chipset. The magnitude of lowest output voltage (Vo can be adjusted higher or lower by up to 10% or 20% of the nominal. The adjustment method uses a single external resistor. The value of the resistor determines the amount of adjustment, and its placement determines whether the voltage is increased or decreased. The resistor values can be calculated using the appropriate Where: formula (see Equation and Equation or simply V o Magitude of the original output voltage selected from the range of values given in Table The placement of each resistor is as follows. V a Magnitude of the adjusted voltage R p Adjust-up constant from Table Adjust Up: To increase the magnitude of both output voltages, place a resistor R between Vo Adj R n Adjust-down constant from Table (pin and the Vo (pin voltage rail; see R s Internal series resistor from Table Figure Table Adjustment Range and Formula Parameters Part No. PTB48500(1)A PTB48502A V o (nom) 1.2 V 1.2 V V a (min) 0.96 V 0.84 V V a (max) 1.32 V 1.32 V R p Ω 1.648 1.196 R n Ω 4.624 3.598 R s Ω 18.2V 13.0 NOTES: A 0.05 W rated resistor may be used. The tolerance should be 1%, with a temperature Figure 17. Adjust Up stability of 100 ppm/ C or better. Place the resistor in either the R or location, as close Adjust Down: To decrease the magnitude of both to the converter as possible. output voltages, add a resistor between Vo Adj Never connect capacitors to the Vo Adj pin. (pin and the COM (pin voltage rail; see Capacitance added to this pin can affect the Figure stability of the regulated output. Table Adjust Resistor Values Part No. PTB4850xA PTB48502A Adjust V a (V) R (1) R (1) 0.848 N/A (0.5) k Ω 0.960 (0.3) k Ω (1.4) k Ω 0.972 (1.5) k Ω (2.3) k Ω 0.984 (2.9) k Ω (3.4) k Ω 0.996 (4.4) k Ω (4.6) k Ω 1.008 (6.1) k Ω (5.9) k Ω 1.020 (8.0) k Ω (7.4) k Ω 1.032 (10.2) k Ω (9.1) k Ω Figure 18. Adjust Down (1) R =Adjust up, =Adjust down Submit Documentation Feedback

www.ti.com SWITCHING FREQUENCY SYNCHRONIZATION POWER-UP SEQUENCING CONFIGURING THE PTB4850X AND HORIZ SCALE: 10 ms/Div VCCIO (1 V/div) VCORE (1 V/div) +V TCVR (5 V/div) −VTCVR (5 V/div) PTB48500 PTB48501 PTB48502 SLTS218C SEPTEMBER 2003 REVISED AUGUST 2006 Table Adjust Resistor Values (continued) Part No. PTB4850xA PTB48502A Unsynchronized, the difference in switch frequency introduces a beat frequency into the input and output Adjust V a (V) R (1) R (1) AC ripple components from the converters. The beat 1.044 (12.7) k Ω (11.1) k Ω frequency can vary considerably with any slight 1.056 (15.7) k Ω (13.4) k Ω variation in either converter's switch frequency. This 1.068 (19.2) k Ω (16.1) k Ω results in a variable and undefined frequency 1.080 (23.4) k Ω (19.4) k Ω spectrum for the ripple waveforms, which would normally require separate filters at the input of each 1.092 (28.6) k Ω (23.4) k Ω converter. When the switch frequency of the 1.104 (35) k Ω (28.4) k Ω converters are synchronized, the ripple components 1.116 (43.2) k Ω (34.8) k Ω are constrained to the fundamental and higher. This 1.128 (54.2) k Ω (43.4) k Ω simplifies the design of the output filters, and allows 1.140 (69.7) k Ω (55.4) k Ω a common filter to be specified for the treatment of input ripple. 1.152 (92.8) k Ω (73.4) k Ω 1.164 (131) k Ω 103.0) k Ω 1.176 (208) k Ω 163.0) k Ω The desired power-up sequence for the AC7 supply 1.188 (440) k Ω 343.0) k Ω voltages requires that the two logic-level voltages 1.200 from the PTB4850x converter rise to regulation prior 1.212 148 k Ω 108.0 k Ω to the two complementary voltages that power the 1.224 65.8 k Ω 48.0 k Ω transceiver ICs. This sequence cannot be guaranteed if the PTB4850x and PTB4851x are 1.236 38.4 k Ω 28.1 k Ω allowed to power up independently, especially if the 1.248 24.6 k Ω 18.1 k Ω 48-V input voltage rises relatively slowly. To ensure 1.260 16.4 k Ω 12.1 k Ω the desired power-up sequence, the EN Out pin of 1.272 10.9 k Ω 8.1 k Ω the PTB4850x is directly connected to the activelow 1.284 k Ω 5.3 k Ω Enable input of the PTB4851x (see Figure This allows the PTB4850x to momentarily hold off the 1.296 4.1 k Ω 3.2 k Ω outputs from the PTB4851x until the logic-level 1.308 1.8 k Ω 1.5 k Ω voltages have risen first. Figure shows the +10 1.320 k Ω 0.2 k Ω power-up waveforms of all four supply voltages from the schematic of Figure PTB4851X FOR DSL a pair, the PTB4850x and PTB4851x converters are specifically designed to provide all the required supply voltages for powering xDSL chipsets. The PTB4850x produces two logic voltages. They include a 3.3-V source for logic and I/O, and a low-voltage for powering a digital signal processor core. The PTB4851x produces a balanced pair of complementary supply voltages that is required for the xDSL transceiver ICs. When used together in these types of applications, the PTB4850x and PTB4851x may be configured for power-up sequencing, and also synchronized to a Figure 19. Power-Up Sequencing Waveforms common switch conversion frequency. Figure shows the required cross-connects between the two converters to enable these two features. Submit Documentation Feedback

www.ti.com PTB4850xA Enable COM SyncOutEN Out PTB4851xA Enable COM SyncIn Input Filter −48 V RTN −48 V I −VI VO2 VO2 Adj VO1 VCCIO VCORE +VTCVR −VTCVR −VO2 Adj +VO −VO−VI +VI PTB48500 PTB48501 PTB48502 SLTS218C SEPTEMBER 2003 REVISED AUGUST 2006 Figure 20. Example of PTB4850x and PTB4851x Modules Configured for DSL

Orderable Device Status(1) Package Type Package Drawing Pins Package Qty Eco Plan(2) Lead/Ball FinishMSL Peak Temp (3) PTB48500AAH ACTIVE DIP MOD ULE ERH 10 9 TBD Call TI Level-1-235C-UNLIM PTB48500AAS ACTIVE DIP MOD ULE ERJ 10 9 TBD Call TI Level-1-235C-UNLIM PTB48500AAZ ACTIVE DIP MOD ULE ERJ 10 9 Pb-Free (RoHS) Call TI Level-3-260C-168 HR PTB48501AAH ACTIVE DIP MOD ULE ERH 10 9 TBD Call TI Level-1-235C-UNLIM PTB48501AAS ACTIVE DIP MOD ULE ERJ 10 9 TBD Call TI Level-1-235C-UNLIM PTB48501AAZ ACTIVE DIP MOD ULE ERJ 10 9 Pb-Free (RoHS) Call TI Level-3-260C-168 HR PTB48502AAH ACTIVE DIP MOD ULE ERH 10 9 TBD Call TI Level-1-235C-UNLIM PTB48502AAS ACTIVE DIP MOD ULE ERJ 10 9 TBD Call TI Level-1-235C-UNLIM PTB48502AAZ ACTIVE DIP MOD ULE ERJ 10 9 Pb-Free (RoHS) Call TI Level-3-260C-168 HR (1)The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2)Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontentfor the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS):TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt):This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br):TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. PACKAGE OPTION ADDENDUM www.ti.com 18-Jul-2006 Addendum-Page 1

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