PT5806

PT5800_14 TI1 | Alldatasheet

Document overview

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Technical content

Features

• 5V Input
• 18A Output Current
• DSP Compatible
• Low-Profile (8mm)
• >90% Efficiency
• Output Margin Control (±5%)
• Adjustable Output Voltage
• On/Off Inhibit Function
• Pre-Bias Startup Capability Pin-Out Information * Denotes negative logic: Open = Normal operation Ground = Function active

Description

The PT5800 Excalibur™ series of integrated switching regulators (ISRs) combines outstand- ing power density with a comprehensive list of features. They are an ideal choice for applications where board space is a premium and performance cannot be compromised. These modules provide 18A of output current, yet are housed in a low- profile, 18-pin package that is almost half the size of the previous product generation. The integral copper case construction requires no heatsink, and offers the advantages of solderabil- ity and a small footprint (0.736 in² for suffix ‘N’). Both through-hole and surface mount pin con- figurations are available. The PT5800 series operates from a 5-V input bus and provides a convenient point-of-load power source for the industry’s latest high-performance DSPs and microprocessors. The series includes output voltage options as low as 1.0VDC. Other features include external output voltage adjustment, a ±5% margin control, on/off inhibit, short circuit protection, thermal shutdown, and a differential remote sense. PT Series Suffix (PT1234x) Case/Pin Order Package Configuration Suffix Code Vertical N (EPP) Horizontal A (EPQ) SMD C (EPS) (Reference the applicable package code draw- ing for the dimensions and PC board layout)

• Over-Current Protection
• Over-Temperature Protection
• Small Footprint (0.736 in², Suffix ‘N’)
• Surface Mount Compatible
• IPC Lead Free 2 PT5800 Vo Adjust Margin Up Margin Dn VIN 9–13 411 8 14–175, 6, 7 L O A D C IN 820µF (Required) + C OUT 330µF (Required) Inhibit GND GND VOUT Sense(+) Sense(–)

For technical support and more information, see inside back cover or visit www.ti.com PT5800 Series 18-A 5-V Input Adjustable Integrated Switching Regulator Specifications (Unless otherwise stated, Ta =25°C, Vin =5V, Cin =820µF, Cout =330µF, and Io =Iomax) PT5800 SERIES Characteristics Symbols Conditions Min Typ Max Units Output Current I o Vin =5V 0 — 18 A Input Voltage Range V in Over Io range 4.5 — 5.5 V Set-Point Voltage Tolerance V o tol — — ±2 %V o Temperature Variation ∆Regtemp –40°C <Ta < +85°C — ±0.5 — %V o Line Regulation ∆Regline Over Vin range — ±8 — mV Load Regulation ∆Regload Over Io range — ±5 — mV Total Output Variation ∆Regtot Includes set-point, line, load, ——± 3% V o–40°C ≤ Ta ≤ +85°C Efficiency η Io =12A PT5801 (3.3V) — 94 — PT5802 (2.5V) — 92 — PT5805 (1.2V) — 86 — PT5806 (1.0V) — 84 — Vo Ripple (pk-pk) V r 20MHz bandwidth — 20 — mVpp Transient Response 1A/µs load step, 50 to 100% I omax, ttr Recovery Time — 50 — µSec ∆Vtr Vo over/undershoot — 100 — mV Over-Current Threshold I TRIP Reset, followed by auto-recovery — 30 — A Output Voltage Adjust V o adj With V o Adjust — ±15 (1) — %With Margin Up/Dn — ±5 — Switching Frequency ƒ s Over Vin and Io ranges 250 300 350 kHz Inhibit Control (pin 2) Referenced to GND (pins 9–13) Input High Voltage V IH Vin –0.5 — Open (2) V Input Low Voltage VIL –0.2 — 0.8 Input Low Current IIL Pin 2 to GND — –10 — µA Standby Input Current I in standby Pin 2 to GND — 5 — mA External Input Capacitance C in 820(3) ——µ F External Output Capacitance C out 330(4) — 5,000 µF Operating Temperature Range T a Over Vin range –40 (4) — 85 (5) °C Over-Temperature Protection OTP Measured at center of case, auto-reset — 110 — °C Solder Reflow Temperature T reflow Surface temprature of module pins or case — — 215 (6) °C Storage Temperature T s — –40 — 125 °C Reliability MTBF Per Bellcore TR-332 5.8 — — 10 6 Hrs50% stress, Ta =40°C, ground benign Mechanical Shock Mil-STD-883D, Method 2002.3 — 500 — GHalf Sine, mounted to a fixture Mechanical Vibration Mil-STD-883D, Method 2007.2, Suffix N — 20 (7) — G20-2000 Hz, PCB mounted Suffixes A, C — 20 (7) — Weight — — — 20 — grams Flammability — M aterials meet UL 94V-0 Notes: (1) This is a typical value. For the adjustment limits of a specific model consult the related application note on output voltag e adjustment. (2) The Inhibit control (pin 2) has an internal pull-up to V in, and if left open-circuit the module will operate when input power is applied. A small low- leakage (<100nA) MOSFET is recommended to control this input. See application notes for more information. (3) An 820µF electrolytic input capacitor is required for proper operation. This capacitor must be rated for a minimumm of 0.7 A rms of ripple current. (4) For operation below 0°C, C OUT must have stable characteristics. Use either low-ESR tantalum or Oscon® type capacitors. (5) See SOA curves or consult factory for the appropriate derating. (6) During solder reflow of SMD package version do not elevate the module case, pins, or internal component temperatures above a peak of 215°C. For further guidance refer to the application note, “Reflow Soldering Requirements for Plug-in Power Surface Mount Products,” (SLTA 051) (7) The case pins on the through-hole package types (suffixes N & A) must be soldered. For more information see the applicable p ackage outline drawing. SLTS171A JANUARY 2003 - REVISED - MARCH 2003

For technical support and more information, see inside back cover or visit www.ti.com Note A: Characteristic data has been developed from actual products tested at 25°C. This data is considered typical data for the ISR. Note B: SOA curves represent operating conditions at which internal components are at or below manufacturer’s maximum rated operating t emperatures. Efficiency vs Output Current Power Dissipation vs Output Current Performance Data; Vin =5V (See Note A) Output Ripple vs Output Current PT5800 Series 18-A 5-V Input Adjustable Integrated Switching Regulator Pin Descriptions Vin: The positive supply voltage input for the module with respect to the common ground ( GND). Vout: This is the regulated output voltage from the mod- ule with respect to the common ground ( GND). GND: The common ground node to which the input, output, and external control signals are referenced. Sense(–): Provides the regulator with the ability to sense the set-point voltage directly across the load. For opti- mum output voltage accuracy this pin should always be connected to GND, even for applications that demand a relatively light load. Sense(+): When used with Sense(–), the regulation circuitry will compensate for voltage drop between the converter and the load. The pin may be left open circuit, but con- necting it to V out will optimize load regulation. Inhibit*: This is an open-collector (open-drain) negative logic input, referenced to GND. Pulling this pin to GND disables the module’s output voltage. If Inhibit* is left open circuit, the output will be active whenever a valid input source is applied. Vo Adjust: This pin is used to trim the output voltage over a typical range of ±15% of nominal. The adjust- ment method uses an external resistor. The resistor is connected from Vo Adjust to either the (-)Sense or (+)Sense, in order to adjust the output either up or down, respec- tively. Consult the related application note for the adjust limits of a specific part. Margin Dn*: When this open-collector (open-drain) input is asserted to GND, the output voltage is automatically decreased by 5% from the nominal. This feature is used in applications where the load circuit must be tested for operation at the extreme values of its supply voltage tolerance. Margin Up*: This is an open-collector (open-drain) input. When this is asserted to GND, the output voltage is automatically increased by 5% from the nominal. Typical Characteristics 100 0 3 6 9 12 15 18 Iout (A) Efficiency - % PT5801 PT5802 PT5803 PT5804 PT5805 PT5806 0369 1 2 1 5 1 8 Iout (A ) Ripple - mV PT5802 PT5801 PT5803 PT5804 PT5805 PT5806 0369 1 2 1 5 1 8 Iout (A ) Pd - Watts 0369 1 2 1 5 1 8 Iout (A ) Ambient Temperature (°C) 200LFM 120LFM 60LFM Nat conv Airflow Safe Operating Curves; V in =5V (See Note B) SLTS171A JANUARY 2003 - REVISED - MARCH 2003

For technical support and more information, see inside back cover or visit www.ti.com PT5800 & PT5810 Series With the sense leads connected, the difference between the voltage measured at Vout and GND pins, and that measured from Sense(+) to Sense(–), is the amount of IR drop being compensated by the regulator. This should be limited to 0.6V. (0.3V maximum between pins 17 & 18, and also between pins 8 & 9). Note: The remote sense feature is not designed to compensate for the forward drop of non-linear or frequency dependent components that may be placed in series with the converter output. Examples include OR-ing diodes, filter inductors, ferrite beads, and fuses. When these components are enclosed by the remote sense connections they are effectively placed inside the regulation control loop, which can adversely affect the stability of the regulator. Over-Current Protection To protect against load faults, the regulators incorporate output over-current protection. Applying a load that exceeds the regulator’s over-current threshold (see data sheet specifications) will cause the regulated output to shut down. Following shutdown the ISR will periodically attempt to recover by initiating a soft-start power-up. This is often described as a “hiccup” mode of operation, whereby the module continues in the cycle of successive shutdown and power up until the load fault is removed. During this period, the average current flowing into the fault is significantly reduced. Once the fault is removed, the converter automatically recovers and returns to nor- mal operation. Over-Temperature Protection An on-board temperature sensor protects the module’s internal circuitry against excessively high temperatures. A rise in the internal temperature may be the result of a drop in airflow, or a high ambient temperature. If the internal temperature exceeds the OTP threshold (see data sheet specifications), the regulator’s Inhibit* control is automatically pulled low. This disables the regulator, allowing the output voltage to drop to zero as the exter- nal output capacitors are discharged by the load circuit. The recovery is automatic, and begins with a soft-start power up. It occurs when the the sensed temperature decreases by about 10°C below the trip point. Note: The over-temperature protection is a last resort mecha- nism to prevent thermal stress to the regulator. Operation at or close to the thermal shutdown temperature is not r ecom- mended and will reduce the long-term reliability of the module. Always operate the regulator within the specified Safe Operating Area (SOA) limits for the worst-case conditions of ambient temperature and airflow. Differential Remote Sense Connecting the Sense(+) and Sense(-) pins to the load circuit allows the regulator to compensate for limited amounts of ‘IR’ voltage drop. This voltage drop is caused by current flowing through the connection resistance between the regulator and the ‘point of regulation’ some distance away. Leaving the sense pins disconnected will not damage the regulator or load circuitry. An internal 15Ω resistor, connected between each sense pin and its corresponding output node, keeps the output voltage in regulation. However, it is important to connect Sense(–) to GND locally, as this provides a return path for the regulator’s internal bias currents. Operating Features and System Considerations for the PT5800 & PT5810 Regulator Series The PT5800 (5-V input) and the PT5810 (3.3-V input) series of integrated switching regulators (ISRs) provide step-down voltage conversion for output loads of up to 18A. Power up & Soft-Start Timing Following either the application of a valid input source voltage, or the removal of a ground signal to the Inhihit* control pin (with input power applied), the regulator will initiate a soft-start power up. The soft start slows the rate at which the output voltage rises, and also introduces a short time delay, t d (approx. 2ms). Figure 1-1 shows the power-up characteristic of a PT5801 (3.3V) with a 10-A load. Vo (2V/Div) Vin (2V/Div) HORIZ SCALE: 5ms/Div td Figure 1-1

For technical support and more information, see inside back cover or visit www.ti.com Table 3-1; Input/Output Capacitors Capacitor Recommendations for the PT5800 & PT5810 Step-Down Regulator Series Input Capacitor: The recommended input capacitance is determined by a 700-mA ripple current rating and the following minimum capacitance requirements.

• PT5800 = 820µF minimum capacitance
• PT5810 =1000µF minimum capacitance Ripple current and <100mΩ equivalent series resistance (ESR) values are the major considerations, along with temperature, when designing with different types of capacitors. Tantalum capacitors have a recommended minimum voltage rating of twice the maximum DC voltage + AC ripple. This is necessary to ensure reliabil- ity for input voltage bus applications Output Capacitors The ESR of the capacitors is less than 100mΩ . Electrolytic capacitors have marginal ripple performance at frequen- cies greater than 400kHz, but excellent low frequency transient response. Above the ripple frequency ceramic capacitors are necessary. Ceramic capacitors improve the transient response and reduce any high frequency noise components apparent during high cur rent excursions. Preferred low-ESR electrolytic capacitor part numbers are identified in Table 3-1. PT5800/5810 Series Tantalum Capacitors (Optional Output Capacitors) Tantalum type capacitors can be used for the output but only the AVX TPS series, Sprague 593D/594/595 series, or Kemet T495/T510 series. These capacitors are rec- ommended over many other tantalum types due to their higher rated surge, power dissipation, and ripple current capability. As a caution the TAJ series by AVX is not recommended. This series has considerably higher ESR, reduced power dissipation, and lower ripple current capability. The TAJ series is less reliable than the AVX TPS series when determining power dissipation capa- bility. Tantalum or Oscon® types are recommended for applications where ambient temperatures fall below 0°C. Capacitor Table Table 2-1 identifies the characteristics of capacitors from a number of vendors with acceptable ESR and ripple current (rms) ratings. The number of capacitors required at both the input and output buses is identified for each capacitor type. This is not an extensive capacitor list. Capacitors from other vendors are available with comparable specifications. Those listed are for guidance. The RMS ripple current rating and ESR (Equivalent Series Resistance at 100kHz) are critical parameters necessary to insure both optimum regulator performance and long capacitor life. seireS/rodneVroticapaCs citsiretcarahCroticapaCy titnauQ gnikroW egatloV )Fµ(eulaVt nelaviuqE)RSE( ecnatsiseRseireS tnerruCelppiR xam)smr(I C°501@ lacisyhP )mm(eziS suBtupnIs uBtuptuOr ebmuNtraProdneV cinosanaP )laidaR(CF )TMS(KF V01 V01 V01 V53 0001 065 0001 074 860.0 Ω 090.0 Ω 0800 Ω 060.0 Ω Am0501 Am557 Am058 Am0011 01 × 61 01 × 5.21 01 × 2.01 5.21 × 5.31 201C1CFUEE 165A1CFUEE P201A1KFVEE Q174V1KFVEE noc-imehCdetinU seireSVXL/ZXL seireSXF V61 V01 V01 074 0001 086 090.0 Ω 860.0 Ω 510.0 Ω Am067 Am0501 Am5374 01 × 5.21 01 × 61 01 × 5.01 LL21X01M174BV61ZXL LL61X01M201BV01ZXL M086XF01 nocihciN seireSMP/LP )TMS(seireSXN V01 V61 V01 0001 065 033 560.0 Ω 080.0 Ω 420.0 Ω Am0401 Am029 Am0773 5.21 × 51 5.21 × 51 01 ×8 6HHM201A1MPU 6HHM165C1MPU SG1RCM033A1XNP :noc-sOoynaS PS )TMS(PVS V01 V01 074 065 510.0 Ω 310.0 Ω Am0054> Am0025> 01 × 5.01 11 × 7.21 074PS01 M M065PVS01 )TMS(SPTmulatnaTXVAV 01 V01 074 074 540.0 Ω 060.0 Ω Am3271 Am6281 L3.7 × W7.5 × H1.4 400R010M774ESPT 5 0600R010M774VSPT mulatnaTremyloPtemeK (seireS035T/025TT MS) V01 V01 033 033 040.0 Ω 510.0 Ω Am0081 Am0083> 3.7 × 3.4 ×43 SA010M733X025T SA010M733X035T mulatnaTeugarpS (seireSD495T MS) V010 860 90.0 Ω Am06612 .7 ×6× 1.42 1 T 2R0100X786D595

For technical support and more information, see inside back cover or visit www.ti.com Application Notes continued Va (req.d) 2.100 2.3k Ω 2.050 7.7k Ω 2.000 15.9k Ω 1.950 29.5k Ω 1.900 56.7k Ω 1.850 138.0k Ω 1.800 1.1k Ω 1.750 (169.0)kΩ 6.3kΩ 1.700 (66.9)kΩ 14.1kΩ 1.650 (32.9)kΩ 27.2kΩ 1.600 (15.9)kΩ 53.2kΩ 1.550 (5.7)kΩ 131.0kΩ 1.500 1.8k Ω 1.475 (239.0)kΩ 4.2kΩ 1.450 (102.0)kΩ 7.1kΩ 1.425 (56.4)kΩ 10.7kΩ 1.400 (33.7)kΩ 15.1kΩ 1.375 (20.0)kΩ 20.8kΩ 1.350 (10.9)kΩ 28.4kΩ 1.325 (4.4)kΩ 39.1kΩ 1.300 55.1k Ω 2.3kΩ 1.275 81.8k Ω 4.8kΩ 1.250 135.0k Ω 7.7kΩ 1.225 295.0k Ω 11.4kΩ 1.200 15.9k Ω 1.175 (125.0)kΩ 21.7kΩ 1.150 (45.1)kΩ 29.5kΩ 1.125 (18.4)kΩ 40.4kΩ 1.100 (5.1)kΩ 56.7kΩ 1.075 83.9k Ω 1.050 138.0k Ω 1.025 302.0K Ω 1.000 0.975 (46.5)kΩ 0.950 (5.7)kΩ PT5800 & PT5810 Series Table 5-2 ISR ADJUSTMENT RESISTOR VALUES Series Pt. No. 5.0V Bus PT5801 PT5802 PT5803 PT5804 PT5805 PT5806 3.3V Bus N/A PT5812 PT5813 PT5814 PT5815 PT5816 Va (req.d) 3.60 2.3k Ω 3.55 7.7k Ω 3.50 15.9k Ω 3.45 29.5k Ω 3.40 56.7k Ω 3.35 138.0k Ω 3.30 3.25 (475.0)kΩ 3.20 (220.0)kΩ 3.15 (135.0)kΩ 3.10 (92.4)kΩ 3.05 (66.9)kΩ 3.00 (49.9)kΩ 2.95 (37.5)kΩ 2.90 (28.6)kΩ 2.85 (21.6)kΩ 2.550 [Note 4 ] 146.0KΩ 2.500 2.450 (321.0)kΩ 2.400 (146.0)kΩ 2.350 (85.7)kΩ 2.300 (55.3)kΩ 2.250 (37.2)kΩ 2.200 (25.0)kΩ 2.150 (16.4)kΩ 2.100 (9.9)kΩ 2.050 (4.8)kΩ 2.000 (0.8)kΩ R1 = Black R2 = (Blue)

For technical support and more information, see inside back cover or visit www.ti.com Using the Margin Up/Down Controls on the PT5800 & PT5810 Regulator Series The PT5800 & PT5810 series of integrated switching regulator modules incorporate Margin Up* (pin 4) and Margin Dn* (pin 3) control inputs. These controls allow the output voltage set point to be momentarily adjusted 1, either up or down, by a nominal 5%. This provides a convenient method for dynamically testing the load circuit’s power supply voltage over its operating margin or range. Note that the ±5% change is also applied to any adjustment of the output voltage, if made, using the V o Adjust (pin 1). The 5% adjustment is made by driving the appropriate margin control input directly to the ground reference at Sense(-) (pin 8) 2. An low-leakage open-drain device, such as a MOSFET or a p-channel JFET is recommended for this purpose. Adjustments of less than 5% can also be accom- modated by adding series resistors to the control inputs (See Figure 6-1). The value of the resistor can be selected from Table 6-1, or calculated using the following formula. Resistor Value Calculation To reduce the margin adjustment to something less than 5%, series padding resistors are required (See R D and RU in Figure 6-1). For the same amount of adjustment, the resistor value calculated for R U and RD will be the same. The formulas is as follows. RU/RD = 499 – 99.8 k Ω ∆% Where ∆ %= The desired amount of margin adjust in percent. Notes: 1. The Margin Up* and Margin Dn* controls were not intended to be activated simultaneously. If they are their affects on the output voltage may not completely cancel, resulting in a slight shift in the output voltage set point. 2. When possible use the Sense(-) (pin 8) as the ground reference. This will produce a more accurate adjustment of the output voltage at the load circuit terminals. GND (pins 9-13) can be used if the Sense(-) pin is connected to GND near the regulator. C out C in +5V GND MargDn L O A D Q 2 Sense(–) +VOUT GND PT5800 14–17 829 –13 5, 6, 7 V OUTVIN GND SNS(+) SNS(–)INHIBIT* Q 1 4 3 MARG DN* MARG UP* MargUp +V o R D R U Figure 6-1; Margin Up/Down Application Schematic Table 6-1; Margin Up/Down Resistor Values PADDING RESISTOR VALUES % Adjust R U / RD 5 0.0k Ω 4 24.9k Ω 3 66.5k Ω 2 150.0k Ω 1 397.0k Ω PT5800 & PT5810 Series

www.ti.com 2-Feb-2014 Addendum-Page 1 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead/Ball Finish (6) MSL Peak Temp (3) Op Temp (°C) Device Marking (4/5) Samples PT5804N OBSOLETE SIP MODULE EPP 18 TBD Call TI Call TI PT5806A OBSOLETE SIP MODULE EPQ 18 TBD Call TI Call TI (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

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