PT5502 TI | Alldatasheet
Document overview
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Technical content
Features
- Single-Device: 5V/3.3V Input
- DSP Compatible
- 90% Efficiency
- Small Footprint
- Space-Saving package
- Adjustable Output Voltage
- Output Inhibit Function
- Short Circuit Protection
- Solderable Copper Case Pin-Out Information C 1 C 2 +V O COMCOM +V IN PT55002 INH V O ADJ * For Inhibit pin: Open = output enabled Ground = output disabled
Description
The PT5500 Excalibur™ power modules are a series of high-performance In tegrated Switching Regulators (ISRs). Rated 3A, these modules operate from input voltages as low as 3.1V to provide a local step-down power source. They are an ideal compliment to the industry’s latest high-performance DSPs and microprocessors. The series includes output voltage options as low as 1.0VDC. The PT5500 series is packaged in a 5-pin thermally efficient copper case. The case is solderable, has a small footprint, and can accommodate both through-hole and surface mount pin configurations. The product features external output voltage adjustment, an inhibit function, and short circuit protection. A 100µF capacitor is required for proper operation. PT Series Suffix (PT1234x) Case/Pin Order Package Configuration Suffix Code Vertical N (EFK) Horizontal A (EFL) SMD C (EFM) (Reference the applicable package code draw- ing for the dimensions and PC board layout)
For technical support and more information, see inside back cover or visit www.ti.com PT5500 Series 3-A 5-V/3.3-V Input Adjustable Integrated Switching Regulator Specifications (Unless otherwise stated, Ta =25°C, Vin =5V, Cout =100µF, and Io =Iomax) PT5500 SERIES Characteristics Symbols Conditions Min Typ Max Units Output Current I o Over Vin range 0.1 (1) — 3.0 A Input Voltage Range V in Over Io range V o =3.3V4.5 — 5.5 V Vo ≤2.5V3.1 5.5 Set-Point Voltage Tolerance V o tol — — ±2 %V o Temperature Variation ∆Regtemp –40°C <Ta < +85°C — ±0.5 — %V o Line Regulation ∆Regline Over Vin range — — ±6 mV Load Regulation ∆Regload Over Io range — — ±10 mV Total Output Variation ∆Regtot Includes set-point, line, load, ——± 3% V o–40°C ≤ Ta ≤ +85°C Efficiency η PT5501 — 90 — PT5502 — 87 — PT5503 — 85 — PT5504 — 83 — % PT5505 — 81 — PT5506 — 79 — PT5507 — 76 — Vo Ripple (pk-pk) V r 20MHz bandwidth — 25 45 mV Transient Response t tr 1A/µs load step from 50% to 100% I omax — 50 — µSec ∆Vtr Vo over/undershoot — 50 100 mV Current Limit I lim —5 —A Switching Frequency ƒ o Over Vin and Io ranges — 350 (2) — kHz Inhibit Control (pin1) Input High Voltage V IH Referenced to GND (pin3) V in –0.5 — Open (3) V Input Low Voltage V IL –0.2 — 0.5 Input Low Current I IL Pin 1 to GND — –0.5 — mA External Capacitance C out 100 (4) ——µ F Absolute Maximum T a Over Vin range –40 (5) —+ 8 5 (6) °C Operating Temperature Range Storage Temperature T s — -40 — +125 °C Mechanical Shock Per Mil-STD-883D, Method 2002.3 , 1 msec, — 500 — G’s Half Sine, mounted to a fixture Mechanical Vibration Per Mil-STD-883D, Method 2007.2, 20-2000 Hz, Soldered in a PC board — 15 (7) —G ’ s Weight — — — 6.5 — grams Flammability — Materials meet UL 94V-0 Notes: (1) The ISR will operate down to no load with reduced specifications. (2) This is a typical value only. The switching frequency will vary with input voltage. (3) The Inhibit control (pin 1) has an internal pull-up, and if left open-circuit the module will operate when input power is ap plied. A small low-leakage (<100nA) MOSFET is recommended to control this input. Ensure an On/Off transition time of ≤10µs. See application notes for more information. (4) The PT5500 Series requires a 100µF electrolytic or tantalum output capacitor for proper operation in all applications. (5) For operation below 0°C, the output capacitor C 2 must have stable characteristics. Use either a low ESR tantalum or Oscon® capacitor. (6) See SOA curves or consult factory for the appropriate derating. (7) The case pins on the through-hole package types (suffixes N & A) must be soldered. For more information see the applicable p ackage outline drawing.
For technical support and more information, see inside back cover or visit www.ti.com Note A: Characteristic data has been developed from actual products tested at 25°C. This data is considered typical data for the ISR. Note B: SOA curves represent operating conditions at which internal components are at or below manufacturer’s maximum rated operating t emperatures. Ripple vs Output Current Efficiency vs Output CurrentEfficiency vs Output Current Ripple vs Output Current Power Dissipation vs Output Current Power Dissipation vs Output Current Safe Operating Area; Vin =5.0V (See Note B) Performance Data; Vin =5.0V (See Note A) Performance Data; Vin =3.3V (See Note A) Safe Operating Area; Vin =3.3V (See Note B) 20.0 30.0 40.0 50.0 60.0 70.0 80.0 90.0 Iout (A) Ambient Temperature (°C) 200LFM 120LFM 60LFM Nat conv Airflow 30.0 40.0 50.0 60.0 70.0 80.0 90.0 Iout (A) Ambient Temperature (°C) 200LFM 120LFM 60LFM Nat conv Airflow PT5500 Series 3-A 5-V/3.3-V Input Adjustable Integrated Switching Regulator 100 00 . 511 . 522 . 53 Iout (A) Efficiency - % PT5501 PT5502 PT5504 PT5505 0 0.5 1 1.5 2 2.5 3 Iout (A) Ripple - mV PT5505 PT5504 PT5502 PT5501 100 0 0.5 1 1.5 2 2.5 3 Iout (A) Efficiency - % PT5502 PT5504 PT5505 00 . 511 . 522 . 53 Iout (A) Ripple - mV PT5505 PT5504 PT5502 0.25 0.5 0.75 1.25 00 . 511 . 522 . 53 Iout (A) Pd - Watts PT5502 PT5504 PT5505 PT5501 0.25 0.5 0.75 1.25 0 0.5 1 1.5 2 2.5 3 Iout (A) Pd - Watts PT5505 PT5504 PT5502 Typical Characteristics
For technical support and more information, see inside back cover or visit www.ti.com PT5500/5520 Series Adjusting the Output Voltage of the PT5500/20 Series of Excalibur Step-Down ISRs The output voltage of both the PT5500 and PT5520 series ISRs may be adjusted higher or lower than the factory trimmed pre-set voltage with the addition of a single external resistor. Table 1 accordingly gives the allowable adjustment range for each model for either series as V a (min) and Va (max). Adjust Up: An increase in the output voltage is obtained by adding a resistor R2, between pin 5 (Vo adj) and pin 3 (GND). Adjust Down: Add a resistor (R1), between pin 5 (Vo adj) and pin 4 (Vout). Figure 1 The values of (R1) [adjust down], and R2 [adjust up], can also be calculated using the following formulas. Refer to Figure 1 and Table 2 for both the placement and value of the required resistor; either (R 1) or R2 as appropriate. (R1) = Ro (Va – 0.9) – Rs kΩ Vo – Va R2 = 0.9 Ro – Rs kΩ Va – Vo Where: V o = Original output voltage Va = Adjusted output voltage Ro = The resistance value from Table 1 Rs = The series resistance from Table 1 Table 1 ISR ADJUSTMENT RANGE AND FORMULA PARAMETERS
3.0 Adc Rated PT5501 PT5502 PT5503 PT5504 PT5505 PT5506 PT5507
1.5 Adc Rated PT5521 PT5522 PT5523 PT5524 PT5525 PT5526 PT5527
µF Ceramic (Optional) 100 µF (Req'd) +V O COMCOM +V IN (R1) Adj Down PT55002 4Vin Vo Vo (ad j)GND Notes: 1. Use only a single 1% resistor in either the (R1) or R2 location. Place the resistor as close to the ISR as possible. 2. Never connect capacitors from Vo adj to either GND or Vout. Any capacitance added to the Vo adjust pin will affect the stability of the ISR. 3. For each model, adjustments to the output voltage may place additional limits on the minimum input voltage. The revised minimum input voltage must comply with the following requirement. V in(min) = (Va + 0.5)V or as specified in the data sheet, whichever is greater.
For technical support and more information, see inside back cover or visit www.ti.com Application Notes continued ISR ADJUSTMENT RESISTOR VALUES Va (req.d) 0.97 (0.0)kΩ 1.0 1.05 164.0kΩ 1.1 (0.0)kΩ 72.8kΩ 1.15 (30.0)kΩ 41.2kΩ 1.2 25.9kΩ 1.25 160.0kΩ 16.7kΩ 1.3 (0.0)kΩ 70.0kΩ 10.6kΩ 1.35 (10.0)kΩ 40.0kΩ 6.2kΩ 1.4 (30.0)kΩ 25.0kΩ 3.0kΩ 1.45 (90.0)kΩ 16.0kΩ 0.4kΩ 1.5 (0.0)kΩ 10.0kΩ 1.55 (6.0)kΩ 160.0kΩ 5.7kΩ 1.6 (15.0)kΩ 70.0kΩ 2.5kΩ 1.85 (43.3)kΩ 160.0kΩ 5.7kΩ 1.9 (80.0)kΩ 70.0kΩ 2.5kΩ 1.95 (190.0)kΩ 40.0kΩ 0.0kΩ 2.0 (2.0)kΩ 25.0kΩ 2.05 (5.6)kΩ 160.0kΩ 16.0kΩ 2.1 (10.0)kΩ 70.0kΩ 10.0kΩ 2.15 (15.7)kΩ 0.0kΩ 5.7kΩ 2.2 (23.3)kΩ 25.0kΩ 2.5kΩ 2.25 (34.0)kΩ 16.0kΩ 0.0kΩ 2.45 (284.0)kΩ 0.0kΩ 2.5 2.55 160.0k Ω 2.6 70.0k Ω 2.65 40.0k Ω 2.7 25.0k Ω 2.75 16.0k Ω 2.8 10.0k Ω 2.85 5.7k Ω 2.9 (0.0kΩ 2.5kΩ 2.95 (8.5)kΩ 0.0kΩ 3.0 (20.1)kΩ 3.05 (36.1)kΩ 3.1 (60.1)kΩ 3.15 (100.0)kΩ 3.2 (180.0)kΩ 3.25 (420.0)kΩ 3.3 3.35 130.0k Ω 3.4 40.1k Ω 3.45 10.1k Ω 3.48 0.0k Ω R1 = (Blue) R2 = Black Table 2 PT5500/5520 Series
Orderable Device Status(1) Package Type Package Drawing Pins Package Qty Eco Plan(2) Lead/Ball FinishMSL Peak Temp (3) PT5501A NRND SIP MOD ULE EFL 5 30 TBD Call TI Level-1-215C-UNLIM PT5501C NRND SIP MOD ULE EFM 5 30 TBD Call TI Level-3-215C-168HRS PT5501N NRND SIP MOD ULE EFK 5 30 TBD Call TI Level-1-215C-UNLIM PT5502A NRND SIP MOD ULE EFL 5 30 TBD Call TI Level-1-215C-UNLIM PT5502C NRND SIP MOD ULE EFM 5 30 TBD Call TI Level-3-215C-168HRS PT5502N NRND SIP MOD ULE EFK 5 30 TBD Call TI Level-1-215C-UNLIM PT5503A NRND SIP MOD ULE EFL 5 30 TBD Call TI Level-1-215C-UNLIM PT5503C NRND SIP MOD ULE EFM 5 30 TBD Call TI Level-3-215C-168HRS PT5503N NRND SIP MOD ULE EFK 5 30 TBD Call TI Level-1-215C-UNLIM PT5504A NRND SIP MOD ULE EFL 5 30 TBD Call TI Level-1-215C-UNLIM PT5504C NRND SIP MOD ULE EFM 5 30 TBD Call TI Level-3-215C-168HRS PT5504N NRND SIP MOD ULE EFK 5 30 TBD Call TI Level-1-215C-UNLIM PT5505A NRND SIP MOD ULE EFL 5 30 TBD Call TI Level-1-215C-UNLIM PT5505C NRND SIP MOD ULE EFM 5 30 TBD Call TI Level-3-215C-168HRS PT5505N NRND SIP MOD ULE EFK 5 30 TBD Call TI Level-1-215C-UNLIM PT5506A NRND SIP MOD ULE EFL 5 30 TBD Call TI Level-1-215C-UNLIM PT5506C NRND SIP MOD ULE EFM 5 30 TBD Call TI Level-3-215C-168HRS PT5506N NRND SIP MOD ULE EFK 5 30 TBD Call TI Level-1-215C-UNLIM PT5507A NRND SIP MOD ULE EFL 5 TBD Call TI Call TI PT5507C NRND SIP MOD ULE EFM 5 30 TBD Call TI Level-3-215C-168HRS PT5507N NRND SIP MOD ULE EFK 5 TBD Call TI Call TI (1)The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. PACKAGE OPTION ADDENDUM www.ti.com 24-Jun-2005 Addendum-Page 1
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS) or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontentfor the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS):TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Green (RoHS & no Sb/Br):TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. PACKAGE OPTION ADDENDUM www.ti.com 24-Jun-2005 Addendum-Page 2
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