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Technical content
Dual H-Bridge Motor Driver
DESCRIPTION
The PT5139 is a dual bridge motor driver which has two H-bridge drivers, and can drive two DC brush motors, a bipolar stepper motor, solenoids, or other inductive loads. It operates from 2.7V to 15V, and can deliver load current up to 700mA p er channel. The output driver block of each H -bridge consists of N -channel power MOSFETS configured as an H-bridge to drive the motor windings. Each H-bridge includes circuitry to regulate or limit the winding current. The internal safety features include sinking and sourcing current limits imp lemented with external sensors, under-voltage lockout, over current protection (OCP) and thermal shutdown. An over -temperature output flag is available to indicate thermal shutdown. The PT5139 is packaged in 16 -pin, 5.0mm×6.4mm TSSOP-EP and TSSOP, 3mm×3mm and 4mmx4mm QFN package with an exposed thermal pad on the back.
FEATURES
Wide Power Supply Voltage Range: 2.7V to 15V Two Internal Full-Bridge Drivers Internal Charge Pump for the High-Side Driver Low Quiescent Current: 1.1mA Low Sleep Current: 1μA Thermal Shutdown and Under -Voltage Lockout Protection Over Current Protection (OCP) Over-Temperature Output Flag Thermally-Enhanced Surface-Mount Package Low MOSFET On Resistance (HS: 600mΩ; LS: 570 mΩ)
APPLICATIONS
Digital Still Cameras POS Printers Video Security Camera Robotics Battery Powered Toys BLOCK DIAGRAM Internal Regulator & Bandgap Logic Gate Driver Current Sense OCP Input Signal Pre-process BST AOUT1 AOUT2 ASEN BOUT1 BOUT2 BSEN VIN nSLEEP FAULT AIN1 AIN2 BIN1 BIN2 VDD GND Gate Driver Current Sense OCP VIN VIN Wake up Charge Pump UVLO & Thermal Shutdown
V1.1 2 February 2017 APPLICATION CIRCUIT Dual DC Motor Application nSLEEP BIN2 BIN1 AIN2 AIN1 VDD 2.2μF AOUT1 AOUT2 ASEN BOUT1 BOUT2 BSEN GND RASEN RBSEN Fault ON OFF FAULT VIN BST 0.1μF VIN 10μF MOTOR MOTOR nSLEEP BIN2 BIN1 AIN2 AIN1 VDD 2.2μF AOUT1 AOUT2 ASEN BOUT1 BOUT2 BSEN WindingA WindingB GND RASEN RBSEN Fault ON OFF FAULT VIN BST 0.1μF VIN 10μF Stepper Motor Application MOTOR
V1.1 3 February 2017 ORDER INFORMATION PIN CONFIGURATION PT5139 4 9 5 6 7 8 PT5139 nSLEEP AOUT1 ASEN AOUT2 BOUT2 BSEN BOUT1 FAULT AIN1 AIN2 VDD GND VIN BST BIN2 BIN1 ASEN AOUT2 BOUT2 BSEN AOUT1 nSLEEP AIN1 AIN2 VDD GND VIN BST BIN2 BIN1 FAULT BOUT1 Note: The exposed pad for TSSOP16-EP and QFN package need to be connected to GND. Valid Part Number Package Type Top Code PT5139-HT 16-Pin, HTSSOP PT5139-HT PT5139-TX 16-Pin, TSSOP PT5139-TX PT5139 16-Pin, QFN (3x3mm) PT5139 PT5139 16-Pin, QFN(4x4mm) PT5139
V1.1 4 February 2017 PIN DESCRIPTION Pin Name I/O Description Pin No. QFN-16 TSSOP-16 ASEN I/O Channel A current s ense. Connect to current sensor resistor for Channel A 1 3 AOUT2 O Connecting to motor winding A. 2 4 BOUT2 O Connecting to motor winding B. 3 5 BSEN I/O Channel B current s ense. Connect to current sensor resistor for Channel B 4 6 BOUT1 O Connecting to motor winding B. 5 7 FAULT OD Fault output. Logic low when in over-temperature fault condition. 6 8 BIN1 I Bridge B input 1 to control BOUT1 . (200K internal pull down resistor to GND.) 7 9 BIN2 I Bridge B input 2 to control BOUT2 . (200K internal pull down resistor to GND.) 8 10 BST I/O Charge Pump Output. Connect a 10nF to 100nF ceramic capacitor to VIN. 9 11 VIN Power Device power supply. Ranges from 2.7V to 15V. A 10-µF ceramic bypass capacitor to GND is recommended. 10 12 GND GND Device ground. (Both the GND pin and device PowerPAD must be connected to ground.) 11 13 VDD Power Internal control and logic supply voltage. Connect a 2.2 μF capacitor from VDD to GND. VDD is for internal use only. Do not connect any external load to VDD pin. 12 14 AIN2 I Bridge A input 2 to control AOUT2 . (200K internal pull down resistor to GND.) 13 15 AIN1 I Bridge A input 1 to control AOUT1 . (200K internal pull down resistor to GND.) 14 16 nSLEEP I Sleep mode input. Logic high to enable device, logic low to enter low-power sleep mo de and reset all internal logic .(200K internal pull down resistor to GND.) 15 1 AOUT1 O Connect to motor winding A. 16 2
V1.1 6 February 2017 For fast decay mode, the H -bridge is disabled and recirculation current flows through the body diodes. For slow decay mode, the current circulates through the two low-side MOSFETS. To PWM using fast decay, the PWM signal is applied to one input pin while the other is held low. To using slow decay mode, one input is held high and apply the PWM signal to other input pin. See Table 2 for more configuration details and Figure 4 for detailed waveforms. A/BIN1 A/BIN2 Mode H (PWM) L Forward L (PWM) L Fast Decay L H (PWM) Reverse L L (PWM) Fast Decay H L (PWM) Forward H H (PWM) Slow Decay L (PWM) H Reverse H (PWM) H Slow Decay Figure 4: External PWM Current Control Waveform Table 2: PWM Control INTERNAL PWM CURRENT CONTROL An internal constant off-time PWM current control circuit will regulate the motor current as the following: When an H-bridge is enabled, current rises through the winding at a rate dependent on the DC voltage and inductance of the winding. The current increases in the motor winding, which is sensed by an external sense resistor (RSENSE). During the initial blanking time TBLANK (2.7μs), the high-side MOSFET always turns on in spite of current limit detection. This blanking time also sets the minimum on time of the PWM when operating in current chopping mode. After the blanking time, if the voltage across RSENSE reaches the internal reference voltage threshold VTRIP (185mV), the bridge disables the current by shuts off the high-side MOSFET. After that, the H-bridge switches to slow decay mode. Winding current is decreases and recirculated by enabling both of the low -side FETs in the bridge. In this slow decay mode, the current freewheels through one low-side MOSFET and the body diode of the other low-side MOSFET to short the winding. Th is mode enables both two low -side MOSFETs, which feature a lower voltage drop and lower p ower dissipation during decay operation. The slow decay mode is held until the internal clock reaches it’s constant off time (typically 21μs). After the fixed off time the high-side MOSFET is enable and the winding current will increase again. The cycle then repeats. Calculate the current limit as: ILIMIT = Vtrip Rsense Example: If a 1-Ω sense resistor is used, the chopping current will be 185 mV/1 Ω = 185 mA. If current control is not needed, the xSEN pins should be connected directly to ground.
V1.1 7 February 2017 SLEEP MODE Driving nSLEEP low will put the device into a low power sleep state. In this state, the H -bridges are disabled, the gate drive charge pump is stopped, all internal logic is reset, and all internal clocks are stopped. All inputs are ignored until nSLEEP returns inactive high. When returning from sleep mode, some time (up to 1 ms) needs to pass before the motor driver becomes fully operational. BLANKING TIME An internal blanking time TBLANK blanks the output of the current sense comparator when the outputs are switched, which is also the minimum on time for high-side MOSFET. There is usually a current spike during the switching transition due to the body diode’s reverse-recovery current or the distributed inductance or capacitance. This blanking time is filtering the current spike and prevents it from erroneously shutting down the high-side MOSFET. OVER CURRENT PROTECTION (OCP) An analog current limit circuit on each FET limits the current through the FET by limiting the gate drive. If this analog current limit persists for longer than the OCP deglitch time (2.7μs), all FETs in the H -bridge will be disabled and the FAULT pin will be driven low. The driver will be re-enabled after the OCP retry period (tOCP) has passed. FAULT becomes high again at th is time. If the fault condition is still present, the cycle repeats. If the fault is no longer present, normal operation resumes and FAULT remains deasserted. Please note that only the H -bridge in which the OCP is detected will be disabled while the other bridge will function normally. Over current conditions are detected independently on both high- and low-side devices; that is, a short to ground, supply, or across the motor winding will all result in an over current shutdown. Over current protection does not use the current sense circuitry used for PWM current control, so it functions even without presence of the xSEN resistors. THERMAL SHUTDOWN (TSD) If the die temperature exceeds safe limits (typically 170º C), all FETs in the H -bridge will be disabled and the nFAULT pin will be driven low. Once the die temperature has fallen to a safe level (typically 140ºC), operation will automatically resume. UNDERVOLTAGE LOCKOUT (UVLO) If at any time the voltage on the VM pin falls below the undervoltage lockout threshold voltage, all circuitry in the device will be disabled, and all internal logic will be reset. Operation will resume when VM rises above the UVLO threshold. nFAULT is driven low in the event of an undervoltage condition.
V1.1 8 February 2017
APPLICATION INFORMATION
Driver Mode: The PT5139 could be configured for both full step and half-step modes by sequentially energizing the two windings. Full- step drive energizes two winding phases at any given time. The stator windings are energized as per the sequence shown in Table 3. There are a total of four steps for one cycle in the sequence: AB AB ABAB. Half-step energizes the stator windings as per the sequence shown in Table 4. There are a total of 8 steps for one cycle: Figure 5: Signal Logic Sequences for Full-Step and Half-Step Sequence(Full Step) 1 2 3 4 A ✓ ✓ B ✓ ✓ A ✓ ✓ B ✓ ✓ Table 3: Full-Step Drive Sequence Sequence(Half Step) 1 2 3 4 5 6 7 8 A ✓ ✓ ✓ B ✓ ✓ ✓ A ✓ ✓ ✓ B ✓ ✓ ✓ Table 4: Half-Step Drive Sequence Note: ✓ item is the selected winding voltage.
V1.1 10 February 2017 DESIGN EXAMPLE Below is a design example following the application guidelines for the specifications: The detailed ap plication schematic is shown in Figure 9. The typical performance and circuit waveforms have been shown in the Typical Performance Characteristics section. VIN = 2.7V-15V, IOUT = 400mA PT5139 nSLEEP BIN2 BIN1 AIN2 AIN1 VDD 2.2μF AOUT1 AOUT2 ASEN BOUT1 BOUT2 BSEN WindingA WindingB GND RASEN RBSEN Fault ON OFF FAULT VIN BST 0.1μF VIN MOTOR 100nF 10μF 100μF 470mΩ 470mΩ Figure 9: Detailed Application Schematic
V1.1 11 February 2017 ABSOLUTE MAXIMUM RATING Parameter Symbol Rating Unit Power Supply Voltage VIN -0.3 ~ +18 V AOUTx Voltage VAOUTx -0.3 ~ +VIN+1V V BOUTx Voltage VBOUTx -0.3 ~ +VIN+1V V BST Voltage VBST -0.3 ~ +VIN+7V V Sense Voltage VSENx -0.3 ~ +0.5 V All Other Pins - -0.3 ~ +6.5 V Junction Temperature TJ 150 ℃ Lead Temperature TL 260 ℃ Operating Temperature TOPR -40 ~ +85 ℃ Storage Temperature TSTG -40 ~ +150 ℃ Note: Absolute maximum ratings are those values beyond which the device could be permanently damaged. RECOMMENDED OPERATING CONDITIONS Parameter Symbol Rating Unit Min. Typ. Max. Supply Voltage VIN 2.7 - 15 V Output Current IA/BOUT - 700 - mA Operating Junction Temperature TJ -40 50 125 ℃ THERMAL RESISTANCE Parameter θJA θJC Unit QFN 16(3X3mm) 60 12 ℃/W QFN 16(4X4mm) 46 10 ℃/W TSSOP 16-EP (5.0x6.4mm) 45 10 ℃/W TSSOP 16 103 38 ℃/W Note: Measure on JESD51-7, 4-layer PCB
V1.1 12 February 2017 ELECTRICAL CHARATERISTICS Nominal conditions: VIN=5V, Ta=+25℃ Parameter Symbol Conditions Min. Typ. Max. Unit Power Supply Input Supply Voltage VIN - 2.7 - 15 V Quiescent Current IIN nSLEEP=1, IOUT=0, Output disable - - 1.1 mA IIN_SLEEP nSLEEP=0, VIN=5V - - 1 μA Integrated MOSFETs Body-Diode Forward Voltage VF IOUT=500mA - - 1 V Output On Resistance RHS IOUT=500mA, VIN=5V TJ=25°C - 600 - mΩ IOUT=500mA, VIN=5V TJ=85°C - 780 - mΩ RLS IOUT=500mA, VIN=5V TJ=25°C - 570 - mΩ IOUT=500mA, VIN=5V TJ=85°C - 730 - mΩ Control Logic UVLO Threshold (Rising) VIN_RISE - - - 2.7 V UVLO Hysteresis VHYS - - 80 - mV Input Logic ‘Low’ Threshold VIL - - - 0.6 V Input Logic ‘High’ Threshold VIH - 2 - - V nSLEEP Logic, Low VSLEEP_L - - - 0.4 V nSLEEP Logic, High VSLEEP_H - 2 - - V Input pulldown resistance RPD nSLEEP and Logic input pin - 200 - kΩ Fault Output Logic, Low VFAULT_L Flag triggered by OTP 1mA Current - - 200 mV Fault Output Leakage Current ILEAK_FAULT VFAULT=5V - - 1 μA Constant Off Time TOFF - - 21 - μs Propagation Delay Time (On) TON_DELAY INx high to OUTx on 10mA Source Current - 80 - ns Propagation Delay Time (Off) TOFF_DELAY INx low to OUTx off - 250 - ns Cross Over Delay TCROSS HS off to LS on or LS off to HS on for one bridge arm 200 300 650 ns Sleep Mode Wakeup Time TWAKE Sleep inactive high to full bridge turn on (VBST=100nF) - 1 1.5 ms
V1.1 13 February 2017 Parameter Symbol Conditions Min. Typ. Max. Unit Protection Circuitry Current Limit Sense Trip Voltage VTRIP - - 185 - mV Blanking Time TBLANK - 2.1 2.7 3.3 μs Over current protection trip level IOCP - 1.7 - A Over current protection period TOCP - - 1.6 - ms Thermal Shutdown TSD - - 170 - ℃ Thermal Shutdown Hysteresis - - - 30 - ℃
V1.1 14 February 2017 TYPICAL CHARACTERISTICS 0.8 0.85 0.9 0.95 1.05 1.1 -50 -20 10 40 70 100 130 Quiescent current (mA) Temperature (°C) Quiescent Current vs. Temperature Vin=15V 2.5 3.5 4.5 5.5 0 2 4 6 8 10 12 14 16 VDD Voltage (V) Input Voltage (V) VDD Voltlage vs. Input Voltage 2.5 3.5 4.5 5.5 -50 -20 10 40 70 100 130 BST Voltage (V) Temperature(°C) BST Voltage vs. Temperature Vin=9V 0.175 0.18 0.185 0.19 0.195 0.2 -50 -20 10 40 70 100 130 Sense Trip Voltage (V) Temperature (°C) Sense Trip Voltage vs. Temperature 2.2 2.3 2.4 2.5 2.6 2.7 2.8 2.9 -50 -20 10 40 70 100 130 Blanking Time (us) Temperature(°C) Blanking Time vs. Temperature 200 300 400 500 600 700 800 Temperature (°C) Output Current (mA) Temperature Rise vs. Output Current Vin=9V, Full step (100HZ), Ta=25°C Open Frame, test based on EVB single channel two channels
V1.1 15 February 2017 TYPICAL PERFORMANCE CHARACTERISTICS Performance waveforms are tested on the evaluation board of the Design Example section. IOUT=500mA, FSTEP=100Hz, Stepper Motor: L=2mH, R=10Ω, TA=25°C, unless otherwise noted.
V1.1 16 February 2017
PACKAGE INFORMATION
16 Pins, QFN (3x3) and (4x4)
Symbol QFN (3x3) Dimensions Min. Nom. Max. A 0.70 0.75 0.80 A1 - 0.02 0.05 C 0.18 0.20 0.25 b 0.18 0.25 0.30 D 2.90 3.00 3.10 E 2.90 3.00 3.10 D2 1.40 1.50 1.60 E2 1.40 1.50 1.60 e 0.50 BSC. L 0.35 0.40 0.45 Symbol QFN (4x4) Dimensions Min. Nom. Max. A 0.70 0.75 0.80 A1 - 0.02 0.05 C 0.18 0.20 0.25 b 0.25 0.30 0.35 D 3.90 4.00 4.10 E 3.90 4.00 4.10 D2 2.10 2.20 2.30 E2 2.10 2.20 2.30 e 0.65 BSC. L 0.35 0.40 0.45 Notes: 1. Refer to JEDEC MO-220 WEED-4 & WGGD-4 2. Unit: mm
V1.1 17 February 2017
16 Pins, TSSOP
Min. Nom. Max. A - - 1.20 A1 0.05 - 0.15 A2 0.90 1.00 1.05 b 0.20 - 0.30 e 0.65 BSC c 0.13 - 0.19 D 4.86 4.96 5.06 D2 2.90 3.00 3.10 E 6.20 6.40 6.60 E1 4.30 4.40 4.50 E2 2.20 2.30 2.40 L1 1.00 REF θ 0 - 8 Notes: 1. Refer to JEDEC MO-153 2. Unit: mm
V1.1 18 February 2017 IMPORTANT NOTICE Princeton Technology Corporation (PTC) reserves the right to make corrections, modifications, enhancements, improvements, and other changes to its products and to discontinue any product without notice at any time. PTC cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a PTC product. No circuit patent licenses are implied. Princeton Technology Corp. 2F, 233-1, Baociao Road, Sindian Dist., New Taipei City 23145, Taiwan Tel: 886-2-66296288 Fax: 886-2-29174598 http://www.princeton.com.tw