PT4850 TI | Alldatasheet
Document overview
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Technical content
Features
- Triple Logic Voltage Outputs (Independently Regulated !)
- Input Voltage Range: 36V to 75V
- 1500VDC Isolation
- Over-Current Protection
- Over-Voltage Protection
- Over-Temperature Shutdown
- Under-Voltage Lockout
- Independently Adjustable Outputs
Ordering Information
PT Series Suffix (PT1234x) Case/Pin Order Package Configuration Suffix Code Vertical N (EKD) Horizontal A (EKA) SMD C (EKC) (Reference the applicable package code drawing for the dimensions and PC layout) Standard Application PT4850 Series
Description
The PT4850 Excalibur™ power modules are a series of isolated triple- output DC/DC converters that operate from a standard (–48V) central office supply. These modules are rated for a combined output of up to 25A, and were designed for powering mixed logic applications. The triple-output voltage provides a compact multiple-output power supply in a single DC/DC module. Output voltage options include a low-voltage output for a DSP or ASIC core, and two additional supply voltages for the I/O, and other func- tions. The PT4850 series incorporates many features to simplify system integration. These include a flexible On/Off enable control, input under- voltage lockout and over-temperature protection. All outputs are current limited and short-circuit protected, and are internally sequenced to meet the power-up and power-down re- quirements of popular DSP ICs. The PT4850 series is housed in a space-saving solderable case. The module requires no external heat sink. Both vertical and horizontal pin configurations are available, in- cluding surface mount. Cin =Optional Co1, Co2, Co3 =Optional. See specifications EN1 & EN2 operation: See application notes 25-A Triple Output Isolated DC/DC Converter For Logic Applications SL TS166C - FEBRUARY 2002 - REVISED MARCH 2003 CIN Co 3 Co 2 Co1 DSL, DSP, or ASIC Chipset I/O Logic Core +VIN –VIN 1 =Inhibit 18,19,20 PT4850 EN 2 EN 1 +Vo1 +Vo2 +Vo3 COM V1 Adj V2 Adj V3 Adj COM +VIN –VIN 9,10,11 15,16 22,23 12,13,14 V3Sense V2Sense
- Dual Logic On/Off Control
- Fixed Frequency Operation
- Solderable Space Saving Package: 1.97 sq. in. PCB Area (suffix N)
- IPC Lead Free 2
- Safety Approvals Pending: UL60950 CSA 22.2 950 VDE EN60950
For technical support and more information, see inside back cover or visit www.ti.com Pin Function 1+ V i n 2– V i n
3 EN 1
4 EN 2
5 TEMP
6 Pin Not Present
7 Do Not Connect
25-A Triple Output Isolated DC/DC Converter For Logic Applications Pin Function 10 +Vo 1 11 +Vo 1
12 COM
13 COM
14 COM
17 Vo 2 Adjust
18 COM
On/Off Enable LogicPin Configuration Pin Descriptions Pin 3 Pin 4 Output Status 1× Off
01 O n
×0 Off Notes: Logic 1 =Open circuit Logic 0 = –Vin (pin 2) potential For positive Enable function, connect pin 3 to pin 2 and use pin 4. For negative Enable function, leave pin 4 open and use pin 3. +Vin: The positive input supply for the module with respect to –Vin. When powering the module from a –48V telecom central office supply, this input is connected to the primary system ground. –Vin: The negative input supply for the module, and the 0VDC reference for the EN 1, and EN 2 inputs. When powering the module from a +48V supply, this input is connected to the 48V(Return). EN 1: The negative logic input that activates the module output. This pin must be connected to –Vin to enable the module’s outputs. A high impedance disables the module’s outputs. EN 2: The positive logic input that activates the module output. If not used, this pin should be left open circuit. Connecting this input to –Vin disables the module’s outputs. TEMP: This pin produces an output signal that tracks a temperature that is approximately the module’s metal case. The output voltage is referenced to –Vin and rises approximately 10mV/°C from an intital value of 0.1VDC at –40°C. The signal is available whenever the module is supplied with a valid input voltage, and is independant of the enable logic status. Note: A load impedance of less than 1M Ω will adversly affect the module’s over-temperature shutdown threshold. Use a high-impedance input when monitoring this signal.) Vo 1: The highest regulated output voltage, which is referenced to the COM node. Vo 2: The regulated output that is designed to power logic circuitry. It is referenced to the COM node. Vo 3: The low-voltage regulated output that provides power for a µ-processor or DSP core, and is refer- enced to the COM node. COM: The secondary return reference for the module’s three regulated output voltages. It is DC isolated from the input supply pins. Vo (n) Adjust: Using a single resistor, this pin allows the associated output Vo(n) to be adjusted higher or lower than the preset value. If not used, this pin should be left open circuit. Vo (n) Rem Sense: An external remote sense input is provided for the two lowest voltage outputs, +Vo 2 and +Vo3. Connecting the remote sense pins im- proves the load regulation of the applicable output by allowing the regulation circuit to compensate for voltage drop between the converter and load. If desired these inputs may be left disconnected. Note: Shaded functions indicate those pins that are at primary-side potential. Pin Function
19 COM
20 COM
21 Vo 3 Adjust
24 Vo 3 Rem Sense
25 Vo 2 Rem Sense
26 Do Not Connect
SL TS166C - FEBRUARY 2002 - REVISED MARCH 2003 Environmental Specifications Characteristics Symbols Conditions Min Typ Max Units Operating Temperature Range T a Over Vin Range –40 — +85 (i) °C Case Temperature T c — — 105 °C Storage Temperature T s — –40 — +125 °C Over Temperature Protection OTP Case temperature — 110 125 °C Mechanical Shock Per Mil-STD-883D, Method 2002.3 — 500 — G’s1 msec, ½ Sine, mounted Mechanical Vibration Mil-STD-883D, Method 2007.2 Suffix N — 10 (ii) — G’s20-2000 Hz Suffix A, C — 20 (ii) — Weight — Vertical/Horizontal — 90 — grams Flammability — Meets UL 94V-O Notes: (i) See SOA curves or consult factory for appropriate derating. (ii) The case pins on through-hole pin configurations (N & A) must be soldered. For more information see the applicable package outline drawing.
For technical support and more information, see inside back cover or visit www.ti.com PT4850 Series 25-A Triple Output Isolated DC/DC Converter For Logic Applications Electrical Specifications (Unless otherwise stated, the operating conditions are:- T a =25°C, Vin =48V, and Io =0.5Iomax) PT4850 Series (Except PT4856) Characteristics Symbols Conditions Min Typ Max Units Output Current I o Each output Io 1 0— 1 5 Io2 0— 1 0 A Io3 0— 1 0 Iotot T otal (all three outputs) — — 25 A Input Voltage Range V in Continuous 36 — 75 VSurge (1 minute) — — 80 Set-Point Voltage Tolerance V otol — — 1.5 %V o Temperature Variation ∆Regtemp –40°C ≤Ta ≤+85°C, Io1 =Io2 =Io3 =Iomin — ±0.5 — %V o Line Regulation ∆Regline All outputs, Over Vin range — ±0.2 ±0.5 %V o Load Regulation ∆Regload Each output, 0≤Io≤Iomax — ±5 ±10 mV Cross Regulation ∆Regcross Any output vs. another — — ±10 mV Total Output Voltage Variation ∆Vo tol Includes set-point, line, load, —± 2± 3 (1) %Vo–40°C ≤Ta ≤+85°C Efficiency η Io1 =10A, Io2 =5A, Io3 =5A — 85 — % Vo Ripple (pk-pk) V r 20MHz bandwidth, V o =5.0V — 50 75 Io1 =Io2 =Io3 =5A V o =3.3V — 20 50 mVppVo =1.8V/2.5V — 20 30 Vo ≤1.5V — 15 25 Transient Response t tr 0.1A/µs load step, 50% to 75% Iomax — 200 — µSec Vos Vo over/undershoot — 5 — %V o Output Adjust Range V oadj Vo 1/Vo2/Vo3 — ±10 — %V o Current Limit Threshold I LIM ∆Vo = –1% Vo 1 —2 0— Vo2 —1 5—A Vo3 —1 5— Output Over-Voltage Protection OVP All outputs; module shutdown and latch off — 125 (2) —% V o Switching Frequency ƒ s Over Vin and Io ranges 280 320 340 kHz Under Voltage Lockout V on Vin increasing — 34 36 V Voff Vin decreasing 30 32 — Enable Control (pins 3 & 4) Referenced to –V in (pin 2) High-Level Input Voltage V IH 3.5 — Open (3) VLow-Level Input Voltage V IL –0.2 — 0.8 (3) Low-Level Input Current I IL — 0.5 — mA Standby Input Current I in standby pins 3 & 4 open circuit — 2.5 4 (1) mA Internal Input Capacitance C int —2 —µ F External Output Capacitance C out Per each output 0 — 5,000 µF Primary/Secondary Isolation V iso 1500 — — V C iso — 2,200 — pF R iso 1 0——M Ω Temperature Sense V temp Output voltage at temperatures:-–40°C — 0.1 (4) — V100°C — 1.5 (4) — Notes: (1) Limits are specified by design. (2) This is a fixed parameter. Adjusting Vo 1 or Vo2 higher will increase the module’s sensitivity to over-voltage detection. For more information, see the application note on output voltage adjustment. (3) The Enable inputs (pins 3 & 4) have internal pull-ups. Leaving pin 4 open-circuit and connecting pin 3 to –V in (pin 2) allows the the converter to operate when input power is applied. The maximum open-circuit voltage for the Enable inputs is 5.4V. (4) Voltage output at “TEMP” pin is defined by the equation:- V TEMP = 0.5 + 0.01·T, where T is in °C. See pin descriptions for more information. SL TS166C - FEBRUARY 2002 - REVISED MARCH 2003
For technical support and more information, see inside back cover or visit www.ti.com PT4850 Series 25-A Triple Output Isolated DC/DC Converter For Logic Applications Efficiency vs Output Load PT4851 Performance Characteristics (See Note A) (Io1 =10A, Io2 =7.5A, Io3 =7.5A represents 100% Load) Typical Characteristics Note A: All Characteristic data in the above graphs has been developed from actual products tested at 25°C. This data is considered typ ical data for the ISR. Note B: SOA curves represent operating conditions at which the internal components are at or below the manufacturer’s maximum rated ope rating temperatures. Power Dissipation vs Output Load PT4851 Safe operating Area Curves (See Note B) (Io1 + Io2 + Io3 =25A, represents 100% load) SOA vs Output Power @Vin =48V 0 2 04 06 08 0 1 0 0 Output Load (% ) Efficiency - % 36V 48V 75V VIN 0 2 04 06 08 0 1 0 0 Output Load (% ) Ambient Temperature (°C) 500LFM 400LFM 300LFM 200LFM 100LFM Nat conv Airflow Efficiency vs Output Load PT4852 Performance Characteristics (See Note A) (Io1 =10A, Io2 =7.5A, Io3 =7.5A represents 100% Load) Power Dissipation vs Output Load PT4852 Safe operating Area Curves (See Note B) (Io1 + Io2 + Io3 =25A, represents 100% load) SOA vs Output Power @Vin =48V 0 2 04 06 08 0 1 0 0 Output Load (% ) Ambient Temperature (°C) 500LFM 400LFM 300LFM 200LFM 100LFM Nat conv Airflow 0 2 04 06 08 0 1 0 0 Output Load (% ) Efficiency - % 36V 48V 75V VIN 0 2 04 06 08 0 1 0 0 Output Load (% ) Pd - Watts 36V 48V 75V VIN 0 2 04 06 08 0 1 0 0 Output Load (% ) Pd - Watts 75V 48V 36V VIN SL TS166C - FEBRUARY 2002 - REVISED MARCH 2003
For technical support and more information, see inside back cover or visit www.ti.com PT4850 Series 25-A Triple Output Isolated DC/DC Converter For Logic Applications Efficiency vs Output Load PT4853 Performance Characteristics (See Note A) (Io1 =10A, Io2 =7.5A, Io3 =7.5A represents 100% Load) Typical Characteristics Note A: All Characteristic data in the above graphs has been developed from actual products tested at 25°C. This data is considered typ ical data for the ISR. Note B: SOA curves represent operating conditions at which the internal components are at or below the manufacturer’s maximum rated ope rating temperatures. Power Dissipation vs Output Load PT4853 Safe operating Area Curves (See Note B) (Io1 + Io2 + Io3 =25A, represents 100% load) SOA vs Output Power @Vin =48V Efficiency vs Output Load PT4854 Performance Characteristics (See Note A) (Io1 =10A, Io2 =7.5A, Io3 =7.5A represents 100% Load) Power Dissipation vs Output Load PT4854 Safe operating Area Curves (See Note B) (Io1 + Io2 + Io3 =25A, represents 100% load) SOA vs Output Power @Vin =48V 0 2 04 06 08 0 1 0 0 Output Load (% ) Efficiency - % 36V 48V 75V VIN 0 2 04 06 08 0 1 0 0 Output Power (% ) Pd - Watts 36V 48V 75V VIN 0 2 04 06 08 0 1 0 0 Output Load (% ) Ambient Temperature (°C) 500LFM 400LFM 300LFM 200LFM 100LFM Nat conv Airflow 0 2 04 06 08 0 1 0 0 Output Load (% ) Efficiency - % 36V 48V 75V VIN 0 2 04 06 08 0 1 0 0 Output Load (% ) Pd - Watts 75V 48V 36V VIN 0 2 04 06 08 0 1 0 0 Output Load (% ) Ambient Temperature (°C) 500LFM 400LFM 300LFM 200LFM 100LFM Nat conv Airflow SL TS166C - FEBRUARY 2002 - REVISED MARCH 2003
For technical support and more information, see inside back cover or visit www.ti.com PT4850 Series 25-A Triple Output Isolated DC/DC Converter For Logic Applications Efficiency vs Output Load PT4855 Performance Characteristics (See Note A) (Io1 =10A, Io2 =7.5A, Io3 =7.5A represents 100% Load) Typical Characteristics Note A: All Characteristic data in the above graphs has been developed from actual products tested at 25°C. This data is considered typ ical data for the ISR. Note B: SOA curves represent operating conditions at which the internal components are at or below the manufacturer’s maximum rated ope rating temperatures. Power Dissipation vs Output Load PT4855 Safe operating Area Curves (See Note B) (Io1 + Io2 + Io3 =25A, represents 100% load) SOA vs Output Power @Vin =48V 0 2 04 06 08 0 1 0 0 Output Load (% ) Ambient Temperature (°C) 500LFM 400LFM 300LFM 200LFM 100LFM Nat conv Airflow 0 2 04 06 08 0 1 0 0 Output Load (% ) Pd - Watts 75V 48V 36V VIN SL TS166C - FEBRUARY 2002 - REVISED MARCH 2003 0 2 04 06 08 0 1 0 0 Output Load (% ) Efficiency - % 36V 48V 75V VIN
For technical support and more information, see inside back cover or visit www.ti.com PT4856 25-A Triple Output Isolated DC/DC Converter For Logic Applications SL TS166C - FEBRUARY 2002 - REVISED MARCH 2003 PT4856 (Only) Characteristics Symbols Conditions Min Typ Max Units Output Current I o Each output Io 1 0— 1 0 Io2 0— 1 0 A Io3 0— 1 0 Iotot T otal (all three outputs) — — 25 A Input Voltage Range V in Continuous 36 — 75 VSurge (1 minute) — — 80 Set-Point Voltage Tolerance V otol — — 1.5 %V o Temperature Variation ∆Regtemp –40°C ≤Ta ≤+85°C, Io1 =Io2 =Io3 =Iomin — ±0.5 — %V o Line Regulation ∆Regline All outputs, Over Vin range — ±0.2 ±0.5 %V o Load Regulation ∆Regload Each output, 0≤Io≤Iomax — ±5 ±10 mV Cross Regulation ∆Regcross Any output vs. another — — ±10 mV Total Output Voltage Variation ∆Vo tol Includes set-point, line, load, —± 2± 3 (1) %Vo–40°C ≤Ta ≤+85°C Efficiency η Io1 =7A, Io2 =5A, Io3 =5A — 88 — % Vo Ripple (pk-pk) V r 20MHz bandwidth, V o =5.0V — 50 75 Io1 =Io2 =Io3 =5A V o =3.3V — 20 50 mV pp Vo =1.5V — 15 25 Transient Response t tr 0.1A/µs load step, 50% to 75% Iomax — 200 — µSec Vos Vo over/undershoot — 5 — %V o Output Adjust Range V oadj Vo 1/Vo2/Vo3 — ±10 — %V o Current Limit Threshold I LIM ∆Vo = –1% Vo 1 —2 0— Vo2 —1 5—A Vo3 —1 5— Output Over-Voltage Protection OVP All outputs; module shutdown and latch off — 125 (2) —% V o Switching Frequency ƒ s Over Vin and Io ranges 280 320 340 kHz Under Voltage Lockout V on Vin increasing — 34 36 V Voff Vin decreasing 30 32 — Enable Control (pins 3 & 4) Referenced to –V in (pin 2) High-Level Input Voltage V IH 3.5 — Open (3) VLow-Level Input Voltage V IL –0.2 — 0.8 (3) Low-Level Input Current I IL — 0.5 — mA Standby Input Current I in standby pins 3 & 4 open circuit — 2.5 4 (1) mA Internal Input Capacitance C int —2 —µ F External Output Capacitance C out Per each output 0 — 5,000 µF Primary/Secondary Isolation V iso 1500 — — V C iso — 2,200 — pF R iso 1 0——M Ω Temperature Sense V temp Output voltage at temperatures:-–40°C — 0.1 (4) — V100°C — 1.5 (4) — Notes: (1) Limits are specified by design. (2) This is a fixed parameter. Adjusting Vo 1 or Vo2 higher will increase the module’s sensitivity to over-voltage detection. For more information, see the application note on output voltage adjustment. (3) The Enable inputs (pins 3 & 4) have internal pull-ups. Leaving pin 4 open-circuit and connecting pin 3 to –V in (pin 2) allows the the converter to operate when input power is applied. The maximum open-circuit voltage for the Enable inputs is 5.4V. (4) Voltage output at “TEMP” pin is defined by the equation:- V TEMP = 0.5 + 0.01·T, where T is in °C. See pin descriptions for more information.
For technical support and more information, see inside back cover or visit www.ti.com PT4856 25-A Triple Output Isolated DC/DC Converter For Logic Applications Efficiency vs Output Load PT4856 Performance Characteristics (See Note A) (Io1 =10A, Io2 =7.5A, Io3 =7.5A represents 100% Load) Typical Characteristics Note A: All Characteristic data in the above graphs has been developed from actual products tested at 25°C. This data is considered typ ical data for the ISR. Note B: SOA curves represent operating conditions at which the internal components are at or below the manufacturer’s maximum rated ope rating temperatures. Power Dissipation vs Output Load PT4856 Safe operating Area Curves (See Note B) (Io1 + Io2 + Io3 =24A, represents 100% load) SOA vs Output Power @Vin =48V 0 2 04 06 08 0 1 0 0 Output Power (W ) Ambient Temperature (°C) 300LFM 200LFM 100LFM Nat Conv Airflow 100 0 2 04 06 08 0 1 0 0 Output Load (% ) Efficiency - % 36V 48V 75V VIN 0 2 04 06 08 0 1 0 0 Output Load (% ) Pd - Watts 75V 48V 36V VIN SL TS166C - FEBRUARY 2002 - REVISED MARCH 2003
For technical support and more information, see inside back cover or visit www.ti.com PT4850 Series Operating Features of the PT4850 Triple-Output DC/DC Converters Over-Current Protection The PT4850 series of DC/DC converters provide three independently regulated logic output voltages, Vo 1, Vo2, and Vo3. Each output is current limited to pr otect against load faults. The module will not be damaged by a con- tinuous load fault applied to any output. Current will continue to flow into the fault but is reduced as the volt- age across the fault decreases towards zero. Applying a load fault above the current limit threshold to any output causes the affected output to significantly drop. Also load faults applied to Vo 1 will affect Vo2 and Vo3, once Vo 1 drops to within 0.2V of either of these voltages. However, load faults applied to Vo 2 or Vo3 will not affect the other outputs. Over-Temperature Protection The PT4850 DC/DC converter series have an internal temperature sensor, which monitors the temperature of the module’s metal case. If the case temperature exceeds the specified limit the converter will shut down. The converter will automatically restart when the sensed temperature returns to within the normal operating range. The analog voltage generated by the sensor is also made available at the ‘TEMP’ output (pin 5), and can be monitored by the host system for diagnostic pur- poses. Consult the ‘Pin Descriptions’ section of the data sheet for more information on this feature. Under-Voltage Lock-Out The Under-Voltage Lock-Out (UVLO) circuit prevents operation of the converter whenever the input voltage to the module is insufficient to maintain output regulation. The UVLO has approximately 2V of hysterisis. This is to prevent oscillation with a slowly changing input voltage. Below the UVLO threshold the module is off and the enable control inputs, EN1 and EN2 are inoperative. Primary-Secondary Isolation The PT4850 series of DC/DC converters incorporate electrical isolation between the input terminals (primary) and the output terminals (secondary). All converters are production tested to a withstand voltage of 1500VDC. The isolation complies with UL60950 and EN60950, and the requirements for operational isolation. This allows the converter to be configured for either a positive or negative input voltage source. The regulation control circuitry for these modules is located on the secondary (output) side of the isolation barrier. Control signals are passed between the primary and secondary sides of the converter via a proprietory magnetic coupling scheme. This eliminates the use of opto-couplers. The data sheet ‘Pin Descriptions’ and ‘Pin-Out Information’ provides guidance as to which reference (primary or secondary) that must be used for each of the external control signals. Fuse Recommendations If desired an input fuse may be added to protect against the application of a reverse input voltage.
For technical support and more information, see inside back cover or visit www.ti.com Adjusting the Output Voltages of the PT4850 Triple-Output DC/DC Converters The output voltages of the PT4850 series of triple-output DC/DC converters, Vo1, Vo2 and Vo3, are independently adjustable. The adjustment method uses a single external resistor, 1 which may be used to adjust a selected output by up to ±10% from the factory preset value. The value of the resistor determines the magnitude of adjustment, and the placement of the resistor determines the direction of adjustment (up or down). The resistor values can be calculated using the appropriate formula (see below), using the constants provided in Table 3-2. Alternatively the resistor value may be selected directly from Table 3-3 and Table 3-4, for Vo 1 and Vo2/Vo3 respectively. The placement of each resistor is as follows. Adjust Up: T o increase a specific output, add a resistor R 1 between the appropriate Vx Adj (V1 Adj, V2 Adj, or V3 Adj) and the output common (COM). See Figure 3-1(a) and Table 3-1 for the resistor placement and pin connec- tions. Figure 3-1b PT4850 Series Calculation of Adjust Values The adjust resistor value may also be calculated using an equation. In each case, the equation for R 1 [Adjust Up] is different to that for (R2) [Adjust Down]. For the PT4850 series, the following points should be noted.
- V o1 uses different equations to Vo 2 and Vo3. The equations are defined for the desired output voltage.
- The equations for Vo 2 and Vo3 are based on the percentage of desired adjustment. Both Vo 2 and Vo3 use the same constants, which are common for all output voltages. Vo
1 Adjust:
R1 [Adjust Up] 3 = 2.5 Ro – Rs kΩ Va – Vo (R2) [Adjust Down] 3 = Ro (Va – 2.5 ) – Rs kΩ Vo – Va Where: V o = Original output voltage Va = Adjusted output voltage Ro = The resistance value in Table 3-2 Rs = The series resistance from Table 3-2 Vo2 / Vo3 Adjust: R1 [Adjust Up] 3 = 50 · Ro –Rs kΩn% (R2) [Adjust Down] 3 =R o · (50 – n%) –Rs kΩn% Where: R o = The resistance value in Table 3-2 Rs = The series resistance from Table 3-2 n% = The desired adjustment from the nominal (in percent) (R2) +Vo x +V x Adj COM +Vo x (Adjusted Down) Output Common PT4850 # - See Table 3-1 for pin connections, where Vox equals Vo1, Vo2, or Vo3 Figure 3-1a R 1 +Vo x +V x Adj COM +Vo x (Adjusted Up) Output Common PT4850 # - See Table 3-1 for pin connections, where Vox equals Vo1, Vo2, or Vo3 Adjust Down: Add a resistor (R2), between the appropriate Vx Adj (V1 Adj, V2 Adj, or V3 Adj) and the output being adjusted, +Vox. See Figure 3-1(b) and Table 3-1 for the resistor placement and pin connections. Table 3-1; Adjust Resistor Pin Connections To Adjust Up To Adjust Down Connect R1 Connect (R2) from to from to Vox Adj COM Vo x Adj Vo x Vo1 81 2 8 9 Vo2 17 18 17 16 Vo3 21 18 21 22
For technical support and more information, see inside back cover or visit www.ti.com Application Notes continued 3.0 (2.4)kΩ 3.05 (4.7)kΩ 3.1 (8.3)kΩ 3.15 (14.2)kΩ 3.2 (26.0)kΩ 3.25 (61.3)kΩ 3.3 3.35 216.0k Ω 3.4 106.0k Ω 3.45 68.7k Ω 3.5 50.3k Ω 3.55 39.2k Ω 3.6 31.8k Ω 4.5 (15.0)kΩ 4.6 (21.2)kΩ 4.7 (31.6)kΩ 4.8 (52.4)kΩ 4.9 (115.0)kΩ 5.0 5.1 120.0k Ω 5.2 57.4k Ω 5.3 36.6k Ω 5.4 26.2k Ω 5.5 20.0k Ω R1 = Black, R2 = (Blue) Adj. Resistors R 1/(R2) Vo(nom) 3.3V 5.0V Va(req’d) Table 3-2 ADJUSTMENT RANGE AND FORMULA PARAMETERS Vo1 Bus Vo 2 / Vo3 Bus Vo(nom) 5.0V 3.3V All Va(min) 4.5V 2.97V Vnom – 10% Va(max) 5.5V 3.63V Vnom + 10% Ro (kΩ ) 4.99 4.42 2.1 Rs (kΩΩΩΩΩ ) 4.99 4.99 4.99 Table 3-4 ADJUSTMENT RESISTOR VALUES FOR Vo2 / Vo3 Buses Table 3-3 ADJUSTMENT RESISTOR VALUES FOR Vo1 Bus PT4850 Series Notes: 1. Use only a single 1% (or better) tolerance resistor in either the R1 or (R2) location to adjust a specific output. Place the resistor as close to the ISR as possible. 2. Never connect capacitors to any of the ‘Vox Adj’ pins. Any capacitance added to these control pins will affect the stability of the respective regulated output. 3. Adjustments made to any output must also comply with the following limitations. Vo 1 ≥ (Vo2 + 0.5V), and Vo1 ≥ (Vo3 + 0.5V) R1 = Black, R2 = (Blue)
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