PT4840

PT4840-48V TI1 | Alldatasheet

Document overview

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Technical content

Features

• DSL Triple Outputs (Independantly Regulated)
• Input Voltage Range: 36V to 75V
• 1500VDC Isolation
• On/Off Control
• Current Limit
• Short Circuit Protection (All Outputs)

Ordering Information

PT Series Suffix (PT1234x) Case/Pin Order Package Configuration Suffix Code Vertical N (EKD) Horizontal A (EKA) SMD C (EKC) (Reference the applicable package code drawing for the dimensions and PC layout) Typical Application PT4840 Series—48V

Description

The PT4840 Excalibur™ power modules are a series of isolated triple- output DC/DC converters that operate from a standard (–48V) central office supply. Rated for up to 65W, these regulators are appropriate for powering both analog and mixed- signal circuitry. A typical application is a chip-set for an ADSL/DSL line card. The output voltage combinations offered by the PT4840 series provide power for a low-voltage processor core, the associated digital circuitry, and analog support circuitry. The PT4840 series incorporates many features to simplify system integration. These include a flexible On/Off control, over-temperature protection, and an input under- voltage lock-out. All outputs are current limited and short-circuit protected. In addition, the low- voltage outputs for processor core and digital circuitry meet the power- up and power-down sequencing requirements of popular DSP ICs. The PT4840 series is housed in a space-saving solderable case. The module requires no external heat sink and can occupy as little as 1.97 in 2 of PCB area. Cin = Optional Cout = Optional; See specifications EN1 & EN2 pins: See On/Off Enable Logic 65-W Triple Output Isolated DC/DC Converter for DSL Applications SLTS142C - DECEMBER 2000 -REVISED SEPTEMBER 2002 DSL/ADSL IC Chip Set +VIN –VIN +15VDC +3.3VDC +1.5VDC PT4841 15,16 22,23 18–20 12,13 Vo1 COM COM Vo2 Vo3 +VIN –VIN EN 1 Vo2adjVo3adj 1721 Vo2 Adjust Vo3 Adjust COUT1 C OUT3 C OUT2 CIN

4 EN 2

• Fixed Frequency Operation
• Over-Temperature Shutdown
• Under-Voltage Lockout
• Space Saving Package: 1.9 sq. in. PCB Area (suffix N)
• Solderable Copper Case
• Safety Approvals: UL60950 CSA 22.2 950 VDE EN60950

For technical support and more information, see inside back cover or visit www.ti.com Pin Function 1+Vin 2– V i n

3 EN 1

5 TEMP

6 Do Not Connect

7 Do Not Connect

8 Pin Not Present

9 Pin Not Present

PT4840 Series— 48V 65-W Triple Output Isolated DC/DC Converter for DSL Applications Pin Function

10 Pin Not Present

12 COM

13 COM

14 Pin Not Present

18 COM

19 COM

20 COM

24 Pin Not Present

25 Do Not Connect

26 Do Not Connect

On/Off Enable LogicPin Configuration Pin Descriptions Pin 3 Pin 4 Output Status 1 × Off 01O n × 0 Off Notes: Logic 1 =Open collector Logic 0 = –Vin (pin 2) potential For positive Enable function, connect pin 3 to pin 2 and use pin 4. For negative Enable function, leave pin 4 open and use pin 3. +Vin: The positive input supply for the module with respect to –Vin. When powering the module from a –48V telecom central office supply, this input is connected to the primary system ground. –Vin: The negative input supply for the module, and the 0VDC reference for the EN 1, EN 2, and TEMP inputs. When powering the module from a +48V supply, this input is connected to the 48V(Return). EN 1: The negative logic input that activates the module output. This pin is referenced to –V in. A low-level voltage at this pin enables the module’s outputs, and a high impedance impedance disables the module’s outputs. If not used, the pin must be connected to –V in. EN 2: The positive logic input that activates the module output. This pin is referenced to –V in. A high impedance at this pin enables the module’s outputs. If not used, the pin should be left open circuit. TEMP: This pin produces an output signal that tracks a temperature that is approximately the module’s metal case. The output voltage is referenced to –Vin and rises approximately 10mV/°C from an intital value of 0.1VDC at –40°C. The signal is available whenever the module is supplied with a valid input voltage, and is independant of the enable logic status. Note: A load impedance of less than 1M Ω will adversly affect the module’s over-temperature shutdown threshold. Use a high-impedance input when monitoring this signal.) Vo 1: The highest regulated output voltage, which is referenced to the COM node. The output may be used to power analog support circuitry. Vo 2: The regulated output that is designed to power logic or I/O circuitry. It is referenced to the COM node. Vo 3: The low-voltage regulated output that provides power for a micro, processor, ASIC, or DSP core, and is referenced to the COM node. COM: The secondary return reference for the module’s three regulated output voltages. It is DC isolated from the input supply pins. Vo

2 Adjust: Using a single resistor, this pin allows Vo2

to be adjusted higher or lower than the preset value. If not used, this pin should be left open circuit. Vo3 Adjust: Using a single resistor, this pin allows Vo3 to be adjusted higher or lower than the preset value. If not used, this pin should be left open circuit. Note: Shaded functions indicate those pins that are at primary-side potential. SLTS142C - DECEMBER 2000 -REVISED SEPTEMBER 2002 Environmental Specifications Characteristics Symbols Conditions Min Typ Max Units Operating Temperature Range T a Over Vin Range –40 — 85 (i) °C Over-Temperature Protection OTP Case temperature 100 — — °C Solder Reflow Temperature T reflow Surface temperature of module pins or case — — 215 (ii) °C Storage Temperature T s — –40 — 125 °C Mechanical Shock Per Mil-STD-883D, Method 2002.3 1 msec, ½ Sine, mounted — 500 — G’s Mechanical Vibration Mil-STD-883D Method 2007.2 Suffix N — 10 (iii) — G’s20-2000 Hz Suffix A, C — 20 (iii) — Weight — Vertical/Horizontal — 90 — grams Flammability — Meets UL 94V-O Notes: (i) See SOA curves or consult factory for appropriate derating. (ii) During solder reflow of SMD package version do not elevate the module case, pins, or internal component temperatures above a peak of 215°C. For further guidance refer to the application note, “Reflow Soldering Requirements for Plug-in Power Surface Mount Products,” (SLTA 051). (iii) Only the case pins on through-hole pin configurations (N & A) must be soldered. For more information see the applicable pa ckage outline drawing.

For technical support and more information, see inside back cover or visit www.ti.com PT4841— 48V 65-W Triple Output Isolated DC/DC Converter for DSL Applications PT4841 Characteristics Symbols Conditions Min Typ Max Units Output Power P o Each output: Vo 1 ( 15V) — — 41 (1) Total (all three outputs) — — 65 (1) W Output Current I o Io1 ( 15V) 0 — 2.7 Maximum (Io2 + Io3) ——11 (2) A Input Voltage Range V in 36 — 75 V Set-Point Voltage V o Vo1 — 15.2 — Vo2 — 3.3 — V Vo3 —1. 5— Temperature Variation Reg temp –40°C ≤Ta ≤+85°C, Io =Iomin Vo 1 — ±0.5 — %VoVo2/Vo3 — ±0.8 — Line Regulation Reg line All outputs, Over Vin range — 0.10.5 %V o Load Regulation Reg load All outputs, 0≤Io≤Iomax — 0.2 0.5 %V o Cross Regulation Reg cross Any one output vs. other outputs — — 1.0 %V o Total Output Voltage Variation ∆Vo tol Includes set-point, line, load, Vo 1 15 — 15.75 (3) Efficiency η Po =Pomax — 85 — % Vo Ripple/Noise V n Co1/Co2/Co3 =10µF Vo 1 —5 010 0 (4) (0 to 20MHz bandwidth) Vo 2 —2 05 0 (4) mVpp Vo3 —2 05 0 (4) Transient Response t tr 0.1A/µs load step, 50% to 75% Iomax — 30 — µSec Vos Vo over/undershoot — 5 — %V o Output Adjust Range V oadj Vo 2 / Vo3 ± 10 ——% V o Current Limit Threshold I LIM Io1 —4 — AIo2 + Io3 —16— Over Current Shutdown Delay t sd Time period prior to latched shutdown — 200 (5) —m s Switching Frequency ƒ s Over Vin and Io ranges 450 500 550 kHz Under Voltage Lockout V on Vin increasing — 34 — V Voff Vin decreasing — 32 — Enable Control (pins 2 & 3) Referenced to –V in (pin 2) High-Level Input Voltage V IH 4.0 — 70 (6) V Low-Level Input Voltage V IL –0.2 — 0.8 (6) Low-Level Input Current I IL Vin =75V — 0.16 0.25 mA Standby Input Current I in standby pins 2 & 4 connected — 8 10 (3) mA Internal Input Capacitance C int —2 —µ F External Output Capacitance Co 1 0 — 330 (7) Co2 0 — 5,000 (7) µF Co3 0 — 10,000 (7) Temperature Sense V temp Output voltage at temperatures:- –40°C — 0.1 (8) — V100°C — 1.5 (8) — Primary/Secondary Isolation V iso 1500 — — V C iso —15 0 0 —p F R iso 10——M Ω Notes: (1) The sum total power delivered from all three regulated outputs, Vo 1, Vo2, and Vo3, cannot exceed 65 watts. (2) The sum-total current from outputs Vo 2, and Vo3 cannot exceed 11ADC. (3) Limits are guaranteed by design. (4) The ripple and noise is measured with a 10µF tantalum capacitor across each output. (5) After latched shutdown, the module may be reset cycling the input power. (6) The Enable inputs (pins 3 & 4) have internal pull-ups. Leaving pin 4 open-circuit and connecting pin 3 to –V in allows the the converter to operate when input power is applied. The maximum open-circuit voltage is 5.1V. (7) Ultra-low ESR capacitors, such as organic or polymer aluminum electrolytic types, may cause instability. For more informatio n refer to the application note regarding capacitor selection. (8) Voltage output at “TEMP” pin is defined by the equation:- V TEMP = 0.5 + 0.01·T, where T is the sensed temperature in degrees centigrade. See pin descriptions for more information. SLTS142C - DECEMBER 2000 -REVISED SEPTEMBER 2002

For technical support and more information, see inside back cover or visit www.ti.com PT4841— 48V 65-W Triple Output Isolated DC/DC Converter for DSL Applications Efficiency vs Output Power PT4841 Performance Characteristics (See Note A) Typical Characteristics Power Dissipation vs Output Power Note A: All Characteristic data in the above graphs has been developed from actual products tested at 25°C. This data is considered typ ical data for the ISR. Note B: SOA curves represent operating conditions at which the internal components are at or below the manufacturer’s maximum rated ope rating temperatures. PT4841 SOA vs Output Load @V in =48V PT4841 Safe Operating Areas (See Note B) PT4841 SOA vs Output Load @V in =60V PT4841 SOA vs Output Load @V in =36V 0 2 04 06 08 0 1 0 0 % Load (All Outputs) Ambient Temperature (°C) 300LFM 200LFM 100LFM Nat conv Airflow 0 2 04 06 08 0 1 0 0 % Load (All Outputs) Ambient Temperature (°C) 300LFM 200LFM 100LFM Nat conv Airflow 0 2 04 06 08 0 1 0 0 % Load (All Outputs) Ambient Temperature (°C) 300LFM 200LFM 100LFM Nat conv Airflow 100 0 2 04 06 08 0 1 0 0 % Load (All Outputs) Efficiency - % 36V 48V 75V VIN 0 2 04 06 08 0 1 0 0 % Load (All Outputs) Pd - Watts 75V 48V 36V VIN SLTS142C - DECEMBER 2000 -REVISED SEPTEMBER 2002

For technical support and more information, see inside back cover or visit www.ti.com PT4842— 48V 65-W Triple Output Isolated DC/DC Converter for DSL Applications PT4842 Specifications (Unless otherwise stated, the operating conditions are:- T a =25°C, Vin =48V, and Ion =0.5Ionmax) PT4842 Characteristics Symbols Conditions Min Typ Max Units Output Power P o Each output: Vo 1 ( 12V) — — 32.4 (1) Total (all three outputs) — — 62 (1) W Output Current I o Io1 ( 12V) 0 — 2.7 A Maximum (Io2 + Io3) ——11 (2) A Current Limit Threshold I LIM Io1 —4 — AIo2 + Io3 —16— Over Current Shutdown Delay(3) tsd Time period prior to latched shutdown — 200 — ms Input Voltage Range V in 36 — 75 V Under Voltage Lockout V on Vin increasing — 34 — V Voff Vin decreasing — 32 — Internal Input Capacitance C int —2 —µ F Output Voltage V o Vo1 ( 12V) 11.64 12.0 12.36 Vo2 (3.3V) 3.2 3.3 3.4 V Vo3 (1.5V) 1.74 1.8 1.86 Output Adjust Range V oadj Vo 2 / Vo3 ± 10 ——% V o Line Regulation Reg line All outputs, Over Vin range — 0.11 .0 %V o Load Regulation Reg load All outputs, 0≤Io≤Iomax — 0.2 1.0 %V o Cross Regulation Reg cross Any one output vs. other outputs — — 1.0 %V o Vo Ripple/Noise (4) Vn Cout =10µF tantalum capacitor Vo 1 ( 12V) — 45 100 (0 to 20MHz bandwidth) Vo 2 (3.3V) — 20 50 mV pp Vo3 (1.5V) — 20 50 Transient Response (5) ttr 25% load step — 30 — µSec Vos Vo over/undershoot — 5 — %V o Efficiency η Po =Pomax — 84 — % Switching Frequency ƒ s Over Vin and Io ranges 450 500 550 kHz On/Off Control On Referenced to –V in Logic ‘0’ 0 — 0.8 Off Logic ‘1’ 2.4 — 75 (6) V Open cct. voltage 3 5 Istby Input current in ‘Off’ state — 9 15 mA Primary/Secondary Isolation V iso 1500 — — V C iso —15 0 0 —p F R iso 10——M Ω Temperature Sense (7) Vtemp Output voltage at temperatures:- –40°C — 0.1— V100°C — 1.5 — External Output Capacitance(8) Cout Co10 — 330 Co2 0 — 5,000 µF Co3 0 — 10,000 Notes: (1) The sum total power delivered from all three regulated outputs, Vo 1, Vo2, and Vo3, cannot exceed 62 watts. (2) The sum-total current from outputs Vo 2, and Vo3 cannot exceed 11ADC. (3) After latched shutdown, the module may be reset by cycling the input power. (4) The ripple and noise is measured with a 10µF tantalum capacitor across each output. (5) The transient response is measured with a 25% load step from I o =0.5Iomax, and di/dt =0.2A/µs. (6) Pins 3 & 4 are diode protected and can be connected to +V in. (7) Voltage output at “TEMP” pin is defined by the equation:- V TEMP = 0.5 + 0.01·T, where T is the sensed temperature in degrees centigrade. See pin descriptions for more information. (8) Ultra-low ESR capacitors, such as organic or polymer aluminum electrolytic types, may cause instability. For more informatio n, refer to the application note regarding capacitor selection. SLTS142C - DECEMBER 2000 -REVISED SEPTEMBER 2002

For technical support and more information, see inside back cover or visit www.ti.com PT4842— 48V 65-W Triple Output Isolated DC/DC Converter for DSL Applications Efficiency vs Output Power PT4842 Performance Characteristics (See Note A) Typical Characteristics Power Dissipation vs Output Power Note A: All Characteristic data in the above graphs has been developed from actual products tested at 25°C. This data is considered typ ical data for the ISR. Note B: SOA curves represent operating conditions at which internal components are at or below manufacturer’s maximum rated operating t emperatures. PT4842 SOA vs Output Load @V in =48V PT4842 Safe Operating Areas (See Note B) PT4842 SOA vs Output Load @V in =60V PT4842 SOA vs Output Load @V in =36V 100 0 2 04 06 08 0 1 0 0 % Load (All Outputs) Efficiency - % 36V 48V 75V VIN 0 2 04 06 08 0 1 0 0 % Load (All Outputs) Pd - Watts 75V 48V 36V VIN SLTS142C - DECEMBER 2000 -REVISED SEPTEMBER 2002 0 2 04 06 08 0 1 0 0 % Load (All Outputs) Ambient Temperature (°C) 300LFM 200LFM 100LFM Nat conv Airflow 0 2 04 06 08 0 1 0 0 % Load (All Outputs) Ambient Temperature (°C) 300LFM 200LFM 100LFM Nat conv Airflow 0 2 04 06 08 0 1 0 0 % Load (All Outputs) Ambient Temperature (°C) 300LFM 200LFM 100LFM Nat conv Airflow

For technical support and more information, see inside back cover or visit www.ti.com PT4840 Series Operating Features of the PT4840 Triple-Output DC/DC Converters Over-Current Protection The current limit function of the PT4840 series of triple-output DC/DC converters is divided into two zones. These are the high-voltage output Vo 1, and the two low-voltage outputs (combined) Vo 2/Vo3. A load fault applied to Vo 1 will cause this output voltage to drop. A drop in Vo1 (to less than 10V) will also cause outputs Vo2 and Vo3 to simultaneously turn off. Load faults applied to either Vo 2 or Vo3 will cause both these outputs to drop, but in this case Vo 1 will be unaffected. Each protection zone incorporates a latch-off time-out period of approximately 200ms. A transient or momentary fault lasting less than this period will allow the prompt recovery of all affected outputs. Faults applied for longer than this period will cause the affected zone to latch off. Faults applied to Vo 2 or Vo3 results in the latch off of both these outputs; Vo1 being unaffected, whereas the latch off of Vo1 will shut down all three outputs. Recovery from a latched shutdown condition requires the removal and corresponding re-application of input power to the converter. Over-Temperature Protection The PT4840 DC/DC converter series have an internal temperature sensor, which monitors the temperature of the module’s metal case. If the case temperature exceeds a nominal 110°C the converter will shut down. The converter will automatically restart when the sensed temperature returns to about 100°C. The analog voltage generated by the sensor is also made available at the ‘TEMP’ output (pin 5), and can be monitored by the host system for diagnostic purposes. Consult the ‘Pin Descrip- tions’ section of the data sheet for more information on this feature. Under-Voltage Lock-Out The Under-Voltage Lock-Out (UVLO) circuit prevents operation of the converter whenever the input voltage to the module is insufficient to maintain output regulation. The UVLO has approximately 2V of hysterisis. This is to prevent oscillation with a slowly changing input voltage. Below the UVLO threshold the module is off and the enable control inputs, EN1 and EN2 are inoperative. Primary-Secondary Isolation The PT4840 series of DC/DC converters incorporate electrical isolation between the input terminals (primary) and the output terminals (secondary). All converters are production tested to a withstand voltage of 1500VDC. The isolation complies with UL60950 and EN60950, and the requirements for operational isolation. This allows the converter to be configured for either a positive or negative input voltage source. The regulation control circuitry for these modules is located on the secondary (output) side of the isolation barrier. Control signals are passed between the primary and secondary sides of the converter via a proprietory magnetic coupling scheme. This eliminates the use of opto-couplers. The data sheet ‘Pin Descriptions’ and ‘Pin-Out Information’ provides guidance as to which reference (primary or secondary) that must be used for each of the external control signals. Input Current Limiting The converter is not internally fused. For safety and overall system protection, the maximum input current to the converter must be limited. Active or passive current limiting can be used. Passive current limiting can be a fast acting fuse. A 125-V fuse, rated no more than 10A, is recommended. Active current limiting can be imple- mented with a current limited “Hot-Swap” controller.

required to insure dynamic response to load transients. electrical specification table on p.3. with temperature when selecting electrolytic capacitors. noise components during higher current excursions. Table 1. The table identifies vendors with acceptable temperature range extends below 0°C. long term capacitor life cycles.

For technical support and more information, see inside back cover or visit www.ti.com Application Notes continued Table 1; Output Capacitors for Vo 1 (See Note A) /rodneVroticapaC tnenopmoC seireS (noitceleSsuBegatloVhgiH,scitsiretcarahCroticapaC ≥≥≥≥≥ )V21 ytitnauQ gnikroW egatloV )Fµ(eulaV tnelaviuqE)RSE( ecnatsiseRseireS tnerruCelppiRxaM )smrI(C°58@ lacisyhP )mm(eziS oV 1 cinosanaP )tnuoMecafruS(CF )tnuoMecafruS(KF V52 V53 V52 022 033 033 51.0 Ω 560.0 Ω 061.0 Ω Am076 Am5021 Am006 01 × 2.01 5.21 × 5.61 8× 2.01 P122E1CFVEE QL133V1CFVEE P133E1KFVEE noC-imehCdetinU ZXL YVM V52 V53 V52 033 022 033 090.0 Ω 090.0 Ω 51.0 Ω Am557 Am067 Am076 01 × 5.21 01 × 5.21 01 × 3.01 L21X01M133BV52ZXL L21X01M122BV53ZXL PT01x01M133CV52YVM MPnocihciNV 52 V52 022 033 31.0 Ω 590.0 Ω Am006 Am057 01 × 5.21 01 × 51 6HPM122E1MPU 6HPM133E1MPU VS/SS-nocsO R/Ns uBV51+ehtnOesUtoNoD :XVA SPTmulatnaT R7XcimareC R7XcimareC V53 V05 V05 4.0 ÷Ω 331.0=3 Ω 600.0 Ω 600.0 Ω Am707 ×3 Am005 Am005 L3.7 × W7.5 × 1.4 0040R530M633VSPT C)sdael(AAK501C560RM )MS(2TAM501C5281 :temeK 594mulatnaT cimareCR7X V53 V05 572.0 Ω 600.0 Ω Am796 ×3 Am577> L3.7 × W7.5 × H0.4 SA530M622X594T CAR5501C5281C :eugarpS D495mulatnaT cimareCR7X V53 V05 002.0 Ω 600.0 Ω Am698 577> L2.7 × W6 W1.4 T2R5300X633D495 ÑAXM501Y5281JV /rodneVroticapaC tnenopmoC seireS )V5<(noitceleSsuBegatloVwoL,scitsiretcarahCroticapaC ytitnauQ gnikroW egatloV) Fµ(eulaV tnelaviuqE)RSE( ecnatsiseRseireS tnerruCelppiRxaM )smrI(C°58@ lacisyhP )mm(eziS oV 2 oV/ 3 )V5<( rebmuNrodneV :cinosanaP )tnuoMecafruS(CF )laidaR(CF V53 V53 V61 086 093 033 340.0 Ω 560.0 Ω 090.0 Ω Am5561 Am5021 Am557 61 × 51 5.21 × 51 .01 × 5.21 S186V1CFUEE S193V1CFVEE 133E1CFUEE :noC-imehCdetinU ZFL SF XF V53 V52 V01 V02 033 033 033 022 860.0 Ω 090.0 Ω 520.0 Ω 020.0 Ω Am0501 Am067 Am0053 Am5044 01 × 61 01 × 5.21 01 × 5.01 01 × 5.01 LL61X01M133BV53ZXL LL21X01M133BV52ZXL M0933SF01 M022XF02 MPnocihciNV 53 V53 V52 065 033 033 840.0 Ω 560.0 Ω 590.0 Ω Am0631 Am0201 Am057 61 × 51 5.21 × 51 5.01 × 51 6HHM165V1MPU 6HHM133V1MPU 6HHM133C1MPU KFcinosanaP )tnuoMecafruS( V53 V53 033 074 080.0 Ω 060.0 Ω Am058 Am0011 01 × 2.01 5.21 × 5.31 P133V1KFVEE Q174V1KFVEE )laidaR(SS-nocsO )tnuoMecafruS(VS V01 V01 V02 033 033 051 520.0 Ω 020.0 Ω 420.0 Ω Am0662 Am0662 Am0252 01 × 5.01 3.01 × 3.01 × × 6.21 M033SS01 M033VS01 M051VS02 mulatnaTSPTXVAV 01 V01 V61 033 033 051 001.0 Ω 060.0 Ω 570.0 Ω Am4141 Am6281 Am3361 L3.7 × W7.5 × 1.4 0010R010X733VSPT 0600R010X733VSPT 5700R610X751VSPT :temeK 025T 594T V01 V01 033 022 040.0 Ω 070.0 Ω Am0002 Am2831 W3.4 × L3.7 × H0.4 SA010M733X025T SA010M722X594T mulatnaTeugarpS )tnuoMecafruS(D495 V01 V61 033 081 540.0 Ω 550.0 2÷Ω Am8881 Am4071 L2.7 × W6 × W1.4 T2R0100X733D495 T2R6100X781D495 Note A: N/R –Not Recommended. Ultra-low ESR capacitors are not recommended for Vo 1 (+15V) output bus. Note B: The part numbers listed in Table 2 can be used for any low-output bus voltage of <5VDC. Table 2; Output Capacitors for Vo 2, and Vo3 (See Note B) PT4840 Series

For technical support and more information, see inside back cover or visit www.ti.com Adjusting the Output Voltage of the PT4840 Dual Output Voltage DC/DC Converters The Vo2 and Vo3 output voltages from the PT4840 se- ries of DC/DC converters can be independantly adjusted by up to ±10% from their factory pre-set voltage. The method of adjustment uses a single external resistor. The value of the resistor determines the magnitude of adustment, and the placement of the resistor determines the direction of adjustment (up or down). The resistor value can be calculated directly from a simple formula. The constants are given in Table 1. Alternatively, T able 2 provides the resistor values for a select number of output voltages. The placement of each resistor is as follows. Vo

2 Adjust Up: To increase the output, add a resistor R 1

between pin 17 (Vo2 Adjust) and pin 18 (COM). Vo2 Adjust Down: Add a resistor (R2), between pin 17 (Vo2 Adjust) and pin 16 (+Vo1). Vo3 Adjust Up: Add a resistor R 3 between pin 21 (Vo3 Adjust) and pins 20 (COM). Vo3 Adjust Down: Add a resistor (R4) between pin 21 (Vo3 Adjust) and pin 22 (+Vo3). Refer to Figure 1 for further information on resistor placement. Figure 1 Notes: 1. Use only a single 1% resistor in either the R1 or (R2) location to adjust Vo2, and in the R3 or (R4) location to adjust Vo3. Place the resistor as close to the ISR as possible. 2. Never connect capacitors to either the Vo2 Adjust or Vo3 Adjust pins. Any capacitance added to these control pins will affect the stability of the respective regulated output. The adjust resistor values may be calculated. Use the applicable formula and select the appropriate constants from Table 1 for the output and model being adjusted. R1 or R3 = Ro · Vr – Rs kΩ Va – Vo (R2) or (R4) = Ro (Va – Vr ) – Rs kΩ Vo – Va Where: Vo = Original output voltage, (Vo 2 or Vo3) Va = Adjusted output voltage Vr = The reference voltage from Table 1 Ro = The resistance value in Table 1 Rs = The series resistance from Table 1 PT4840 Series +V IN – V IN +Vo 1 +Vo 2 +Vo 3 PT4840 15, 16 22, 233 Vo 1 COM COM Vo 2 Vo 3 +V IN -VIN EN 1 Vo 2ad jVo 3ad j 1721 C OUT 1 C OUT 3 C OUT 2 C IN (R 4) Ad j Down R 3 Ad just Up (R 2) Ad j Down R 1 Ad just Up 12, 13 18 – 20 COM

For technical support and more information, see inside back cover or visit www.ti.com Application Notes continued 3.0 (3.1) 3.05 (6.5)kΩ 3.1 (11.5)kΩ 3.15 (20.0)kΩ 3.2 (36.9)kΩ 3.25 (87.6)kΩ 3.3 3.35 309.0k Ω 3.4 151.0k Ω 3.45 98.2k Ω 3.5 71.7k Ω 3.55 55.9k Ω 3.6 45.3k Ω R1/R3 = Black, R2/R4 = (Blue) Vo2 Bus Vo 3 Bus Series Pt # PT4841/42 PT4841 PT4842 Adj. Resistor R 1/(R2) R3/(R4) R3/(R4) Vo(nom) 3.3V 1.5V 1.8V Va(req’d) V a(req’d) Table 1 ADJUSTMENT RANGE AND FORMULA PARAMETERS Vo2 Bus Vo 3 Bus Series Pt # PT4841/42 PT4841 PT4842 Adj. Resistor R 1/(R2) R3/(R4) R3/(R4) Vo(nom) 3.3V 1.5V 1.8V Va(min) 2.97V 1.35V 1.62V Va(max) 3.63V 1.65V 1.98V Vr 2.5V 1.0V TBD Ro (kΩ ) 6.34 4.99 TBD Rs (kΩΩΩΩΩ ) 7.5 10.0 TBD 1.35 (1.6)kΩ 1.4 (10.0)kΩ 1.45 (34.9)kΩ 1.5 1.55 89.8k Ω 1.6 39.9k Ω 1.65 23.3k Ω 1.7 1.7 1.8 1.85 1.9 1.95 2.0 Table 2 ADJUSTMENT RESISTOR VALUES PT4840 Series

For technical support and more information, see inside back cover or visit www.ti.com VDE Approved Installation Instructions (Installationsanleitung) Nennspannnug (Rated Voltage): PT4840 36 to 72 Vdc, T ransient to 80Vdc Nennaufnahme (Rated Input): PT4840 2.2 Adc Nennleistung (Rated Power): 25 Watts Maximum PT4841, 65 Watts Maximum PT4842, 62 Watts Maximum Ausgangsspannung (Sec. Voltage): PT4840 Series Maximum total current is 13.7 Adc or 65 Watts PT4842, +12V/ +3.3V/ +1.8V , 2.7Adc/ 6Adc/ 7Adc Ausgangsstrom (Sec. Current): Maximum total current is 13.7 Adc or 62 Watts oder (or) Ausgangsleistung (Sec. Power): Angabe der Umgebungstemperatur (Information on ambient temperature): +85 °C maximum Besondere Hinweise (Special Instructions): Es ist vorzusehen, daß die Spannungsversorgung in einer Endanwendung über eine isolierte Sekundaerschaltung bereit gestellt wird. Die Eingangspannung der Spannungsversorgungsmodule muss eine verstaerkte Isolierung von der Wechselstromquelle aufweisen. Die Spannungsversorgung muss gemaess den Gehaeuse-, Montage-, Kriech- und Luftstrecken-, Markierungs- und Trennanforderungen der Endanwendung installiert werden. Bei Einsatz eines TNV-3- Einganges muss die SELV-Schaltung ordnungsgemaess geerdet werden. (The power supply is intended to be supplied by isolated secondary circuitry in an end use application. The input power to these power supplies shall have reinforced insulation from the AC mains. The power supply shall be installed in compliance with the enclosure, mounting, creepage, clearance, casualty, markings, and segregation requirements of the end-use application. When the input is TNV-3, the SELV circuitry must be reliably grounded.) Offenbach, VDE Pr üf- und Zertifizierungsinstitut Abteilung / Department TD (Jürgen Bärwinkel) Ort / Place: Datum / Date: (Stempel und Unterschrift des Herstellers / Stamp and signature of the manufacturer) PT4840 Series

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