PT4711

PT4711 TI | Alldatasheet

Document overview

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Technical content

Features

• Input Voltage: 36 V to 75 V
• Dual Output (15 V / 15 V) (Independently Regulated!)
• Separate Output Returns (Accommodates ±15 V or +30 V)
• Internal Power-Up Sequencing
• Flexible On/Off Control
• Output Current Limit
• Fixed Frequency Operation

Ordering Information

PT Series Suffix (PT1234x) Case/Pin Order Package Configuration Suffix Code Vertical N (ENM) Horizontal A (ENN) SMD C (ENP) (Reference the applicable package code drawing for the dimensions and PC layout) Typical Application PT4711—48V

Description

The PT4711 Excalibur™ power module is a 45-watt rated DC/DC converter that produces two regu- lated output supply voltages from a standard (–48 V) telecom central office supply. Both of the outputs from this module are truly independent. Each is separately regulated and has its own negative return. This allows the flexibility of configuring the output for up to three voltage options. This includes a complimentary dual ±15-V, or a single +30-V or –30-V output. The PT4711 incorporates many features to simplify system integra- tion. These include a flexible On/Off enable control, input under-voltage lock-out, and over-temperature pro- tection. All outputs are short-circuit protected, and internally sequenced for simultaneous power-up and power- down. The module is packaged in a space-saving solderable copper case, requires no heat sink, and can occupy as little as 1.2 in 2 of PCB area. Co1, Co2: Recommended 150 µF Cin: Optional 47 µF electrolytic EN1 & EN2 pins: See On/Off Enable Logic 45-W Dual-Output Isolated DC/DC Converter

• Over-T emperature Shutdown
• Under-Voltage Lockout
• 1500 VDC Isolation
• Space-Saving Solderable Case 1.2 sq. in. PCB Area (suffix N)
• Surface Mount Option
• Safety Approvals (Pending): UL 60950, cUL 60950 SL TS225 APRIL 2004 CIN Co2 Co1 ++VIN –VIN PT4711 EN 2 EN 1 +Vo1 +Vo2 V1 Adj V2 Adj –Vo1 +VIN –VIN 20–Vo2 +15 V –15 V

For technical support and further information, visit http://power.ti.com Pin Function 1+ V i n 2– V i n

3 EN 2

4 EN 1

5 Do Not Connect

6 Do Not Connect

7 Do Not Connect

×1 Off

10 O n

0× Off Notes: Logic 1 =Open collector Logic 0 = –Vin (pin 2) potential For positive Enable function, connect pin 4 to pin 2 and use pin 3. For negative Enable function, leave pin 3 open and use pin 4. +Vin: The positive input supply for the module with respect to –V in. When powering the module from a –48-V telecom central office supply, this input is connected to the primary system ground. –Vin: The negative input supply for the module, and the 0-VDC reference for the EN 1, and EN 2 inputs. When powering the module from a +48-V supply, this input is connected to the input source return. EN 1: The negative logic input that activates the module output. This pin must be connected to –V in to enable the module’s outputs. A high impedance disables the module’s outputs. EN 2: The positive logic input that activates the module output. If not used, this pin should be left open circuit. Connecting this input to –V in disables the module’s outputs. +Vo 1: This is the positive DC output voltage with respect to –Vo1. The output voltage produced across ±Vo1 is electrically isolated from ±V in and indepen- dently regulated from that produced at ±Vo 2. If the +Vo1 node is connected to the secondary ground, a negative output voltage will be produced at –Vo 1. –Vo 1: The negative output supply voltage with respect to +Vo 1. If this node is connected to the secondary ground, a positive voltage is produced at +Vo +Vo 2: This is the positive DC output voltage with respect to –Vo2. The output voltage produced across ±Vo2 is electrically isolated from ±V in and indepen- dently regulated from that produced at ±Vo1. If +Vo2 node is connected to the secondary ground, a nega- tive output voltage will be produced at –Vo –Vo 2: The negative output supply voltage with respect to +Vo 2. If this node is connected to the secondary ground, a positive voltage is produced at +Vo2. ±Vo1 Adjust: Using a single resistor, this pin allows the output voltage produced at ±Vo 1 to be adjusted higher or lower by up to 10%. If not used this pin should be left open circuit. ±Vo2 Adjust: Using a single resistor, this pin allows the output voltage produced at ±Vo 2 to be adjusted higher or lower by up to 10%. If not used this pin should be left open circuit. Pin Function

8 Pin Not Present

9 Pin Not Present

10 Pin Not Present

11 Pin Not Present

12 Pin Not Present

13 Pin Not Present

Note: Shaded functions indicates those pins that are at primary-side potential. All other pins are referenced to the secondary. Pin Function

15 Not Connected

16 –Vo 1

17 Vo 1 Adjust

19 Not Connected

20 –Vo 2

21 Vo 2 Adjust

PT4711—48V 45-W Dual-Output Isolated DC/DC Converter SL TS225 APRIL 2004

For technical support and further information, visit http://power.ti.com PT4711—48V 45-W Dual-Output Isolated DC/DC Converter SL TS225 APRIL 2004 PT4711 Characteristics Symbols Conditions Min Typ Max Units Output Current Io 1, Io2 Both outputs 0 — 1.5 A Input Voltage Range V in Continuous 36 — 75 VSurge (1 minute) — — 80 Set-Point Voltage Vo 1, Vo2 14.55 15.0 15.45 V T emperature Variation ∆Regtemp –40°C ≤Ta ≤+85°C, Io =Iomin Vo 1, Vo2 — ±0.5 — %V o Line Regulation ∆Regline All outputs, Over Vin range — ±0.05 ±0.25 %V o Load Regulation ∆Regload All outputs, 0≤Io≤Iomax — ±0.2 ±0.5 %V o Cross Regulation ∆Regcross Io1 =Io1max, 0 ≤ Io2 ≤ Io2max — ±10 — mVIo2 =Io2max, 0 ≤ Io1 ≤ Io1max T otal Output Voltage Variation ∆Vo tot Includes set-point, line, load, Vo1 , Vo2 14.25 — 15.75 V–40°C ≤Ta ≤+85°C Efficiency η —8 6—% Vo Ripple (pk-pk) V n Measured from each output to COM,Vo1, Vo2 —1 5—m V pp0 to 20 MHz bandwidth T ransient Response t tr 0.1 A/µs load step, 50% to 75% Iomax — 100 — µSec Vos Vo over/undershoot — 2 — %V o Output Adjust Range Vo x adj Each V o adjusted independently — ±10 — %V o Current Limit Threshold Io LIM Shutdown, auto restart Vo 1, Vo2 — 2.5 — A Switching Frequency ƒ s Over Vin and Io ranges 550 600 650 kHz Under Voltage Lockout V on Vin increasing — 34 — V Voff Vin decreasing — 32 — Enable Control (pins 3 & 4) Referenced to –V in (pin 2) High-Level Input Voltage V IH 4 — Open (1) V Low-Level Input Voltage VIL –0.2 — 0.8 (1) Low-Level Input Current I IL Pin connected to –Vin (pin 2) — –0.16 — mA Standby Input Current I in standby pins 3 & 4 open circuit — 5 20 mA Internal Input Capacitance C int —1 —µ F External Output Capacitance C o Each output to COM Vo 1, Vo2 0 — 500 µF Primary/Secondary Isolation V iso 1500 — — V C iso — 2,200 — pF R iso 1 0——M Ω Secondary Working Voltage ∆Vsec Between any two output pins — — 35 (2) V Operating T emperature Range T a Over Vin Range –40 — 85 (3) °C Solder Reflow T emperature T reflow Surface temperature of module pins or case — — 215 (4) °C Storage T emperature T s — –40 — 125 °C Mechanical Shock Per Mil-STD-883D, Method 2002.3 — 500 — G’s1 msec, ½ Sine, mounted Mechanical Vibration Mil-STD-883D, Method 2007.2 Suffix A — 15 (5) — G’s20-2000 Hz Suffix N, C — 20 (5) — Weight — Vertical/Horizontal — 50 — grams ShutdownT emperature OTP 115 125 °C Flammability — Meets UL 94V-O Notes: (1) The Enable inputs (pins 3 & 4) have internal pull-ups. Leaving pin 3 open-circuit and connecting pin 4 to –V in allows the the converter to operate when input power is applied. The maximum open-circuit voltage is 5 V . (2) The maximum voltage that may exist between any two output pins. (3) See SOA curves or consult factory for appropriate derating. (4) During solder reflow of SMD package version, do not elevate the module case, pins, or internal component temperatures above a peak of 215°C. For further guidance refer to the application note, “Reflow Soldering Requirements for Plug-in Power Surface Mount Products,” (SLT A 051). (5) Only the case pins on through-hole pin configurations (N & A) must be soldered. For more information see the applicable pack age outline drawing.

For technical support and further information, visit http://power.ti.com Typical Characteristics Performance Characteristics; V in =48 V (See Note A) (Refer to typical application for output configuration) Note A: All Characteristic data in the above graphs has been developed from actual products tested at 25°C. This data is considered typ ical data for the ISR. Note B: SOA curves represent operating conditions at which the internal components are at or below the manufacturer’s maximum rated ope rating temperatures. PT4711 Safe Operating Area (SOA) (See Note B) (All outputs proportionally loaded from 0 to 100 % of full load) Efficiency vs Io1 & |Io2| Power Dissipation vs Io 1 & |Io2| SOA vs Total Output Power; Vin =48 V Cross Regulation; Vo1 vs |Io2| Cross Regulation |Vo2| vs Io1 14.98 14.99 15.00 15.01 15.02 |Io2| (A) Cross Regulation Vo1 (V) 14.98 14.99 15.00 15.01 15.02 Io1 (A) Cross Regulation |Vo2| (V) PT4711—48V 45-W Dual-Output Isolated DC/DC Converter SL TS225 APRIL 2004 Io1 & |Io2| (A) Efficiency - % 36 V 48 V 75 V VIN Io1 & |Io2| (A) Pd - Watts 75 V 48 V 36 V 0 1 02 03 04 0 Output Power (W) Ambient Temperature (°C) 300LFM 200LFM 100LFM Nat conv Airflow

For technical support and further information, visit http://power.ti.com Adjusting the Output Voltages of the PT4711 Dual-Output DC/DC Converters The PT4711 dual-output DC/DC converter produces two independently regulated output voltages. The mag- nitude of each output may be trimmed higher or lower than the nominal set-point by up to 10%. The adjust- ment method uses a single external resistor.

1 The value

of the resistor determines the magnitude of adjustment, and the location of the resistor determines the direction of adjustment (increase or decrease). The resistor values can be calculated using a formula (see below). Alterna- tively the resistor value may be selected directly from the values given in T able 2-2. The placement of each resistor is as follows. Adjust Up: To increase the magnitude of the output volt- age, add a resistor R 1 between the appropriate Vox Adj (‘Vo1 Adj’ or ‘Vo2 Adj’) and the respective -Vox voltage rail. See Figure 2-1(a) and T able 2-1 for the resistor placement and pin connections. Figure 2-1b PT4711 Calculation of Resistor Adjust Values The adjust resistor value may also be calculated using an equation. Note that the equation for R 1 [Adjust Up] is different to that for (R2) [Adjust Down]. R1 [Adjust Up] = 35.75 – 20 k Ω(Va – Vo ) (R2) [Adjust Down] = 14.3 (Va – 2.5) – 20 k Ω (Vo – Va ) Where: V o = Original output voltage (Vo x) Va = Adjusted output voltage (Va x) (R2) To adjust the Vo1 or Vo2 lower # - See Table 3-1 for pin connections, where Vox indicates Vo1, or Vo2 +Vox Vox Adj +Vox DC/DC Module –Vox –Vox Figure 2-1a To adjust the Vo1 or Vo2 higher # - See Table 3-1 for pin connections, where Vox indicates Vo1, or Vo2 +Vox Vox Adj +Vox DC/DC Module –Vox –Vox Adjust Down: T o decrease the magnitude of the output voltage, add a resistor (R2), between the appropriate Vox Adj (Vo1 Adj or Vo2 Adj,) and the respective +Vox voltage rail. See Figure 2-1(b) and T able 2-1 for the resistor placement and pin connections. Table 2-1; Adjust Resistor Pin Connections To Adjust Up To Adjust Down Connect R1 Connect (R2) from to from to Vox Adj –Vo x Vox Adj +Vo x Vo1 17 16 17 14 Vo2 21 20 21 18 Notes: 1. Use only a single 1% (or better) tolerance resistor in either the R1 or (R2) location to adjust a specific output. Place the resistor as close to the ISR as possible. 2. Never connect capacitors to any of the ‘Vox Adj’ pins. Any capacitance added to these control pins will affect the stability of the respective regulated output.

Application Notes continued For technical support and further information, visit http://power.ti.com Table 2-2 ADJUSTMENT RESISTOR VALUES FOR Vo1 & Vo2 Adj. Resistor R 1/(R2) % Adjust V a(req’d) – 8% 13.80 V (115) kΩ – 7% 13.95 V (136) kΩ – 6% 14.10 V (164) kΩ – 5% 14.25 V (204) kΩ – 4% 14.40 V (264) kΩ – 3% 14.55 V (363) kΩ – 2% 14.70 V (562) kΩ 0% 15.00 V + 1% 15.15 V 218 k Ω + 2% 15.30 V 99.2 k Ω + 3% 15.45 V 59.4 k Ω + 4% 15.60 V 39.6 k Ω + 5% 15.75 V 27.7 k Ω + 6% 15.90 V 19.7 k Ω + 7% 16.05 V 14.0 k Ω + 8% 16.20 V 9.8 k Ω + 9% 16.35 V 6.5 k Ω +10% 16.50 V 3.8 k Ω R1 = Black, R2 = (Blue) PT4711

Orderable Device Status(1) Package Type Package Drawing Pins Package Qty Eco Plan(2) Lead/Ball FinishMSL Peak Temp (3) PT4711A ACTIVE SIP MOD ULE ENN 21 8 TBD Call TI Level-1-215C-UNLIM PT4711C ACTIVE SIP MOD ULE ENP 21 8 TBD Call TI Level-3-215C-168HRS PT4711N ACTIVE SIP MOD ULE ENM 21 8 TBD Call TI Level-1-215C-UNLIM (1)The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2)Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontentfor the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS):TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt):This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br):TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. PACKAGE OPTION ADDENDUM www.ti.com 6-Dec-2006 Addendum-Page 1

MMSI071 – OCTOBER 2001 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 ENN (R–MSIP–T21) METAL SINGLE–IN-LINE MODULE 4203487/A 10/01 2.58 (65,53) MAX. 1.46 (37,08) MAX 0.160 (4,06) TYP. 0.040 (1,01) TYP. 0.100 (2,54) TYP. 0.025 (0,63) TYP. 0.472 (12,00) MAX 1.62 (41,14) MAX PC LAYOUT 2.520 (64,00) 2.620 (66,54) 1.500 (38,10) Note H 1.260 (32,00) 1.44 (36,57) 0.280 (7,11) 0.050 (1,27) 0.080 (2,03)

2 Places

0.250 0.100 (2,54) 20 Places 0.260 (6,60) ∅ 0.045 (1,14) MIN. 21 Places 0.017 (0,43) TYP. 0.080 (2,03) 0.160 (4,06) 0.110 (2,79) 0.040 (1,01) Note E Note E

4 Places

0.032 (0,81) TYP. 0.140 (3,55) MIN. See Note F ∅ 0.065 (1,65) MIN. 4 Places Plated through holes. See note G. Plated through, Note J Note G Suffix A (6,35) 0.51 (12,95) NOTES: A. All linear dimensions are in inches (mm). B. This drawing is subject to change without notice. C. 2 place decimals are ±0.030 (±0,76mm). D. 3 place decimals are ±0.010 (±0,25mm). E. Recommended mechanical keep out area. F. Electrical pin length mounted on printed circuit board, from seating plane to pin end. G. The case is electrically uncommitted. The recommended connection is to secondary ground. H. No copper, power or signal traces in this area. J. Some pins may not be present, see product specifications.

MMSI072 – OCTOBER 2001 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 ENP (R–MSIP–G21) METAL SINGLE–IN-LINE MODULE 4203488/A 10/01 2.58 (65,53) MAX. 1.46 (37,08) MAX 0.160 (4,06) TYP. 0.040 (1,01) TYP. 0.100 (2,54) TYP. 0.025 (0,63) TYP. 0.472 (12,00) MAX 1.62 (41,14) MAX PC LAYOUT 2.520 (64,00) 2.620 (66,54) 1.500 (38,10) Note J 1.260 (32,00)1.44 (36,57) 0.280 (7,11) 0.050 (1,27) 0.080 (2,03) 0.250 0.100 (2,54) 20 Places 0.260 (6,60) 0.040 (1,01) Note E 0.032 (0,81) TYP. ∅ 0.065 (1,65) MIN. 4 Places Suffix C (6,35)0.51 (12,95) Detail ”A” Note G, H Note F 0.070 (1,77) 0.090 (2,28) See note H. Plated through holes. 0.140 (3,55) GagePlane 0°– 60° 0.080 (2,03) Seating Plane 0.004 (0,10) 0.017 (0,43) TYP. Note I 0.230 (5,84) 0.210 (5,33) 0.050 (1,27) 0.165 (4,19) 0.050 (1,27) 21 Places 0.100 (2,54) 0.050 (1,27) 0.100 (2,54) Note K Note E Detail ”A” NOTES: A. All linear dimensions are in inches (mm). B. This drawing is subject to change without notice. C. 2 place decimals are ±0.030 (±0,76mm). D. 3 place decimals are ±0.010 (±0,25mm). E. Recommended mechanical keep out area. F. Vias are recommended to improve copper adhesion. G. Solder mask openings to copper island for solder joints to mechanical pins. H. The case is electrically uncommitted. The recommended connection is to secondary ground. I. Power pin connections should utilize two or more vias per input, ground and output pin. J. No copper, power or signal traces in this area. K. Some pins may not be present, see product specifications.

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