DATASHEET SEARCH SITE | WWW.ALLDATASHEET.COM

Document overview

  • Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
  • PDF pages: 5

Technical content

Fully Integrated OOK/ASK Receiver

DESCRIPTION

The PT4304 is a fully integrated OOK/ASK receiver for the 315 / 433.92 MHz frequency bands requiring few external components. The PT4304 receiver chain consists of a low-noise amplifier (LNA), image -rejection mixer (IRM), built-in channel-select filter (CSF), OOK/ASK demodulator, data filter, and data slicing comparator. The local oscillator (LO) sub -system incorporates a monolithic VCO, ÷ 32 feedback divider, loop filter and fast start -up reference oscillator to form a complete phase -locked lo op-based frequency synthesizer for single channel applications. The PT4304 also includes an on-chip voltage regulator. The PT4304 is available in a 16 -pin SSOP package and is specified over the temperature range from –40 to +85 °C.

APPLICATIONS

 Automotive Remote Keyless Entry (RKE)  Remote control  Garage door and gate openers  Suitable for applications that must adhere to either the European ETSI-300-220 or the North American FCC (Part 15) regulatory standards

FEATURES

 Covers 315 and 433.92 MHz frequency bands  Low power consumption: 4. 3 mA for 315 MHz band and 4. 6 mA for 433.92 MHz band under normal operating conditions  Requires few external components  Achieves excellent sensitivity on the order of –114 dBm for 315 MHz band and –112 dBm for 433.92 MHz band (peak ASK signal level)  Supply voltage range: 2.4 to 5.5 V  Supports data rates up to 10 Kb/s  Wide input dynamic range with automatic gain control handling BLOCK DIAGRAM LNA OOK/ASK Demodulator Data Filter (LPF) RTH PLL On-Chip Regulator VDD5 Comparator 1 2 3 4 5 6 7 8 FDIVVBB AGCDISVRFANTVSSRFVSSLO 16 15 14 13 12 11 10 9 REFOSC CTH DO CE SELA SELB VSSBB Control Logic VLO Buffer Amplifier CSF (BPF) I Q IRM

V1.1 2 January 2014

433.92 MHZ APPLICATION EXAMPLE

5 VBB

13.598 MHz

1.8 pF 39 nH 47 nF VDD5 100 nF AGCDIS VDD5 DATA OUTEtched Inductor on PCB 10 pF

V1.1 3 January 2014 EVALUATION BOARD SCHEMATIC VSSLO1 VSSRF2 ANT3 VRF4 Data Filter Bandwidth Setting (Unit: Hz) 0.9K/1.25K 1.8K/2.5K 3.6K/5K 7.2K/10K AGCDIS FDIV Pin # Pin Name FLOATING LOW AGC OFF AGC ON 315 MHz433.92 MHz BILL OF MATERIALS Part Value Unit Description315 MHz 433.92 MHz L1 68 n 39 n H Antenna input matching, coil inductor L2 82 n 56 n H Antenna ESD protection, coil inductor (optional) C1 1.8 p 1.5 p F Antenna input matching C2/C3/C4/C6 100 n 100 n F Power supply de-coupling capacitor C5 10 p 10 p F Dependent upon crystal oscillator vendor; for frequency fine-tuning (optional) C7 47 n 47 n F CTH, affects coding type and start-up time R1 10 10 Ω Power supply de-coupling resistor (optional) R2 8.2 M 8.2 M Ω For reducing data output noise (optional) R3 10 K 10 K Ω MCU interface resistor (optional) X1 9.882 13.598 MHz Crystal with CLoad = 10 pF, for reference oscillator U1 PT4304 IC PT4304 IC U1 Receiver chip Notes: 1. L1 and C1 are the components for input matching network. They may need to be adjusted for different PCB layout and antenna requirements. 2. The value of C7 depends upon the data rate and coding pattern. 3. The optional components may be used depending upon specific application requirements.

V1.1 4 January 2014 ORDER INFORMATION Valid Part Number Package Type Top Code PT4304-X 16 Pins, SSOP, 150 mil PT4304-X PIN CONFIGURATION SELB REFOSC VLO FDIV CTH CE SELA DO VSSLO VSSRF VBB ANT VDD5 VRF VSSBB PT4302-X PT4304-X AGCDIS PIN DESCRIPTION Pin No. Pin Name I/O Description

1 VSSLO G Ground for LO sub-system

2 VSSRF G Ground for RF front-end

3 ANT I RF input connected to antenna via a matching network

4 VRF P Supply voltage for RF front-end

5 VBB P Supply voltage for baseband chain

6 AGCDIS I AGC control pin (tie LOW to enable AGC)

7 FDIV I RF frequency band select

8 VDD5 P 5 V regulator input

9 VSSBB G Ground for baseband chain

10 SELB I Data filter bandwidth select (pin B)

11 SELA I Data filter bandwidth select (pin A)

12 CE I Chip enable (tie HIGH to enable the chip)

13 DO O Data output

14 CTH I/O Connection for data slicing threshold capacitor

15 VLO P Supply voltage for LO sub-system

16 REFOSC I Reference oscillator input

V1.1 18 January 2014 IMPORTANT NOTICE Princeton Technology Corporation (PTC) reserves the right to make corrections, modifications, enhancements, improvements, and other changes to its products and to discontinue any product without notice at any time. PTC cannot assume responsibility for use of any circuitry othe r than circuitry entirely embodied in a PTC product. No circuit patent licenses are implied. Princeton Technology Corp. 2F, 233-1, Baociao Road, Sindian Dist., New Taipei City 23145, Taiwan Tel : 886-2-66296288 Fax: 886-2-29174598 http://www.princeton.com.tw