PST803E500NR

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1. The reset circuits of CPU and MPU. 2. The reset circuits of logic circuit. 3. Battery voltage check circuits. 4. The change circuit of a backup circuits. 5. Level detection circuits. 6. Level detector. 1. Operating Supply Voltage 1.0~6.0V (Ta=0~70°C) 2. Supply Current 0.5µA typ. 3. Reset Threshold Range 1.6~5.0V 4. Reset Threshold Accuracy ±1.0% 5. Reset Temperature Coeffi cient 30ppm/°C typ. 6. Reset Active Timeout Period 50/100/200/240/400ms 7. Output Voltage L 0.4V max. (Isink=3.2mA) 8. Output Voltage H VDD -1.5V min. (Isource=800µA) 9. Output type Open Drain Output + Active L PST803, PST805 Open Drain Output + Active H PST804, PST806 CMOS Output + Active L PST807, PST809 CMOS Output + Active H PST808, PST810

 Any products mentioned in this catalog are subject to any modification in their appearance and others for improvements withou t prior notification.  The details listed here are not a guarantee of the individual products at the time of ordering. When using the products, you will be asked to check their specifications. MITSUMI System Reset IC built-in delay time circuit PST803~810 series Block Diagram Pin Assignment VDD VDD GND GND RST RST Timer Timer  PST803  PST805 active-low output  PST804  PST806 active-high output GND RST Timer VDD GND RST Timer VDD  PST807  PST809 active-low output  PST808  PST810 active-high output Open Drain Output CMOS Output PST803, 804, 809, 810 GND RST VDD (RST) PST805, 806, 807, 808 RST GND VDD3 1(RST) Pin name Functions Internal Equivalent Circuit GND GND Pin Refer to BLOCK DIAGRAM.RST, RST Reset Signal Output Pin VDD Power Supply Pin / Voltage Detect Pin Pin Description

 Any products mentioned in this catalog are subject to any modification in their appearance and others for improvements withou t prior notification.  The details listed here are not a guarantee of the individual products at the time of ordering. When using the products, you will be asked to check their specifications. MITSUMI System Reset IC built-in delay time circuit PST803~810 series bc d e TDEL VTH PKG PACKING SPECIFICATIONS A 240ms 160 1.60V N SOT-23A R R HOUSING, Halogen-contained B 50ms L L HOUSING, Halogen-contained C 100ms ~ M R HOUSING, Halogen-free D 200ms 500 5.00V H L HOUSING, Halogen-free E 400ms P S T 8 0 9 A N a b c d e a Function Type 803 Open drain OUTPUT Active-Low SOT-23A 1 : GND 2 : RST 3 : VDD

804 Active-High

1 : GND 2 : RST 3 : VDD 805 Open drain OUTPUT Active-Low SOT-23A 1 : RST 2 : GND 3 : VDD

806 Active-High

1 : RST 2 : GND 3 : VDD 807 CMOS OUTPUT Active-Low SOT-23A 1 : RST 2 : GND 3 : VDD

808 Active-High

1 : RST 2 : GND 3 : VDD 809 CMOS OUTPUT Active-Low SOT-23A 1 : GND 2 : RST 3 : VDD

810 Active-High

1 : GND 2 : RST 3 : VDD Model Name

 Any products mentioned in this catalog are subject to any modification in their appearance and others for improvements withou t prior notification.  The details listed here are not a guarantee of the individual products at the time of ordering. When using the products, you will be asked to check their specifications. MITSUMI System Reset IC built-in delay time circuit PST803~810 series Absolute Maximum Ratings (Except where noted otherwise Ta=25°C) Recommended Operating Conditions (Except where noted otherwise Ta=25°C) Item Symbol Ratings Units Operating Ambient Temperature Topr −40~+105 °C Item Symbol Ratings Units Supply Voltage VDD max. 7 V Output Voltage RST, RST GND-0.3 ~VDDmax+0.3 (CMOS Type) GND-0.3 ~7(Open Drain Type) V Input Current (VDD) IDD 20 mA Output Current IOUT 20 mA Power Dissipation PD 150 (Not attached PCB) mW Operating Temperature Topr −40~+105 °C Storage Temperature Tstg −65~+150 °C

 Any products mentioned in this catalog are subject to any modification in their appearance and others for improvements withou t prior notification.  The details listed here are not a guarantee of the individual products at the time of ordering. When using the products, you will be asked to check their specifications. MITSUMI System Reset IC built-in delay time circuit PST803~810 series Item Symbol Test conditions Min. Typ. Max. Units Circuit Operating Voltage VDD Ta=0 to 70°C 1.0 6.0 VTa=−40 to 105°C 1.1 6.0 Supply Current IDD VDD=VTH+1V 0.5 2.0 µA Reset Threshold VTH VTH=4.63V Ta=25°C 4.584 4.630 4.676 V Ta=−40 to 85°C 4.500 4.750 Ta=85 to 105°C 4.400 4.860 VTH=4.38V Ta=25°C 4.336 4.380 4.424 Ta=−40 to 85°C 4.250 4.500 Ta=85 to 105°C 4.160 4.560 VTH=3.08V Ta=25°C 3.049 3.080 3.111 Ta=−40 to 85°C 3.000 3.150 Ta=85 to 105°C 2.920 3.230 VTH=2.93V Ta=25°C 2.901 2.930 2.959 Ta=−40 to 85°C 2.850 3.000 Ta=85 to 105°C 2.780 3.080 VTH=2.63V Ta=25°C 2.604 2.630 2.656 Ta=−40 to 85v 2.550 2.700 Ta=85 to 105°C 2.500 2.760 VTH=1.6~5.0V (0.1V step) Ta=25°C −1.0 +1.0 Ta=85 to 105°C −5.0 +5.0 Reset Threshold Temp. Coeffi cient VTH/ T 30 ppm/°C RST output voltage Low (active L type) VOL VDD=VTH−0.1V, Isink=1.2mA VTH 3.08V 0.3 VVDD=VTH−0.1V, Isink=3.2mA VTH 3.08V 0.4 RST output voltage High (active H type) VOH VDD=VTH+1V, Isink=500µA VTH 3.08V 0.8*VDD VVDD=VTH+1V, Isink=800µA VTH 3.08V VDD-1.5 RST output voltage low (active L type) VOL VDD=VTH+1V, Isink=1.2mA VTH 3.08V 0.3 VVDD=VTH+1V, Isink=3.2mA VTH 3.08V 0.4 RST output voltage High (active H type) VOH VDD=VTH−0.1V, Isink=500µA VTH 3.08V 0.8*VDD VVDD=VTH−0.1V, Isink=800µA VTH 3.08V VDD-1.5 Electrical Characteristics (Except where noted otherwise Ta=25°C) Note1 : This device is tested at Ta=25°C, over temperature limits guaranteed by design only. Note2 : The parameter is guaranteed by design.

 Any products mentioned in this catalog are subject to any modification in their appearance and others for improvements withou t prior notification.  The details listed here are not a guarantee of the individual products at the time of ordering. When using the products, you will be asked to check their specifications. MITSUMI System Reset IC built-in delay time circuit PST803~810 series Item Symbol Test conditions Min. Typ. Max. Units Circuit Reset Active Timeout Period tdel A Ta=−40 to 85°C 140 240 310 ms Ta=85 to 105°C 100 840 B Ta=−40 to 85°C 35 50 65 Ta=85 to 105°C 25 98 C Ta=−40 to 85°C 70 100 130 Ta=85 to 105°C 49 195 D Ta=−40 to 85°C 140 200 260 Ta=85 to 105°C 98 390 E Ta=−40 to 85°C 280 400 520 Ta=85 to 105°C 196 780 VDD to Reset Delay tTH VDD=(VTH+1V) to (VTH-100mV) (Note2) 20 µs Output Leakage Current (Active L, Open Drain Type) ILEAK VDD=VRST=7V 0.1 µA Note1 : This device is tested at Ta=25°C, over temperature limits guaranteed by design only. Note2 : The parameter is guaranteed by design.

 Any products mentioned in this catalog are subject to any modification in their appearance and others for improvements withou t prior notification.  The details listed here are not a guarantee of the individual products at the time of ordering. When using the products, you will be asked to check their specifications. MITSUMI System Reset IC built-in delay time circuit PST803~810 series Test Circuit -a CMOS output type -a CMOS output type Vin Vin Vin Vin Vin Vin VDD RST VDD GND (RST) RST VDD Nȍ V V A A V V V GND (RST) RST VDD GND (RST) RST VDD GND (RST) RST RST (active L) (active H) VDD to rest delay /Reset active timeout period RST VDD GND (RST) Vin RST VDD GND Vrst (RST) RST VDD GND tTH tTH VTH VTH VTH+1VVTH+1V VTH-0.1V 100% 50% 100% 50% 100% 50% t t t t t tdel tdel t 100% 50% (RST) -b open dain output type -b open dain output type ᶃ ᶄ ᶆ ᶇ ᶆ ᶅ ᶃ

 Any products mentioned in this catalog are subject to any modification in their appearance and others for improvements withou t prior notification.  The details listed here are not a guarantee of the individual products at the time of ordering. When using the products, you will be asked to check their specifications. MITSUMI System Reset IC built-in delay time circuit PST803~810 series Timing Chart PST803, 805, 807, 809 Active-Low Output Type VDD VTH RST tdel tdel ˞7%% 7SFHJPOJT JUXJMMCFPQFSBUJOHMJNJUT5IFPVUQVUJTVOEFpOFE PST804, 806, 808, 810 Active-High Output Type VDD VTH RST tdeltdel ˞ ˞ ˞7%% 7SFHJPOJT JUXJMMCFPQFSBUJOHMJNJUT5IFPVUQVUJTVOEFpOFE

 Any products mentioned in this catalog are subject to any modification in their appearance and others for improvements withou t prior notification.  The details listed here are not a guarantee of the individual products at the time of ordering. When using the products, you will be asked to check their specifications. MITSUMI System Reset IC built-in delay time circuit PST803~810 series Application Circuit PST803, 804, 805, 806 Vin VDD VCC ȝ C orȝ P RST (RST) GND GND RESET INPUT PST8˘˘ PST807, 808, 809, 810 Vin VDD VCC ȝC or ȝ P RST (RST) GND GND RESET INPUT PST8˘˘ 1. Please note that there is any possibility of circuit oscillation when resistance put in the line VIN. 2. Current and load resistance should be adjusted, which not over power dissipation level. PD (VDD-VOH) · IOH PD VOL · IOL 3. We shall not be liable for any trouble or damage caused by using this circuit. 4. In the event a problem which may affect industrial property or any other rights of us or a third party is encountered during the use of information described in these circuit, Mitsumi Electric Co., Ltd. shall not be liable for any such problem, nor grant a license therefore. Vin VDD RST (RST) GND

• Note

 Any products mentioned in this catalog are subject to any modification in their appearance and others for improvements withou t prior notification.  The details listed here are not a guarantee of the individual products at the time of ordering. When using the products, you will be asked to check their specifications. MITSUMI System Reset IC built-in delay time circuit PST803~810 series Characteristics (2.93V, active L) ˙DETECTING VOLTAGE Input Voltage(V) Output Voltage(V) 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0.0 0 0.5 1 1.5 2 2.5 3 3.5 4 ˙SUPPLY CURRENT6XSSO\\&XUUHQW ,QSXW9ROWDJH 2.0 1.5 1.0 0.5 0.0 01234567 ˙DETECTING VOLTAGE VS TEMPERATURE TEMPERATURE(°C) Deteoting Voltage(V) 2.98 2.97 2.96 2.95 2.94 2.93 2.92 2.91 2.90 2.89 2.88 -40 -20 0 20 40 60 80 100 ˙RESET ACTIVE TIMEOUT PERIOD VS TEMPERATURE Reset Active Timeout Period (ms) TEMPERATURE(°C) 300 280 260 240 220 200 180 160 140 -40 -20 0 20 40 60 80 100 ˙SUPPLY CURRENT VS TEMPERATURE 2.0 1.5 1.0 0.5 0.0 6833/<&855(17 7HPSHUDWXUH -40 -20 0 20 40 60 80 100 ˙VDD TO RESET DELAY VS TEMPERATUREVDD TO RESET DELAY VS TEMPERATURE (ms) TEMPERATURE(°C) -40 -20 0 20 40 60 80 100

 Any products mentioned in this catalog are subject to any modification in their appearance and others for improvements withou t prior notification.  The details listed here are not a guarantee of the individual products at the time of ordering. When using the products, you will be asked to check their specifications. MITSUMI System Reset IC built-in delay time circuit PST803~810 series ˙“L” OUTPUT VOLTAGE VS TEMPERATURE “L” OUTPUT VOLTAGE (V) 0.4 0.3 0.2 0.1 0.0 - 4 0 - 2 00 2 04 06 08 0 1 0 0 Temperature(°C) (active L) ˙ “H” OUTPUT VOLTAGE VS TEMPERATURE“H” OUTPUT VOLTAGE (V) 4.1 4.0 3.9 3.8 3.7 - 4 0 - 2 00 2 04 06 08 0 1 0 0 Temperature(°C) (active L)