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ADVANCE□INFORMATION TPS7B81-Q1 C IN C OUT IN OUT EN Product Folder Order Now T echnical Documents Tools & Software Support & Community An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. ADVANCE INFORMATION for pre-production products; subject to change without notice. TPS7B81-Q1 SBVS370 –MAY 2019 TPS7B81-Q1150-mA,Off-Battery,Ultralow-IQ(3-µA),Low-DropoutRegulator

1 Features

1• AEC-Q100 qualified for automotive applications: – Temperature grade 1: –40°C to 125°C, TA

Device junction temperature range: –40°C to 150°C
3-V to 40-V wide VIN input voltage range with up to 45-V transient
Maximum output current: 150 mA
Low quiescent current IQ: – 300 nA typical when EN = low (shutdown mode) – 2.7 µA typical at light loads – 4.5 µA maximum at light loads
1.5% output-voltage accuracy over line, load and temperature
Maximum dropout voltage: 525 mV at 150-mA load current for fixed 5-V output version
Stable with low-ESR (0.001-Ω to 5-Ω) ceramic output-stability capacitor (1 µF to 200 µF)
Fixed 5-V and 3.3-V output voltage
Integrated fault protection: – Thermal shutdown – Short-circuit and overcurrent protection
Packages: – DGN (8-pin HVSSOP), RθJA = 63.9°C/W (preview) – DRV (6-pin WSON), RθJA = 72.8°C/W – KVU (5-pin TO-252), RθJA = 38.8°C/W (preview)

2 Applications

Cluster power supply
Body control modules
Always-on battery-connected applications: – Gateway applications – Remote keyless entry systems
Powering MCUs and CAN/LIN transceivers

3 Description

In automotive battery-connected applications, low quiescent current (IQ) is important to conserve energy and to extend battery lifetime. Always-on systems must have ultralow IQ over an extended temperature range to enable sustained operation when the vehicle ignition is off. The TPS7B81-Q1 is a low-dropout (LDO) linear regulator designed for up to 40-V VIN applications. With only a 2.7-µA typical quiescent current at light load, the device is an optimal solution for powering microcontrollers and controller area network and local interconnect network (CAN/LIN) transceivers in standby systems. The device features integrated short-circuit and overcurrent protection. This device operates in ambient temperatures from –40°C to +125°C and with junction temperatures from –40°C to +150°C. Additionally, this device is available in several packages of varying size and thermal conductivity. The small WSON package facilitates the most compact PCB design and the TO-252 package enables sustained operation despite significant dissipation across the device. These features make the device well suited as a power supply for various battery-connected automotive applications. Device Information(1) PART NUMBER PACKAGE BODY SIZE (NOM) TPS7B81-Q1 HVSSOP (8)(2) 3.00 mm × 3.00 mm WSON (6) 2.00 mm × 2.00 mm (1) For all available packages, see the orderable addendum at the end of the data sheet. (2) Preview package. Typical Application Schematic

11.1 Receiving Notification of Documentation Updates 15

12 Mechanical, Packaging, and Orderable

4 Revision History

NOTE: Page numbers for previous revisions may differ from page numbers in the current version. DATE REVISION NOTES May 2019 * Initial release.

ADVANCE□INFORMATION GND Not to scale 1 IN 2 EN

3 GND

4 DNC

5 OUT

5 DNC

6 OUT

5 Pin Configuration and Functions

8-Pin HVSSOP PowerPAD™ Top View 6-Pin WSON PowerPAD™ Top View 5-Pin TO-252 Top View

ADVANCE□INFORMATION TPS7B81-Q1 SBVS370 –MAY 2019 www.ti.com Product Folder Links: TPS7B81-Q1 Submit Documentation Feedback Copyright © 2019, Texas Instruments Incorporated Pin Functions PIN I/O DESCRIPTION NAME NO. DGN DRV KVU DNC — 5 4 — Do not connect to a biased voltage. Tie this pin to ground or leave floating. EN 2 2 2 I Enable input pin. Drive EN greater than VIH to turn on the regulator. Drive EN less than VIL to put the low-dropout (LDO) into shutdown mode. GND 4, 5, 6 3,4 3, TAB — Ground reference IN 1 1 1 I Input power-supply pin. For best transient response and to minimize input impedance, use the recommended value or larger ceramic capacitor from IN to ground as listed in the Recommended Operating Conditions table and the Input Capacitor section. Place the input capacitor as close to the output of the device as possible. NC 3, 7 — — — Not internally connected OUT 8 6 5 O Regulated output voltage pin. A capacitor is required from OUT to ground for stability. For best transient response, use the nominal recommended value or larger ceramic capacitor from OUT to ground; see the Recommended Operating Conditions table and the Output Capacitor section. Place the output capacitor as close to output of the device as possible. Thermal pad — Connect the thermal pad to a large-area GND plane for improved thermal performance.

ADVANCE□INFORMATION TPS7B81-Q1 www.ti.com SBVS370 –MAY 2019 Product Folder Links: TPS7B81-Q1 Submit Documentation FeedbackCopyright © 2019, Texas Instruments Incorporated (1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. (2) All voltage values are with respect to GND. (3) Absolute maximum voltage, can withstand 45 V for 200 ms.

6 Specifications

6.1 Absolute Maximum Ratings

over operating ambient temperature range (unless otherwise noted)(1)(2) MIN MAX UNIT VIN Unregulated input(3) –0.3 45 V VEN Enable input(3) –0.3 VIN V VOUT Regulated output –0.3 7 V TJ Junction temperature range –40 150 °C Tstg Storage temperature range –40 150 °C (1) AEC Q100-002 indicates that HBM stressing shall be in accordance with the ANSI/ESDA/JEDEC JS-001 specification.

6.2 ESD Ratings

V(ESD) Electrostatic discharge Human-body model (HBM), per AEC Q100-002(1) ±2000 VCharged-device model (CDM), per AEC Q100-011 Corner pins ±750 Other pins ±500 (1) The output capacitance range specified in the table is the effective value. (2) Relevant ESR value at f = 10 kHz

6.3 Recommended Operating Conditions

over operating ambient temperature range (unless otherwise noted) MIN MAX UNIT VIN Unregulated input voltage 3 40 V VEN Enable input voltage 0 VIN V COUT Output capacitor requirements(1) 1 200 µF ESR Output capacitor ESR requirements(2) 0.001 5 Ω TA Ambient temperature range –40 125 °C TJ Junction temperature range –40 150 °C (1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report.

6.4 Thermal Information

THERMAL METRIC(1) TPS7B81-Q1 UNITDGN (HVSSOP) DRV (WSON) KVU (TO-252)

8 PINS 6 PINS 5 PINS

RθJA Junction-to-ambient thermal resistance 63.9 72.8 38.8 °C/W RθJC(top) Junction-to-case (top) thermal resistance 50.2 85.8 46.9 °C/W RθJB Junction-to-board thermal resistance 22.6 37.4 17.5 °C/W ψJT Junction-to-top characterization parameter 1.8 2.7 10.1 °C/W ψJB Junction-to-board characterization parameter 22.3 37.3 17.5 °C/W RθJC(bot) Junction-to-case (bottom) thermal resistance 12.1 13.8 10.7 °C/W

6.5 Electrical Characteristics

over operating ambient temperature range, TJ = –40°C to +150°C, VIN = 14 V, and 10-µF ceramic output capacitor (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT SUPPLY VOLTAGE AND CURRENT (IN) VIN Input voltage VOUT(Nom) + V(Dropout) 40 V I(SD) Shutdown current EN = 0 V 0.3 1 µA I(Q) Quiescent current VIN = 6 V to 40 V, EN ≥ 2 V, IOUT = 0 mA 1.9 3.5 µA VIN = 6 V to 40 V, EN ≥ 2 V, IOUT = 0.2 mA 2.7 4.5 V(IN, UVLO) VIN undervoltage detection Ramp VIN down until the output turns off 2.7 V Hysteresis 200 mV ENABLE INPUT (EN) VIL Logic-input low level 0.7 V VIH Logic-input high level 2 V IEN Enable current 10 nA REGULATED OUTPUT (OUT) VOUT Regulated output VIN = VOUT + V(Dropout) to 40 V, IOUT = 1 mA to 150 mA –1.5% 1.5% V(Line-Reg) Line regulation VIN = 6 V to 40 V, IOUT = 10 mA 10 mV V(Load-Reg) Load regulation VIN = 14 V, IOUT = 1 mA to 150 mA 10 mV V(Dropout) Dropout voltage IOUT = 150 mA, fixed 5-V output, DGN package 300 525 mV IOUT = 150 mA, fixed 5-V output, DRV and KVU packages 300 585 IOUT = 150 mA, fixed 3.3-V output, DGN package 650 IOUT = 150 mA, fixed 3.3-V output, DRV and KVU packages 330 675 IOUT Output current VOUT in regulation 0 150 mA I(CL) Output current limit VOUT short to 90% × VOUT 180 510 690 mA PSRR Power-supply ripple rejection V(Ripple) = 0.5 Vpp, IOUT = 10 mA, frequency = 100 Hz, COUT = 2.2 µF 60 dB OPERATING TEMPERATURE RANGE T(SD) Junction shutdown temperature 175 ºC T(HYST) Hysteresis of thermal shutdown 20 ºC

5 V option

3.3 V option

6.6 Typical Characteristics

Figure 1. Shutdown Current vs Ambient Temperature Figure 2. Quiescent Current vs Ambient Temperature Figure 3. Quiescent Current vs Ambient Temperature Figure 4. Dropout Voltage vs Output Current Figure 5. Dropout Voltage vs Output Current Figure 6. Dropout Voltage vs Ambient Temperature

5 V option; VIN = 7 V

Figure 13. Output Voltage vs Input Voltage Figure 14. Output Current Limit vs Ambient Temperature Figure 15. PSRR vs Frequency Figure 16. PSRR vs Frequency Figure 17. Noise vs Frequency Figure 18. Output Capacitance vs ESR Stability

ADVANCE□INFORMATION Regulator Control Undervoltage Lockout Band Gap Overcurrent Protection Thermal Shutdown Vref IN EN GND OUT TPS7B81-Q1 SBVS370 –MAY 2019 www.ti.com Product Folder Links: TPS7B81-Q1 Submit Documentation Feedback Copyright © 2019, Texas Instruments Incorporated

7 Detailed Description

7.1 Overview

The TPS7B81-Q1 is a 40-V, 150-mA, low-dropout (LDO) linear regulator with ultralow quiescent current. This voltage regulator consumes only 3 µA of quiescent current at light load, and is quite suitable for the automotive always-on application.

7.2 Functional Block Diagram

7.3 Feature Description

7.3.1 Device Enable (EN)

The EN pin is a high-voltage-tolerant pin. A high input activates the device and turns the regulation on. Connect this pin to an external microcontroller or a digital circuit to enable and disable the device, or connect to the IN pin for self-bias applications.

7.3.2 Undervoltage Shutdown

This device has an integrated undervoltage lockout (UVLO) circuit to shut down the output if the input voltage (VIN) falls below an internal UVLO threshold (V(UVLO)). This feature ensures that the regulator does not latch into an unknown state during low-input-voltage conditions. If the input voltage has a negative transient that drops below the UVLO threshold and recovers, the regulator shuts down and powers up with a normal power-up sequence when the input voltage is above the required level.

7.3.3 Current Limit

This device features current-limit protection to keep the device in a safe operating area when an overload or output short-to-ground condition occurs. This feature protects the device from excessive power dissipation. For example, during a short-circuit condition on the output, the fault protection limits the current through the pass element to I(LIM) to protect the device from excessive power dissipation.

7.3.4 Thermal Shutdown

This device incorporates a thermal shutdown (TSD) circuit as protection from overheating. For continuous normal operation, the junction temperature must not exceed the TSD trip point. If the junction temperature exceeds the TSD trip point, the output turns off. When the junction temperature falls below the TSD trip point minus the thermal shutdown hysteresis, the output turns on again.

7.4 Device Functional Modes

7.4.1 Operation With VIN Lower Than 3 V

7.4.2 Operation With VIN Larger Than 3 V

is equal to the set value. Otherwise, VOUT is equal to VIN minus the dropout voltage. Table 1. Device Functional Mode Comparison

8 Application and Implementation

validate and test their design implementation to confirm system functionality.

8.1 Application Information

8.2 Typical Application

(ESR) ceramic capacitor with an X5R- or X7R-type dielectric. Figure 19. TPS7B81-Q1 Typical Application Schematic

8.2.1 Design Requirements

Use the parameters listed in Table 2 for this design example. Table 2. Design Requirements Parameters

8.2.2 Detailed Design Procedure

Input voltage range
Output voltage
Output current

8.2.2.1 Input Capacitor

input ripple rejection, and PSRR. The voltage rating must be greater than the maximum input voltage.

8.2.2.2 Output Capacitor

To ensure the stability of the TPS7B81-Q1, the device requires an output capacitor with a value in the range from 1 µF to 200 µF and with an ESR range between 0.001 Ω and 5 Ω. TI recommends selecting a ceramic capacitor with low ESR to improve the load transient response.

9 Power Supply Recommendations

The device is designed to operate from an input-voltage supply range from 3 V to 40 V. The input supply must be well regulated. If the input supply is located more than a few inches from the TPS7B81-Q1, TI recommends adding a capacitor with a value greater than or equal to 10 µF with a 0.1-µF bypass capacitor in parallel at the input.

10 Layout

10.1 Layout Guidelines

Layout is an important step for LDO power supplies, especially for high-voltage and large-output-current supplies. on the copper under the thermal pad. Figure 20 shows an example layout.

10.2 Layout Example

Figure 20. TPSB82-Q1 Example Layout Diagram

11 Device and Documentation Support

11.1 Receiving Notification of Documentation Updates

To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper right corner, click on Alert me to register and receive a weekly digest of any product information that has changed. For change details, review the revision history included in any revised document.

11.2 Community Resources

The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use. TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help solve problems with fellow engineers. Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and contact information for technical support.

11.3 Trademarks

PowerPAD, E2E are trademarks of Texas Instruments. All other trademarks are the property of their respective owners.

11.4 Electrostatic Discharge Caution

This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.

11.5 Glossary

SLYZ022 — TI Glossary. This glossary lists and explains terms, acronyms, and definitions.

12 Mechanical, Packaging, and Orderable Information

The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation.

www.ti.com 11-May-2019 Addendum-Page 1 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead/Ball Finish (6) MSL Peak Temp (3) Op Temp (°C) Device Marking (4/5) Samples PS7B8133QDRVRQ1 ACTIVE WSON DRV 6 3000 TBD Call TI Call TI -40 to 150 PS7B8150QDRVRQ1 ACTIVE WSON DRV 6 3000 TBD Call TI Call TI -40 to 150 TPS7B8133QDRVRQ1 PREVIEW WSON DRV 6 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 150 1X2H TPS7B8150QDRVRQ1 PREVIEW WSON DRV 6 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 150 1WNH (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and

www.ti.com 11-May-2019 Addendum-Page 2 continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

Images above are just a representation of the package family, actual package may vary. Refer to the product data sheet for package details. DRV 6 WSON - 0.8 mm max height PLASTIC SMALL OUTLINE - NO LEAD 4206925/F

www.ti.com PACKAGE OUTLINE C 6X 0.35 0.25 1.6 0.1 6X 0.3 0.2 1.3 1 0.1 4X 0.65 0.8 0.7 0.05 0.00 B 2.1 1.9 A 2.1 1.9 (0.2) TYP WSON - 0.8 mm max heightDRV0006A PLASTIC SMALL OUTLINE - NO LEAD 4222173/B 04/2018 PIN 1 INDEX AREA SEATING PLANE 0.08 C 3 4 (OPTIONAL) PIN 1 ID

0.1 C A B

0.05 C THERMAL PAD EXPOSED NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. The package thermal pad must be soldered to the printed circuit board for thermal and mechanical performance. SCALE 5.500

www.ti.com EXAMPLE BOARD LAYOUT

0.07 MIN

0.07 MAX

(1) 4X (0.65) (1.95) 6X (0.3) 6X (0.45) (1.6) (R0.05) TYP ( 0.2) VIA TYP (1.1) WSON - 0.8 mm max heightDRV0006A PLASTIC SMALL OUTLINE - NO LEAD 4222173/B 04/2018 SYMM 3 4 SYMM LAND PATTERN EXAMPLE SCALE:25X NOTES: (continued) 4. This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments literature number SLUA271 (www.ti.com/lit/slua271). 5. Vias are optional depending on application, refer to device data sheet. If some or all are implemented, recommended via locations are shown. SOLDER MASK OPENING SOLDER MASK METAL UNDER SOLDER MASK DEFINED METALSOLDER MASK OPENING SOLDER MASK DETAILS NON SOLDER MASK DEFINED (PREFERRED)

www.ti.com EXAMPLE STENCIL DESIGN 6X (0.3) 6X (0.45) 4X (0.65) (0.7) (1) (1.95) (R0.05) TYP (0.45) WSON - 0.8 mm max heightDRV0006A PLASTIC SMALL OUTLINE - NO LEAD 4222173/B 04/2018 NOTES: (continued) 6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. SOLDER PASTE EXAMPLE BASED ON 0.125 mm THICK STENCIL EXPOSED PAD #7 88% PRINTED SOLDER COVERAGE BY AREA UNDER PACKAGE SCALE:30X SYMM 3 4 SYMM METAL

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Product Information

PS7B8133QDRVRQ1 specifications and overview.

Summary

150-mA, Off-Battery, Ultralow-IQ (3-關A), Low-Dropout Regulator

Description

150-mA, Off-Battery, Ultralow-IQ (3-關A), Low-Dropout Regulator

Source title PS7B8133QDRVRQ1 Datasheet(PDF) - Texas Instruments

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