PS402-01XX

PS402-01XX MICROCHIP | Alldatasheet

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Technical content

Features

• Single chip solution for rechargeable battery management  Embedded Microchip patented Accuron™ technology provides precise capacity reporting (within 1%) for all rechargeable battery chemistries  User configurable and "learned" parameters stored in on-chip 128 x 8 EEPROM; fully field re-programmable via SMBus interface  Integrating sigma-delta A/D converter accurately measures: - Current through sense resistor (15-bits) - High voltage (18V) battery cells directly connected to pack voltage input (11-bits) - Temperature measurement from on-chip sensor or optional external thermistor (11-bits)  Integrated precision silicon time base  Eight individually programmable input/output pins that can be assigned as - Charge control I/O - Safety function I/O - SOC LED output drive pins - General purpose I/O  Full SMBus v1.1 2-wire host interface  Microchip firmware in 12 Kbytes of customizable on-chip OTP EPROM Pin Description Pin Summary Pin Name Type Description VDDD, VSSD Supply Digital supply voltage input, ground GPIO(0..7) I/O Programmable digital I/O SMB-CLK, SMB-DTA I/O SMBus Interface VC(1) I Pack voltage input VDDA, VSSA Supply Voltage regulator output (internally connected to analog supply input); ground RSHP, RSHN I Current sense resistor input VNTC I External thermistor input VREFT O Thermistor reference voltage ROSC I Internal oscillator bias resistor RSV1-7 I Reserved pins VPP I OTP programming voltage VDDD GPIO(4) GPIO(5) GPIO(6) GPIO(7) SMB-CLK SMB-DTA RSV5 RSV6 RSV7 VC(1) VDDA VSSA RSHP VSSD GPIO(3 GPIO(2) GPIO(1) GPIO(0) RSV1 VPP RSV2 RSV3 RSV4 ROSC VREFT VNTC RSHN PS402 28-pin SSOP Package (0.209 mil) Single Chip Battery Manager - Nickel Chemistries

DS21766A-page 2  2003 Microchip Technology Inc.

1.0 PRODUCT OVERVIEW

The PS402 is a fully integrated IC for battery manage- ment that combines a proprietary microcontroller core together with monitoring/control algorithms and 3D cell models stored in 12 Kbytes of on-chip OTP EPROM. Additional features include: precision 15-bit A/D and mixed signal circuitry. On-chip EEPROM is provided for storage of user-customizable and "learned" battery parameters. An industry standard 2-wire SMBus v1.1 interface supports host communication using standard SBData v1.1 commands and status. The PS402 can be configured to accommodate all Nickel rechargeable battery chemistries including Nickel Metal Hydride and Nickel Cadmium. Future versions will be added to support Pb-Acid. Additional integrated features include an optional, high accuracy on-chip oscillator and temperature sensor. Eight general purpose pins support charge or safety control, SOC LED display or user-programmable digital I/O. Microchip’s PS402 achieves the highest Smart Battery Data accuracy in a single IC, providing space and total system component cost savings for a wide variety of portable systems. FIGURE 1-1: PS402 IN TERNAL BLOCK DIAGRAM 128 byte EEPROM 128 byte EEPROM

12 Kbyte

e Voltage Reference and Temperature Sensor SMBus Interface SMBus Interface Microcontroller Core Microcontroller Core 15-Bit Sigma-Delta Integrating A/D Converter 15-Bit Sigma-Delta Integrating A/D Converter Analog Input Mux Analog Input Mux Programmabl e Digital Programmable Digital Input/Output Silicon OscillatorSilicon Oscillator ROSC SMB-CLK RSHN VNTC VDDA VREFT VDDD VPP SMB-DTA VSSD GPIO(7-0) Digital Section Analog Section VSSA RSHP VC(1)

 2003 Microchip Technology Inc. DS21766A-page 3 PS402-01XX

1.1 Architectural Description

Figure 1-1 is an internal block diagram highlighting the major architectural elements described below.

1.2 Microcontroller/Memory

The PS402 incorporates an advanced, low power 8-bit RISC microcontroller core. Memory resources include

12 Kbytes of OTP EPROM for program/data storage

and 128 bytes of EEPROM for parameter storage.

1.3 A/D Converter

The PS402 performs precise measurements of current, voltage and temperature using a highly accurate 15-bit integrating sigma-delta A/D converter. The A/D can be calibrated to eliminate gain and offset errors and incorporates an auto-zero offset correction feature that can be performed while in the end system application.

1.4 Microchip Firmware/Battery

Contained within the 12 Kbyte OTP is Microchip developed battery management firmware that incorporates proprietary algorithms and sophisticated 3-dimensional cell models. Developed by battery chemists, the patented, self-learning 3D cell models contain over 250 parameters and compensate for self- discharge, temperature and other factors. In addition, multiple capacity correction and error reducing functions are performed during charge/discharge cycles to enhance accuracy and improve fuel-gauge and charge control performance. As a result, accurate battery capacity reporting and run-time predictions with less than 1% error are readily achievable. The proprietary algorithms and 3D cell models are contained within the 12 Kbyte on-chip one-time- programmable (OTP) EPROM. Firmware upgrades and customized versions can be rapidly created without the need for silicon revisions. The PS402 can be easily customized for a particular application’s battery cell chemistry. Standard configuration files are provided by Microchip for a wide variety of popular rechargeable cells and battery pack configurations.

1.5 SMBus Interface/SBData

Communication with the host is fully compliant with the industry standard Smart Battery System (SBS) Specification. Included is an advanced SMBus communications engine that is compliant with the SMBus v1.1 Packet Error Checking (PEC) CRC-8 error correction protocols. The integrated firmware processes all the revised Smart Battery Data (SBData) v1.1 data values.

1.6 Accurate Integrated Time Base

The PS402 provides a highly accurate RC oscillator that provides accurate timing for self-discharge and capacity calculations and eliminates the need for an external crystal.

1.7 Temperature Sensing

An integrated temperature sensor is provided to minimize component count where the PS402 IC is located in close physical proximity to the battery cells being monitored. As an option, a connection is provided for an external thermistor that can be simultaneously monitored.

1.8 General Purpose I/O

Eight programmable digital input/output pins are provided by the PS402. These pins can be used as LED outputs to display State-Of-Charge (SOC), or for direct control of external charge circuitry, or to provide additional levels of safety in battery packs. Alternatively, they can be used as general purpose input/outputs.

DS21766A-page 4  2003 Microchip Technology Inc. TABLE 1-1: PIN DESCRIPTIONS Pin Name Description 1 VDDD (Input) Filter capacitor input for digital supply voltage.

2 GPIO(4) (Bidirectional) Programmable General Purpose Digital Input/Output pin (4)

3 GPIO(5) (Bidirectional) Programmable General Purpose Digital Input/Output pin (5)

4 GPIO(6) (Bidirectional) Programmable General Purpose Digital Input/Output pin (6)

5 GPIO(7) (Bidirectional) Programmable General Purpose Digital Input/Output pin (7)

6 SMB-CLK SMBus Clock pin connection. 7 SMB-DTA SMBus Data pin connection. 8 RSV5 Reserved – Must be connected to ground. 9 RSV6 Reserved – Must be connected to ground. 10 RSV7 Reserved – Must be connected to ground. 11 VC(1) (Input) Pack voltage input. 12 VDDA (Input) Analog supply voltage input. 13 VSSA Analog ground reference point. 14 RSHP (Input) Current measurement A/D input from positive side of the current sense resistor.

15 RSHN (Input) Current measurement A/D input from negative side of the current sense

resistor. 16 VNTC (Input) A/D input for use with an external temperature circuit. This is the mid point connection of a voltage divider where the upper leg is a thermistor (103ETB-type) and the lower leg is a 3.65K ohm resistor. This input should not go above 150 mV. 17 VREFT (Output) Reference voltage output for use with temperature measuring A/D circuit. This 150 mV output is the top leg of the voltage divider and connects to an external thermistor. 18 ROSC External bias resistor. 19 RSV4 Reserved – Must be connected to ground. 20 RSV3 Reserved – Must be connected to ground. 21 RSV2 Reserved – Must be connected to VDDD. 22 VPP (Input) Supply voltage input for OTP programming voltage. 23 RSV1 Reserved – Must be connected to VDDD.

24 GPIO(0) (Bidirectional) Programmable General Purpose Digital Input/Output pin (0)

25 GPIO(1) (Bidirectional) Programmable General Purpose Digital Input/Output pin (1)

26 GPIO(2) (Bidirectional) Programmable General Purpose Digital Input/Output pin (2)

27 GPIO(3) (Bidirectional) Programmable General Purpose Digital Input/Output pin (3)

28 VSSD Digital ground reference point.

 2003 Microchip Technology Inc. DS21766A-page 5 PS402-01XX

2.0 A/D OPERATION

The PS402 A/D converter measures voltage, current and temperature and integrates the current over time to measure state-of-charge. The voltage of the entire pack is monitored, and the pack is calibrated for accuracy. Using an external sense resistor, current is monitored during both charge and discharge and is integrated over time using the on-chip oscillator as the time base. Temperature is measured from the on-chip temperature sensor or an optional external thermistor. Current and temperature are also calibrated for accuracy.

2.1 Current Measurement

The A/D input channels for current measurement are the RSHP and RSHN pins. The current is measured using an integrating method, which averages over time to get the current measurement and integrates over time to get a precise measurement value. A 5 to 600 milli-Ohm sense resistor is connected to RSHP and RSHN as shown in the example schematic. The maximum input voltage at either RSHP or RSHN is +/-150 mV. The sense resistor should be properly sized to accommodate the lowest and highest expected charge and discharge currents, including suspend and/ or standby currents. Circuit traces from the sense resistor should be as short as practical without significant crossovers or feedthroughs. Failure to use a single ground reference point at the negative side of the sense resistor can significantly degrade current measurement accuracy. The OTP EPROM value NullCurr represents the zero- zone current of the battery. This is provided as a calibration guard band for reading zero current. Currents below +/- NullCurr (in mA) limit are read as zero and not included in the capacity algorithm calculations. A typical value for NullCurr is 3 mA, so currents between -3 mA and +3 mA will be reported as zero and not included in the capacity calculations. The equation for current measurement resolution and sense resistor selection is: 9.15 mV / RSENSE (milli-Ohms) = Current LSB (Minimum current measurement if > NullCurr) Current LSB x 16384 = Maximum current measurement possible In-circuit calibration of the current is done using the SMBus interface at time of manufacture to obtain absolute accuracy in addition to high resolution. The current measurement equation is: I(ma)=(I_A/D – COCurr – COD) * CFCurr /16384 where: I_A/D is the internal measurement. COCurr is the "Correction Offset for Current" which compensates for any offset error in current measurement, stored in OTP EPROM. CFCurr is the "Correction Factor for Current" which compensates for any variances in the actual sense resistance over varying currents, stored in OTP EPROM Figure 2-1 shows the relationship of the COCurr and CFCurr values. FIGURE 2-1: COCurr AND CFCurr VALUE RELATIONSHIP A/D Output Ideal A/D Response Actual A/D Response COCurr Current Input CFCurr

DS21766A-page 6  2003 Microchip Technology Inc.

2.2 Auto-Offset Compensation

Accuracy drift is prevented using an automatic auto- zero self-calibration method which ‘re-zeroes’ the current measurement circuit every 30 seconds, when enabled. This feature can correct for drift in tempera- ture during operation. The Auto-Offset Compensation circuit works internally by disconnecting the RSHP and RSHN inputs and internally shorting these inputs to measure the zero input offset. The EEPROM and calibration value COD is the true zero offset value of the particular IC. When an Auto-Offset Compensation measurement occurs (once per 30 seconds), the actual current measurement is skipped and the previous measurement for current is used for the next capacity calculation.

2.3 Voltage Measurements

The A/D input channel for pack voltage measurements is the VC(1) pin. Measurements are taken each measurement period when the A/D is active. The maximum voltage at the VC(1) input pin is 18.5V absolute, but voltages above 18V are not suggested. The pack voltage is measured with an integration method to reduce any sudden spikes or fluctuations. The A/D uses a 11-bit Resolution mode for these measurements. The pack voltage input is read once per measurement period in Run Mode. Voltage readings occur less frequently in Sample Mode, where A/D measurements are not activated every measurement period, depend- ing on the configuration of SampleLimit and NSample values. (See Section 3.0 Operational Modes for additional information.)

2.3.1 IMPEDANCE COMPENSATION

Since accurate measurement of pack voltage is critical to performance, the voltage measurements can be compensated for any impedance in the power path that might affect the voltage measurements. The first compensation point is the current sense resis- tor. This sense resistor affects the measured voltage since the ground reference point for the measurement is on the side of the current sense resistor. The OTP EPROM value PackResistance is used to compensate for additional resistance that should be removed. The equation for the compensation value (in ohms) is: PackResistance = Trace resistance * 65535 (This is a 2-byte value so the largest value is 1 ohm.) This requires modification of overall voltage SBData function to compensate for pack resistance and shunt resistance of current sense resistor. Thus, the previous voltage equation is modified to: SBData Voltage value = VC(1) + Measured Current (mA) * PackResistance / 65535) Figure 2-2 illustrates the compensations provided by the PackResistance value. The heavy traces are the portions of the circuit represented by the resistance. The voltage measurement equation is: V (mV) = (V_A/D - COVPack) x CFVPack / 2048 where: V_A/D is the internal measurement output. COVPack is the "Correction Offset for Pack Voltage" which compensates for any offset error in voltage measurement (since the offset of the A/D is less than the voltage measurement resolution of +/- 16.5 mV, the COVPack value is typically zero). FIGURE 2-2: PACK RESISTANCE VALUE COMPENSATIONS Pack Positive Pack Negative Current Sense Resistor VSSA

 2003 Microchip Technology Inc. DS21766A-page 7 PS402-01XX CFVPack is the "Correction Factor for Pack Voltage" which compensates for any variance in the actual A/D response versus an ideal A/D response over varying voltage inputs. The COVPack and CFVPack are calibration constants that are stored in EEPROM. Figure 2-3 shows the relationship of the COVPack and CFVPack values. FIGURE 2-3: COVPack AND CFVPack VALUE RELATIONSHIP In-circuit calibration of the voltage is done at the time of manufacture to obtain absolute accuracy in addition to high resolution. Accuracy of ±40 mV at zero current and ±80 mV during charge or discharge is possible.

2.4 Temperature Measurements

The A/D receives input from the internal temperature sensor to measure the temperature. Optionally, an external thermistor can be connected to the VNTC pin which is also monitored by the A/D converter. An output reference voltage for use with an external thermistor is provided on the VREFT pin. The A/D uses a 11-bit resolution mode for the temperature measurements. A standard 10 kOhms at 25°C Negative-Temperature- Coefficient (NTC) device of the 103ETB type is suggested for the optional external thermistor. One leg of the NTC should be connected to the VREFT pin and the other to both the VNTC pin and a 3.65 kOhms resistor to analog ground (VSSA). The resistor forms the lower leg of a voltage divider circuit. To maintain high accuracy in temperature measurements, a 1% resistor should be used. A lookup table is used to convert the voltage measure- ment seen at the VNTC pin to a temperature value. The external thermistor should be placed as close as possible to the battery cells and should be isolated from any other sources of heat that may affect its operation. An algorithm feature is activated to disable temperature readings for 30 seconds, following an LED switch activation (SWITCH pin is shorted to VDDD) to prevent false temperature readings due to LED heating. Calibration of the temperature measurements involves a correction factor and an offset exactly like the current and voltage measurements. The internal temperature measurement makes use of correction factor CFTempI and offset COTempI, while the VNTC and VREFT pins for the optional external thermistor make use of correction factor CFTempE and offset COTempE. A/D Output Ideal A/D Response Actual A/D Response COVPack Voltage Input CFVPack

DS21766A-page 8  2003 Microchip Technology Inc.

3.0 OPERATIONAL MODES

The PS402 operates on a continuous cycle, as illustrated in Figure 3-1. The frequency of the cycles depend on the power mode selected. There are three power modes: Run, Sample and SLEEP . Each mode has specific entry and exit conditions as listed below.

3.1 Run Mode

Whether the PS402 is in Run Mode or Sample Mode depends on the magnitude of the current. The Run and Sample Mode entry-exit threshold is calculated using the following EEPROM data values and formula: +/- X mA = SampleLimit x CFCurr / 16384 SampleLimit is a programmable EEPROM value, and CFCurr is an EEPROM value set by calibration. Entry to Run Mode occurs when the current is more than +/- X mA for two consecutive measurements. Run Mode may only be exited to Sample Mode, not to SLEEP Mode. Exit from Run Mode to Sample Mode occurs when the converted measured current is less than the +/- X mA threshold for two consecutive measurements. Run Mode is the highest power consuming mode. During Run Mode, all measurements and calculations occur once per measurement period. Current, voltage and temperature measurements are each made sequentially during every measurement period.

3.2 Sample Mode

Entry to Sample Mode occurs when the converted measured current is less than +/- SampleLimit (EE parameter) two consecutive measurements. Sample Mode may be exited to either Run Mode or SLEEP Mode. While in Sample Mode, measurements of voltage, current and temperature occur only once per NSample counts of measurement periods, where NSample is a programmable EEPROM value. Calculations of state- of-charge, SMBus requests, etc. still continue at the normal Run Mode rate, but measurements only occur once every measurement period x NSample. The minimum value for NSample is two. The purpose of Sample Mode is to reduce power consumption during periods of inactivity (low rate charge or discharge.) Since the analog-to-digital converter is not active except every NSample counts of measurement periods, the overall power consumption is significantly reduced. Configuration Example: Measurement period is 500 ms CFCurr current calibration factor is 12500 SampleLimit is set to 27 NSample is set to 16 Result: Run/Sample Mode entry-exit threshold: 27 x 12500 / 16384 = +/- 20.6 mA During Sample Mode, measurements will occur every: 16 measurement periods of 500 mS = every 8 seconds

3.3 SLEEP Mode

Entry to SLEEP Mode can only occur when the measured pack voltage at VC(1) input is below a preset limit set by the EEPROM value SleepVPack (in mV). SLEEP Mode may be exited to Run Mode, but only when one of the wake-up conditions is satisfied. If the voltage measured at the VC(1) input is below the SleepVPack threshold, but the measured current is above the Sample Mode threshold (which maintains Run Mode), then SLEEP Mode will NOT be entered. SLEEP Mode can only be entered from Sample Mode. While in SLEEP Mode, no measurements occur and no calculations are made. The fuel gauge display is not operational, no SMBus communications are recog- nized, and only a wake-up condition will permit an exit from SLEEP Mode. SLEEP Mode is one of the lowest power consuming modes and is used to conserve battery energy following a complete discharge. When in the SLEEP Mode (entry due to low voltage and Sample Mode), there are four methods for waking up. They are voltage level, current level, SMBus activity and I/O pin activity. The EEPROM value WakeUp defines which wake-up functions are enabled, and also the voltage wake-up level. Table 3-1 indicates the appropriate setting. Note that the setting is independent of the number of cells or their configuration.

 2003 Microchip Technology Inc. DS21766A-page 9 PS402-01XX TABLE 3-1: WakeUp TABLE 3-2: WakeUp VOLTAGE TABLE 3-3: POWER OPERATIONAL MODE SUMMARY Bit Name Function

6 WakeIO Wake-up from I/O activity

5 WakeBus Wake-up from SMBus activity

4 WakeCurr Wake-up from Current

3 WakeVolt Wake-up from Voltage

2:0 WakeLevel Defines Wake Voltage Level WakeUp (2:0) Voltage Purpose 000 6.4V 2 cells Li-Ion 001 6.66V 6 cells NiMH 010 8.88V 8 cells NiMH 011 9.6V 3 cells Li-Ion 100 9.99V 9 cells NiMH 101 11.1V 10 cells NiMH 110 12.8V 4 cells Li-Ion 111 13.3V 12 cells NiMH Mode Entry Exit Notes Run Measured current > preset threshold (set by SampleLimit) Measured current < preset threshold (set by SampleLimit) Highest power consumption and accuracy for rapidly changing current. Sample Measured current < preset threshold (set by SampleLimit) Measured current > preset threshold (set by SampleLimit) Saves power for low, steady current consumption. Not as many measurements needed. Low Voltage SLEEP VC(1) < SleepVPack AND in Sample Mode WakeUp condition met No measurements made when battery voltage is very low.

DS21766A-page 10  2003 Microchip Technology Inc. FIGURE 3-1: PS402-01XX OPERATIONAL CYCLE FLOW CHART Measure Voltage: VPACKSTART Measure and Integrate Current: i t Measure Temperature Sleep Condition: VPACK < V SLEEP? Is Current < SAMPLE_LIMIT Enter Low Voltage Sleep Mode Wake Condition: > V NO Enter Run Mode NO Enter Sample Mode YES YES YES Go to Digital State MachineNO VPACK WAKE ?

 2003 Microchip Technology Inc. DS21766A-page 11 PS402-01XX

4.0 CAPACITY MONITORING

The PS402 internal CPU uses the voltage, current and temperature data from the A/D converter, along with parameters and cell models from the EEPROM and OTP EPROM, to determine the state of the battery and to process the SBData function instruction set. By integrating measured current, monitoring voltages and temperature, adjusting for self-discharge and checking for end-of-charge and end-of-discharge conditions, the PS402 creates an accurate fuel gauge under all battery conditions.

4.1 Capacity Calculations

The PS402 calculates state-of-charge and fuel gauging functions using a ‘coulomb counting’ method, with additional inputs from battery voltage and temperature measurements. By continuously and accurately measuring all the current into and out of the battery cells, along with accurate three dimensional cell models, the PS402 is able to provide run-time accuracy with less than 1% error. The capacity calculations consider two separate states: charge acceptance or capacity increasing (CI) and discharge or capacity decreasing (CD). The CI state only occurs when a charge current larger than OTP EPROM NullCurr value is measured. Otherwise, while at rest and/or while being discharged, the state is CD. Conditions must persist for at least NChangeState measurement periods for a valid state change between CD and CI. A minimum value of 2 is suggested for NChangeState. Regardless of the CI or CD state, self-discharge is also calculated and subtracted from the integrated capacity values. Even when charging, there is still a self-discharge occurring in the battery. To compensate for known system errors in the capacity calculations, a separate error term is also continuously calculated. This term is the basis for the SBData value of M axError. Two error values are located in OTP EPROM. The CurrError value is the inherent error in current measurements and should be set based on the selection of a sense resistor and calibration results. The SelfDischrgErr value is the error in the parameter tables for self-discharge and depends on the accuracy of the cell chemistry model for self-discharge. Since the PS402 electronics also drain current from the battery system, another OTP EPROM value allows even this minor drain to be included in the capacity calculations. The PwrConsumption value represents the drain of the IC and associated circuitry, including additional safety monitoring electronics, if present. A typical value of 77 represents the PS402's nominal power consumption of 300 µA. The total capacity added or subtracted from the battery (change in charge) per measurement period is expressed by the following formula: ∆Charge = Σi∆t (the current integrated over time) - CurrError (Current Meas. Error) - PwrConsumption * ∆t (PS402 I DD) - % of Self-Discharge * FCC - SelfDischrgErr (Self-Disch. Error) The error terms are always subtracted, even though they are +/- errors, so that the fuel gauge value will never be overestimated. Current draw of the PS402 and the self-discharge terms are also always subtracted. The SBData value MaxError is the total accumulated error as the gas gauge is running. The battery current will be precisely measured and integrated at all times and for any current rate, in order to calculate total charge removed from or added to the battery. Based on lookup table access, the capacity is adjusted with self-discharging rates depending on actual capacity and temperature, residual capacity corrections depending on the discharging current rate and temperature, and charge acceptance depending on SOC, charging current rate and temperature.

4.2 Discharge Termination and

Discharge capacity is determined based on the End- Of-Discharge (EOD) voltage point. This voltage can be reached at different times based on the discharge rate. The voltage level at which this point occurs will also change depending on the temperature and discharge rate, since these factors affect the voltage curve and total capacity of the battery. The EOD voltage parameter table predicts the voltage point at which this EOD will be reached based on discharge rate and temperature.

DS21766A-page 12  2003 Microchip Technology Inc. FIGURE 4-1: CHARGE INCREASING FLOW CHART Charging Enabled: ChargingVoltage = CHARGINGVOLT ChargingCurrent = CHARGINGCURR Reset Fully Discharged Bit Check Alarms: V > TCA_VOLT Terminate Charge Alarm YES NO Precharge True: VCx < 2.5V OR 0oC < Temp < 5oC YES NO Remaining Capacity > EMPTYHYST YES V > EOC_VOLT Enable Pre-Charge I/O: ChargingVoltage = PRECHGVOLT ChargingCurrent = PRECHRGCURR NO Charge Control Algorithm Active YES Charge Complete Terminate Charge Alarm Fully Charged Bit YES START NO NO

 2003 Microchip Technology Inc. DS21766A-page 13 PS402-01XX FIGURE 4-2: CHARGE DECREASING FLOW CHART Set Fully Discharged Bit Terminate Discharge Alarm RemCap = Residual Capacity + Table Offset Check Alarms: RemCap < RemCapAlarm RemTime < RemTimeAlarm Set Alarm Bits in Battery Status YES NO V < VEOD?* YES FCC = Discharge Count + Residual Capacity START RemCap < FULLHYST? Reset Fully Charged Bit YES NO Change of CI/CD State during last full Charge & Discharge YES NO NO *VEOD can be constant or can vary with temperature and discharage rate

DS21766A-page 14  2003 Microchip Technology Inc. FIGURE 4-3: DIGITAL CALCULATION FLOW CHART RM = RM + New Capacity RM = RM - Self-Discharge /circle4 /circle4 /circle4CycleCountReg = CycleCountReg + Abs(New capacity) RM = FCC Set Alarm Bit in Battery Status New Capacity = RM < 0? RM = 0 YES RM > FCC? NO YES CycleCountReg > FCC? NO /circle4CycleCount = CycleCount + 1 /circle4CycleCountReg = 0 YES NO Safety Conditions?: VCELLMAX , VCELLDIFF IMAXC , IMAXD T MAX , T MIN YES Trigger Safety GPIO NO Check Alarms: HighTempAlarm YES Is New Capacity > 0? NO YES NO Charge Increasing Charge Decreasing START itΣ∆

 2003 Microchip Technology Inc. DS21766A-page 15 PS402-01XX The PS402 will monitor temperature and discharge rate continuously and update the EOD voltage in real-time. When the voltage measured on the cell is below EOD voltage for duration of EODRecheck x periods, a valid EOD has occurred. When a valid EOD has been reached, the TERMINATE_DISCHARGE_ALARM bit (bit 11) in BatteryStatus will be set. This will cause an AlarmWarning condition with this bit set. Additionally, the REMAINING_TIME_ALARM and/or REMAINING_CAPACITY_ALARM bits can be set first to give a user defined early warning prior to the TERMINATE_DISCHARGE_ALARM. To maintain accurate capacity prediction ability, the FullCapacity value is relearned on each discharge, which has reached a valid EOD after a previous valid fully charged EOC. If a partial charge occurs before reaching a valid EOD, then no relearn will occur. If the discharge rate at EOD is greater than the ‘C-rate' adjusted value in RelearnCurrLim, then no relearn will occur. When a valid EOD has been reached, then the error calculations represented by the SBData value of MaxError will be cleared to zero. If appropriate, the relearned value of FullCapacity (and FullChargeCapacity) will also be updated at this time.

4.3 EOD Voltage LookUp Table

4.3.1 SAVE TO DISK POINT

As the graph in Figure 4-4 shows, available capacity in the battery varies with temperature and discharge rate. Since the remaining capacity will vary, the save to disk point of a PC will also vary with temperature and discharge rate. Knowing the discharge rate that occurs in the system during the save to disk process, and knowing the temperature can pinpoint the exact save to disk point that will always leave the perfect save to disk capacity. The PS402 uses this information to tailor the gas gauge to the system and the remaining capacity and RSOC fuel gauge function will always go to zero at the efficient save to disk point. Table 4-1 will use the voltage points at which this happens as the error correction and FULL CAPACITY relearn point. This will ensure a relearn point before save to disk occurs, and will correct any error in remaining capacity, also to ensure proper save to disk. The shutdown point has to equal the capacity required to save to disk UNDER THE CONDITIONS OF SAVE TO DISK. That is, looking at the curve that represents the actual discharge C-rate that occurs during the system save to disk function, we must stop discharge and initiate save to disk when the system has used capacity equal to that point on the save to disk C-rate curve. This is because, no matter what the C-rate is when the STD point is reached, the system will automatically switch to the C-rate curve that represents the actual current draw of the save to disk function. So it doesn't matter if the system is in high discharge, or low discharge, it will be in "save-to-disk" discharge conditions when save to disk begins, and there must be enough capacity left. The graph in Figure 4-4 shows that the system will always shutdown at the same capacity point regardless of C-rate conditions (since the C-rate of the save to disk procedure is a constant). Thus, we can automatically have an RSOC that is compensated for C-rate; it will go to zero when the capacity used is equal to the point at which STD occurs. FIGURE 4-4: SAVE TO DISK POINT Voltage Must stop at this point on all curves Point at which STD capacity is reached C-rate of STD function Capacity

DS21766A-page 16  2003 Microchip Technology Inc. Ignoring the effects of temperature, we could mark the capacity used up to the shutdown point of the STD curve. All of the shutdown voltage points would then represent the same capacity, and RSOC would always become zero at this capacity, and FCC would always equal this capacity plus the residual capacity of the save to disk curve. To compensate for temperature, we can look at the series of curves that represent the STD C-rate at different temperatures. The PS402 implementation is to measure the temperature and choose a scaled RSOC value that will go to zero at the save to disk point at this temperature, assuming the temperature does not change. If it does change, then an adjustment to RSOC will be needed to make it go to zero at STD point. Taking temperature into consideration, the amount of capacity that can be used before save to disk is a constant as C-rate changes, but not constant as temperature changes. Thus, in the LUT, Table 4-1, the individual temperature columns will have voltage points that all represent the same capacity used, but the rows across temperature points (C-rate rows) will represent different capacity used. To compensate RSOC and RM, interpolation will be used and the compensation adjustment can happen in real-time to avoid sudden drops or jumps. Every time the temperature decreases by one degree, a new inter- polated value will be subtracted from RSOC and RM. Every time the temperature increases by one degree, RSOC and RM will be held constant until discharged capacity equals the interpolated value that should have been added to RSOC and RM (to avoid capacity increases during discharge). With this interpolation happening in real-time, there will be no big jumps or extended flat periods as we cross over boundaries in the LUT. The Table 4-1 is an example of the various voltage values that will signal the save to disk points as a function of temperature and discharge rate. Also shown is the amount of capacity used before "save to disk" that will be utilized to compensate RSOC. Table 4-2 shows the actual names of the values in the OTP EPROM, Table 4-3 shows the value definitions: TABLE 4-1: V_EOD LOOKUP TABLE TABLE 4-2: VALUE NAMES IN THE OTP < 0.2C V1 V2 V3 – < 0.5C < 0.8C < 1.1C < 1.4C < 1.7C < 2.0C < 2.0C – V62 V63 V64 Capacity 20% 10% 5% 3% 0% 0% 0% 0% TEOD(1) TEOD(2) TEOD(3) TEOD(4) TEOD(5) TEOD(6) TEOD(7) TEOD(8) CEOD(1) Veod1(1) Veod1(2) Veod1(3) Veod 1(4) Veod1(5) Veod1(6) Veod1(7) Veod1(8) CEOD(2) Veod2(1) Veod2(2) Veod2(3) Veod 2(4) Veod2(5) Veod2(6) Veod2(7) Veod2(8) CEOD(3) Veod3(1) Veod3(2) Veod3(3) Veod 3(4) Veod3(5) Veod3(6) Veod3(7) Veod3(8) CEOD(4) Veod4(1) Veod4(2) Veod4(3) Veod 4(4) Veod4(5) Veod4(6) Veod4(7) Veod4(8) CEOD(5) Veod5(1) Veod5(2) Veod5(3) Veod 5(4) Veod5(5) Veod5(6) Veod5(7) Veod5(8) CEOD(6) Veod6(1) Veod6(2) Veod6(3) Veod 6(4) Veod6(5) Veod6(6) Veod6(7) Veod6(8) CEOD(7) Veod7(1) Veod7(2) Veod7(3) Veod 7(4) Veod7(5) Veod7(6) Veod7(7) Veod7(8) CEOD(8) Veod8(1) Veod8(2) Veod8(3) Veod 8(4) Veod8(5) Veod8(6) Veod8(7) Veod8(8) FCCP(1) FCCP(2) FCCP(3) FCCP(4) FCCP(5) FCCP(6) FCCP(7) FCCP(8)

 2003 Microchip Technology Inc. DS21766A-page 17 PS402-01XX TABLE 4-3: VALUE DEFINITI ONS IN THE OTP EPROM TEOD 8 coded bytes typ: 5,20,35,50,80,113,150,150 Range: 1-255 per byte EOD Temperature boundaries, 8 increasing values of temperature coded as TEODx = (Tcelsius*10+200)/4 CEOD 8 coded bytes typ: 19,32,48,64,77,90,109,109 Range: 1-255 EOC C-rate boundaries, 8 increasing values of C-rates coded: CEODx = C-rate * (256/28/RF), where RF is the Rate Factor (RFactor) OTP EPROM parameter. For RF = 7, CEODx = C-rate * 64. Thus, a value of 32 is one-half C, etc. FCCP coded % typ: 50,25,12,8,0,0,0 Range: 1-255 Unusable residual capacity before save to disk, corresponding to temperature. 255 = 100% VEOD coded typ: 75 Range: 1-255 End of discharge voltage, voltage = 8000 + 4 * VEOD. Pack voltage at which save to disk is signaled.

DS21766A-page 18  2003 Microchip Technology Inc.

5.0 CHARGE CONTROL

The PS402 can control charging using SMBus broad- casts of required charging current and charging voltage to the charger. The PS402 monitors pack voltage and temperature to determine the battery full end-of-charge (EOC) condition. There are three possible fully charged EOC conditions that are monitored according to control parameters. These methods are designed to detect a fully charged battery over a range of operating temperatures and charge rates.

5.1 Temperature EOC

The rate of rise of the battery temperature is the first and primary full charge detection mechanism. This is a well known method used for Nickel-based chemistries and is commonly referenced as the "dT/dt" method (delta-Temperature over delta-time.) The rate of temperature rise over a finite period of time is continually monitored. A rapid increase at an inflection point is detected as end-of-charge point. This inflection point is usually seen just before a fully charged state so the resulting state-of- charge (SOC) reset may be slightly less than 100%. Typically, a dT/dt rate of 1 °C per minute can accurately detect the 95% full point when used with charging rates near the 1C or 1 hour rate. Although this method is active during any charge rate, it typically only occurs for charge rates of 0.8C or higher. All of the control parameters regarding a temperature (dT/dt) EOC are available for customizing. TABLE 5-1: DT/DT CONTROL PARAMETERS

5.2 Voltage Drop EOC

The second full charge detection mechanism looks for a negative voltage drop after reaching a peak. This is also an established method for Nickel-based chemis- tries and is termed the "-dV" method (negative delta-V.) Just at the point of full charge, the voltage profile of the battery cells will start to drop from a peak value. This drop, if measured while the current remains stable, indicates a 100% full charge condition. Generally, a -10 mV per cell drop occurs. Charge rates above 0.5C are typically required to cause this method to be observed. This voltage drop method looks for a total pack voltage drop. If the charge current is stable and the voltage drops the programmed amount, a full charge EOC is signaled. All of the control parameters regarding a voltage drop (-dV) EOC are available for customizing. TABLE 5-2: -DV CONTROL PARAMETERS Parameter Description DtEOCSOC (EE) SOC reset value when a dT/dt EOC condition occurs NDtVSample (EE) Delay between temperature samples NDelayEOC (EE) Time that EOC detection is delayed after start of charge EOCDeltaT (EE) Minimum temperature change between two samples to cause EOC Parameter Description DvCRate (EE) Minimum C-rate required to enable -dV EOC StableCurr (OTP) Charge current stability factor to enable -dV EOC NDtVSample (EE) Delay between voltage samples NDelayEOC (EE) Time that EOC detection is delayed after start of charge EOCDeltaV (EE) Minimum voltage drop between two samples to cause EOC

 2003 Microchip Technology Inc. DS21766A-page 19 PS402-01XX

5.3 Fixed Overcharge EOC

When charging at low rates, neither of the previously mentioned full charge EOC conditions may occur. Since there are no signals from the battery tempera- ture, voltage, or current to aid in determining a full charge a simple ‘count’ mechanism is used. By simply integrating the total charge that has entered the battery cells, a fixed amount of overcharge can signal a full charge EOC condition. For Nickel-based chemistries this varies between 20 and 50% of their rated capacity. Typically, at charge rates less than 0.4C neither the dT/dt or -dV EOC methods will occur. An accumulated charge of 120 to 150% of the last full charge capacity is a good indicator of full charge. This fixed amount of overcharge method is reliable for low rate charging or long term charging since it effectively serves as a charge timer as well. All of the control parameters regarding a fixed overcharge EOC are available for customizing. TABLE 5-3: FIXED OVERCHARGE CONTROL PARAMETERS

5.4 Temperature Algorithms

The PS402 SMBus Smart Battery IC provides multiple temperature alarm set points and charging conditions. The following EEPROM and OTP EPROM parameters control how the temperature alarms and charging conditions operate. HighTempAl: When the measured temperature is greater than HighTempAl, the OVER_TEMP_ALARM is set. If the battery is charging, then the TERMINATE_CHARGE_ALARM is also set. ChrgMinTemp, DischrgMaxTemp and ChrgMax- Temp: If the measured temperature is less than ChrgMinTemp, charging is disabled. When the system is charging and the measured temperature is greater than ChrgMaxTemp, charging will be disabled. Similarly, when the system is discharging and the temperature is greater than DischrgMaxTemp discharging will be disabled. If the ChrgMaxTemp threshold (typically 60 °C) is exceeded, then charging will not be enabled until the pack temperature has dropped below 50°C. Parameter Description EOCRateMax (EE) Maximum C-rate required to enable overcharge EOC StableCurr (OTP) Charge current stability factor to enable -dV EOC NDelayEOC (EE) Time that EOC detection is delayed after start of charge SOCThreshold (OTP) SOC to cause a valid overcharge EOC

DS21766A-page 20  2003 Microchip Technology Inc.

6.0 GPIO CONFIGURATION

6.1 Safety Condition Programming

There are 5 different functions that can be AND'ed and OR'd together for secondary safety. In GPIO1 - GPIO7, the lower 8-bits are the AND bits and the upper 8-bits are the OR bits. The bits correspond to the secondary safety function as listed in Table 6-1. The logic selected operates as follows: AND byte Desired trigger conditions are selected with a "1" in the control bit. All selected conditions must be true for a true "AND" condition. If no conditions are desired, 0FFh must be written to the byte. OR byte Desired trigger conditions are selected with a "1" in the control bit. Any selected condition which is true will cause a true "OR" condition. If no conditions are desired, 00h must be written to the byte. GPIOx pin activation results when all "AND" condition OR any "OR" condition is true. Example: If _AND byte is set to 18h, and _OR byte is set to 02h, then the OUTPUTx pin is active only if: [ (Vpack > SafetyMaxVPack) AND (Temperature > SafetyMaxTemp)] OR [Icharge > SafetyIMaxC]

6.2 Charge Control Programming

The PS402-01XX supports programming of charge control functions on the GPIO pins. There are 8 different functions that can be AND'ed and OR'd together for secondary safety. In GPIO1-GPIO7, the lower 8-bits are the AND bits and the upper 8-bits are the OR bits. The bits correspond to the secondary safety function as listed in Table 6-2: TABLE 6-1: GPIO SAFETY CONDITIONS TABLE 6-2: GPIO CHARGE CONTROL CONDITIONS OR Byte Bit AND Byte Bit Safety Condition Description 12 4 Vpack > SafetyMaxVPack Pack voltage rises above SafetyMaxVPack 11 3 Temperature > SafetyMaxTemp Temperature rises above SafetyMaxTemp 10 2 Temperature < SafetyMinTemp Temperature falls below SafetyMinTemp 9 1 Charge Current > SafetyIMaxC Charge current rises above SafetyIMaxC 8 0 Discharge Current > SafetyIMaxD Charge current rises above SafetyIMaxD OR Byte Bit AND Byte Bit Charge Control Condition Description 14 6 TerminateChargeAlarm active TerminateChargeAlarm 13 5 Fully Charged bit set Fully Charged bit set in BatteryStatus 12 4 SOC > MaxSOC Overcharge - SOC rises above MaxSOC 11 3 Temperature > SafetyMaxTemp Temperature rises above SafetyMaxTemp 10 2 Temperature < PrechargeTemp PrechargeCurr is required 9 1 INPUT pin activated GPIO pin is triggered 8 0 VPack < PrechargeVPack PrechargeCurr is required

 2003 Microchip Technology Inc. DS21766A-page 21 PS402-01XX

7.0 SMBus/SBData INTERFACE

The PS402 uses a two-pin System Management Bus (SMBus) protocol to communicate to the Host. One pin is the clock and one is the data. The SMBus port responds to all commands in the Smart Battery Data Specification (SBData). To receive information about the battery, the Host sends the appropriate commands to the SMBus port. Certain alarms, warnings and charging information may be sent to the Host by the PS402 automatically. The SMBus protocol is explained in this chapter. The SBData command set is summarized in Table 7-1. The PS402 SMBus communications port is fully compliant with the System Management Bus Specifica- tion, Version 1.1 and supports all previous and new requirements, including bus time-outs (both slave and master), multi-master arbitration, collision detection/ recovery and PEC (CRC-8) error checking. The SMBus port serves as a Slave for both read and write func- tions, as well as a Master for write word functions. SMBus slave protocols supported include Read Word, Write Word, Read Block and Write Block, all with or without PEC (CRC-8) error correction. Master mode supports Write Word protocols. The PS402 meets and exceeds the Smart Battery Data Specification, Version 1.1/1.1a requirements. The PS402 is compliant with System Management Bus Specification 1.0. The PS402 fully implements the Smart Battery Data (SBData) Specification v1.1. The SBData Specification defines the interface and data reporting mechanism for an SBS compliant Smart Battery. It defines a consistent set of battery data to be used by a power management system to improve battery life and system run-time, while providing the user with accurate information. This is accomplished by incorporating fixed, measured, calculated and predicted values, along with charging and alarm messages, with a simple communications mechanism between a Host system, Smart Batteries and a Smart Charger. The PS402 provides full implementation of the SBData set with complete execution of all the data functions, including sub-functions and control bits and flags, compliance to the accuracy and granularity associated with particular data values, and proper SMBus protocols and timing.

7.1 SBData Function Description

The following subsections document the detailed operation of all of the individual SBData commands.

7.1.1 ManufacturerAccess (0x00)

Reports internal software version when read, opens EEPROM for programming when written with the password.

7.1.2 RemainingCapacityAlarm (0x01)

Sets or reads the low capacity alarm value. Whenever the remaining capacity falls below the low capacity alarm value, the Smart Battery sends alarm warning messages to the SMBus Host with the REMAINING_CAPACITY_ALARM bit set. A low capacity alarm value of ‘0’ disables this alarm.

7.1.3 RemainingTimeAlarm (0x02)

Sets or reads the remaining time alarm value. Whenever the AverageTimeToEmpty falls below the remaining time value, the Smart Battery sends alarm warning messages to the SMBus Host with the REMAINING_TIME_ALARM bit set. A remaining time value of ‘0’ disables this alarm.

7.1.4 BatteryMode (0x03)

This function selects the various Battery Operational modes and reports the battery's capabilities, modes and condition. Bit 0: INTERNAL_CHARGE_CONTROLLER Bit set indicates that the battery pack contains its own internal charge controller. When the bit is set, this optional function is supported and the CHARGE_ CONTROLLER_ENABLED bit will be activated. Bit 1: PRIMARY_BATTERY_SUPPORT Bit set indicates that the battery pack has the ability to act as either the primary or secondary battery in a system. When the bit is set, this optional function is supported and the PRIMARY_BATTERY bit will be activated. Bit 2-6: Reserved Bit 7: CONDITION_FLAG Bit set indicates that the battery is requesting a conditioning cycle. This typically will consist of a full charge to full discharge back to full charge of the pack. The battery will clear this flag after it detects that a conditioning cycle has been completed. Bit 8: CHARGE_CONTROLLER_ENABLED Bit is set to enable the battery pack's internal charge controller. When this bit is cleared, the internal charge controller is disabled (default). This bit is active only when the INTERNAL_CHARGE_CONTROLLER bit is set. Bit 9: PRIMARY_BATTERY Bit is set to enable a battery to operate as the primary battery in a system. When this bit is cleared, the battery operates in a secondary role (default). This bit is active only when the PRIMARY_BATTERY_SUPPORT bit is set.

DS21766A-page 22  2003 Microchip Technology Inc. TABLE 7-1: SMART BATTERY DATA FUNCTIONS SBData Function Name Command Code Access Parameter Reference Units ManufacturerAccess-Write 0x00 R/W PW1, PW2 Code ManufacturerAccess-Read 0x00 R/W Chip version Code RemainingCapacityAlarm 0x01 R/W RemCapAl mAh or 10 mWh RemainingTimeAlarm 0x02 R/W RemTimeAl Minutes BatteryMode 0x03 R/W Bit code AtRate 0x04 Read mAh or 10 mWh AtRateTimeToFull 0x05 Read Minutes AtRateTimeToEmpty 0x06 Read Minutes AtRateOK 0x07 Read Binary 0/1 (LSB) Temperature 0x08 Read 0.1°K Voltage 0x09 Read mV Current 0x0a Read mA AverageCurrent 0x0b Read mA MaxError 0x0c Read % RelativeStateOfCharge 0x0d Read % AbsoluteStateOfCharge 0x0e Read % RemainingCapacity 0x0f Read mAh or 10 mWh FullChargeCapacity 0x10 Read mAh or 10 mWh RunTimeToEmpty 0x11 Read Minutes AverageTimeToEmpty 0x12 Read Minutes AverageTimeToFull 0x13 Read Minutes ChargingCurrent 0x14 Read ChrgCurr or ChrgCurrOff mA ChargingVoltage 0x15 Read ChrgVolt or ChrgVoltOff mV BatteryStatus 0x16 Read BatStatus Bit code CycleCount 0x17 Read Cycles Integer DesignCapacity 0x18 Read DesignCapacity mAh or 10 mWh DesignVoltage 0x19 Read DesignVPack mV SpecificationInfo 0x1a Read SBDataVersion Coded ManufactureDate 0x1b Read Date Coded SerialNumber 0x1c Read SerialNumber Not specified FirmwareInfo (Note 1) 0x1d Read FW Version & PW1, PW2 Coded ManufacturerName 0x20 Read MFGName ASCII Text string DeviceName 0x21 Read DeviceName ASCII Text string DeviceChemistry 0x22 Read Chemistry ASCII Text string ManufacturerData 0x23 Read MFGData HEX string OptionalMfgFunction4 0x3c Read OptionalMfgFunction3 0x3d Read OptionalMfgFunction2 0x3e Read OptionalMfgFunction1 0x3f Read OptionalMfgFunction5 0x2f Read GPIO pin status Bit-coded data Note 1: Reports internal software version when read, opens EEPROM (and selected other values) for programming when written.

 2003 Microchip Technology Inc. DS21766A-page 23 PS402-01XX Bit 10-13: Reserved Bit 14: CHARGER_MODE Enables or disables the Smart Battery's transmission of ChargingCurrent and ChargingVoltage messages to the Smart Battery Charger. When set, the Smart Battery will NOT transmit ChargingCurrent and ChargingVoltage values to the charger. When cleared, the Smart Battery will transmit the ChargingCurrent and ChargingVoltage values to the charger when charging is desired. Bit 15: CAPACITY_MODE Indicates if capacity information will be reported in mA/mAh or 10 mW/10 mWh. When set, the capacity information will be reported in 10 mW/10 mWh. When cleared, the capacity information will be reported in mA/mAh.

7.1.5 AtRate (0x04)

AtRate is a value of current or power that is used by three other functions: AtRateTimeToFull, AtRateTime- ToEmpty and AtRateOK.  AtRateTimeToFull returns the predicted time to full charge at the AtRate value of charge current.  AtRateTimeToEmpty function returns the predicted operating time at the AtRate value of discharge current. A t R a t e O K function returns a Boolean value that predicts the battery's ability to supply the AtRate value of additional discharge current for 10 seconds.

7.1.6 AtRateTimeToFull (0x05)

Returns the predicted remaining time to fully charge the battery at the AtRate value (mA). The AtRateTimeTo Full function is part of a two-function call set used to determine the predicted remaining charge time at the AtRate value in mA. It will be used immediately after the SMBus Host sets the AtRate value.

7.1.7 AtRateTimeToEmpty (0x06)

Returns the predicted remaining operating time if the battery is discharged at the AtRate value. The AtRateTimeToEmpty function is part of a two-function call set used to determine the remaining operating time at the AtRate value. It will be used immediately after the SMBus Host sets the AtRate value.

7.1.8 AtRateOK (0x07)

Returns a Boolean value that indicates whether or not the battery can deliver the AtRate value of additional energy for 10 seconds (Boolean). If the AtRate value is zero or positive, the AtRateOK function will ALWAYS return true. The AtRateOK f u n c t i o n i s p a r t o f a two-function call set used by power management systems to determine if the battery can safely supply enough energy for an additional load. It will be used immediately after the SMBus Host sets the AtRate value.

7.1.9 Temperature (0x08)

Returns the cell pack's internal temperature in units of 0.1 °K.

7.1.10 Voltage (0x09)

Returns the pack voltage (mV).

7.1.11 Current (0x0a)

Returns the current being supplied (or accepted) through the battery's terminals (mA).

7.1.12 AverageCurrent (0x0b)

Returns a one-minute rolling average based on at least 60 samples of the current being supplied (or accepted) through the battery's terminals (mA).

7.1.13 MaxError (0x0c)

Returns the expected margin of error (%) in the state- of-charge calculation. For example, when MaxError returns 10% and RelativeStateOfCharge returns 50%, the RelativeStateOfCharge is actually between 50% and 60%. The MaxError of a battery is expected to increase until the Smart Battery identifies a condition that will give it higher confidence in its own accuracy. For example, when a Smart Battery senses that it has been fully charged from a fully discharged state, it may use that information to reset or partially reset MaxError The Smart Battery can signal when MaxError has become too high by setting the CONDITION_FLAG bit in BatteryMode.

7.1.14 RelativeStateOfCharge (0x0d)

Returns the predicted remaining battery capacity expressed as a percentage of FullChargeCapacity (%).

DS21766A-page 24  2003 Microchip Technology Inc.

7.1.15 AbsoluteStateOfCharge (0x0e)

Returns the predicted remaining battery capacity expressed as a percentage of DesignCapacity (%). Note that AbsoluteStateOfCharge can return values greater than 100%.

7.1.16 RemainingCapacity (0x0f)

Returns the predicted remaining battery capacity. The RemainingCapacity value is expressed in either current (mAh) or power (10 mWh), depending on the setting of the BatteryMode 's CAPACITY_MODE bit.

7.1.17 FullChargeCapacity (0x10)

Returns the predicted pack capacity when it is fully charged. It is based on either current or power, depending on the setting of the BatteryMode CAPACITY_MODE bit.

7.1.18 RunTimeToEmpty (0x11)

Returns the predicted remaining battery life at the present rate of discharge (minutes). The RunTime- ToEmpty value is calculated based on either current or power, depending on the setting of the BatteryMode 's CAPACITY_MODE bit. This is an important distinction because use of the wrong Calculation mode may result in inaccurate return values.

7.1.19 AverageTimeToEmpty (0x12)

Returns a one-minute rolling average of the predicted remaining battery life (minutes). The AverageTime- ToEmpty value is calculated based on either current or power, depending on the setting of the BatteryMode 's CAPACITY_MODE bit. This is an important distinction because use of the wrong Calculation mode may result in inaccurate return values.

7.1.20 AverageTimeToFull (0x13)

Returns a one-minute rolling average of the predicted remaining time until the Smart Battery reaches full charge (minutes).

7.1.21 ChargingCurrent (0x14)

Sets the maximum charging current for the Smart Charger to charge the battery. This can be written to the Smart Charger from the Smart Battery, or requested by the Smart Charger from the battery.

7.1.22 ChargingVoltage (0x15)

Sets the maximum charging voltage for the Smart Charger to charge the battery. This can be written to the Smart Charger from the Smart Battery, or requested by the Smart Charger from the battery.

7.1.23 BatteryStatus (0x16)

Returns the Smart Battery's status word (flags). Some of the BatteryStatus flags, like REMAINING_ CAPACITY_ALARM and REMAINING_TIME_ALARM, are calculated based on either current or power, depending on the setting of the BatteryMode CAPACITY_MODE bit. This is important because use of the wrong Calculation mode may result in an inaccurate alarm. The BatteryStatus function is used by the power management system to get alarm and status bits, as well as error codes from the Smart Battery. This is basically the same information returned by the SBData AlarmWarning function, except that the AlarmWarning function sets the Error Code bits all high before sending the data. Also, information broadcasting is disabled in the PS4XX-04XX. Battery Status Bits: bit 15: OVER_CHARGED_ALARM bit 14: TERMINATE_CHARGE_ALARM bit 13: Reserved bit 12: OVER_TEMP_ALARM bit 11: TERMINATE_DISCHARGE_ALARM bit 10: Reserved bit 9: REMAINING_CAPACITY_ALARM bit 8: REMAINING_TIME_ALARM bit 7: INITIALIZED bit 6: DISCHARGING bit 5: FULLY_CHARGED bit 4: FULLY_DISCHARGED The Host system assumes responsibility for detecting and responding to Smart Battery alarms by reading the BatteryStatus to determine if any of the alarm bit flags are set. At a minimum, this requires the system to poll the Smart Battery BatteryStatus every 10 seconds at all times the SMBus is active.

7.1.24 CycleCount (0x17)

CycleCount is updated to keep track of the total usage of the battery. CycleCount is increased whenever an amount of charge has been delivered to, or removed from, the battery equivalent to the full capacity.

 2003 Microchip Technology Inc. DS21766A-page 25 PS402-01XX

7.1.25 DesignCapacity (0x18)

Returns the theoretical capacity of a new pack. The DesignCapacity value is expressed in either current or power, depending on the setting of the BatteryMode 's CAPACITY_MODE bit.

7.1.26 DesignVoltage (0x19)

Returns the theoretical voltage of a new pack (mV).

7.1.27 SpecificationInfo (0x1a)

Returns the version number of the Smart Battery specification the battery pack supports.

7.1.28 ManufactureDate (0x1b)

This function returns the date the cell pack was manufactured in a packed integer. The date is packed in the following fashion: (year-1980) * 512 + month * 32 + day.

7.1.29 SerialNumber (0x1c)

This function is used to return a serial number. This number, when combined with the ManufacturerName the DeviceName and the ManufactureDate will uniquely identify the battery.

7.1.30 ManufacturerName (0x20)

This function returns a character array containing the battery manufacturer's name.

7.1.31 DeviceName (0x21)

This function returns a character string that contains the battery's name.

7.1.32 DeviceChemistry (0x22)

This function returns a character string that contains the battery's chemistry. For example, if the DeviceChemistry function returns "NiMH," the battery pack would contain nickel metal hydride cells. The following is a partial list of chemistries and their expected abbreviations. These abbreviations are NOT case sensitive. Lead Acid: PbAc Lithium Ion: LION Nickel Cadmium: NiCd Nickel Metal Hydride: NiMH Nickel Zinc: NiZn Rechargeable Alkaline-Manganese: RAM Zinc Air: ZnAr

7.1.33 ManufacturerData (0x23)

This function allows access to the manufacturer data contained in the battery (data).

7.1.34 OptionalMfgFunction

The PS402 does not implement this function.

DS21766A-page 26  2003 Microchip Technology Inc. TABLE 7-2: PS402 ALARMS AND STATUS SUMMARY Battery Status Set Condition Clear Condition FULLY_CHARGED bit Set at End of Charge Condition: Charge FET Off AND Any VC(x) input > 4.175V AND IAVG < EOC_IAVG for ChrgCntrlTimer number of consecutive counts RelativeStateOfCharge ( ) < ClearFullyCharged (default RSOC=80%) OVER_CHARGED_ALARM bit Valid EOC VPack < ResetTCAVolt TERMINATE_CHARGE_ALARM bit Charging Temperature ( ) > ChrgMaxTemp (default 60°C) OR Fully_Charged bit = 1 VPack < ResetTCAVolt AND Temperature ( )< ChrgRecTemp = AND Current ( ) = < 0 OVER_TEMP_ALARM bit Temperature ( ) > HighTempAlarm (default 55°C) Temperature ( ) < HighTempAlarm TERMINATE_DISCHARGE_ALARM bit Primary Method: VPack < VPackEOD1 (per Look Up Table) AND Above condition continues for NearEODRecheck time. Secondary Method: VPack < VPackEOD2 AND Above condition continues for EODRecheck time. Primary Method: All VPack > VPackEOD1 OR Current ( ) > 0 Secondary Method: All VPack > VPackEOD2 OR Current ( ) > 0 REMAINING_CAPACITY_ALARM bit RemainingCapacity ( ) < RemainingCapacityAlarm ( ) RemainingCapacity ( ) > RemainingCapacityAlarm ( ) REMAINING_TIME_ALARM bit AverageTimeToEmpty ( ) < RemainingTimeAlarm ( ) AverageTimeToEmpty ( ) > RemainingTimeAlarm ( ) FULLY_DISCHARGED bit RemainingCapacity ( ) = 0 RelativeStateOfCharge ( ) > ClearFullyDischarged (default RSOC=20%)

 2003 Microchip Technology Inc. DS21766A-page 27 PS402-01XX

8.0 PARAMETER SETUP

This section documents all of the programmable parameters that are resident in either the OTP EPROM or EEPROM. It includes parameters that are common to the standard PS402 parameter set. The Parameter Set is organized into the following functional groups: 1. Pack Information 2. Capacity Calculations 3. EOD and FCC Relearn 4. Charge Control 5. GPIO 6. PS402 Settings 7. SBData Settings 8. Calibration TABLE 8-1: PACK INFORMATION Parameter Name Loc. # Bytes Lower Limit Upper Limit Typical Value Operational Description BatStatus EE 1 0 255 b01000000 SBData register for BatteryStatus . Cells EE 1 0 255 6 Number of cells in the battery pack. Chemistry OTP 8 – – NiMH SBS data for Chemistry. Can be any ASCII string. Length defined by ChemistryLength. The Chemistry name can be programmed here and retrieved with the SBData DeviceChemistry command. ChemNameLen OTP 1 0 255 4 The length in bytes of the Chemistry String. Date EE 2 0 65535 0x2B7E SBData value for ManufactureDate . The date of manufacture of the battery pack can be programmed here and retrieved with the SBData ManufactureDate command. Coding: Date = (Year-1980) x 512 + Month x 32 + Day DesignCapacity OTP 2 0 65535 3500 SBData value for DesignCapacity . This is the first capacity loaded into the Full Charge Capacity upon power-up. DesignVPack OTP 2 0 65535 14800 SBData value for DesignVoltage . DeviceName EE 8 – – – SBData value for DeviceName . Can be any ASCII string. Length defined by DeviceNameLength. The battery circuit device name can be programmed here and retrieved with the SBData DeviceName command. DevNameLen OTP 1 0 255 7 The length in bytes of the DeviceName string. DevNamePrefix OTP 6 – – – Prefix for DeviceName MFGData EE 4 – – – SBS string for ManufacturerData . MFGName EE 10 – – – SBS string for ManufacturerName . Can be any ASCII string, typically the name of the battery pack manufacturer. Length of string is defined by MfgNameLength. MFGNameLen OTP 1 0 255 10 Name length of manufacturer name. PackResistance OTP 2 0 65535 3408 Resistance of pack. PrefixLen OTP 1 – – – Length of DeviceNamePrefix string PW1 EE 2 0 65535 – First password for the battery pack lock. PW2 EE 2 0 65535 – Second password for the battery pack lock.

DS21766A-page 28  2003 Microchip Technology Inc. SBDataVersion EE 2 0 65535 33 Specification Info according to SBS Spec. 0011 refers to Smart Battery Specification version 1.1. SerialNumber EE 2 0 65535 – SBData value for SerialNumber . The serial number of the battery pack can be programmed here and retrieved with the SBData SerialNumber command. TABLE 8-2: CAPACITY CALCULATIONS Parameter Name Loc. # Bytes Lower Limit Upper Limit Typical Value Operational Description ConfigCap EE 1 0 255 0b11010000 Bit coded as follows: Bit Function

7 Compensated RemCap

6 RemCap decreasing only

5 Compensated FCC

4 RelSOC decreasing only

3 (reserved) 2 (reserved)

1 Learn FCC unconditionally

0 Set RemCap unconditionally

CurrError OTP 1 0 255 0 Current measurement error. This is the error due to the accuracy of the A/D converter to measure and integrate the current. 255 = 100% Cycles EE 2 0 65535 0 SBData register for CycleCount . Cycles is updated to keep track of the total usage of the battery. Cycles is increased whenever an amount of charge has been delivered to, or removed from the battery, equivalent to the full capacity. For a 4000 mAh battery, Cycles is increased every time 4000 mAh goes through the battery terminals in any direction. InitialCap EE 2 0 65535 2048 The Initial Capacity of the battery. When the PS402 is first powered up and initialized, before a learning cycle takes place to learn the full capacity, the full capacity will take the value programmed into InitialCap to compute relative state-of-charge percentage. LowCurrError OTP 1 0 255 0 Current offset for error calculation. Since the error of the A/D converter is proportional to the level of current it is measuring, the error term can be too low when the current is very low. For this reason, the LowCurrError will compensate the ERR term for low currents. LowCurrError milli-Amps are added to the current when factoring in the error. Thus, the error is: ERROR = (current + LowCurrError ) * CurrError. TABLE 8-1: PACK INFORMATION (CONTINUED) Parameter Name Loc. # Bytes Lower Limit Upper Limit Typical Value Operational Description

 2003 Microchip Technology Inc. DS21766A-page 29 PS402-01XX mWhVolt OTP 2 0 65535 32402 AtRate and other time-based calculations can be more accurate using a different formula for mWh. All calculations, except remaining capacity, will use mWhVolt for conversion. This approximates a straight line for the entire battery curve. mWhVolt is typically the full pack voltage plus the empty pack voltage, V_full + V_empty. NChangeState OTP 1 0 255 8 State change delay filter. Delays the change between "charge increasing" state and "charge decreasing" state based on current direction. To avoid problems with current spikes in opposite directions, a delay filter is built-in to control when to change from charging status to discharging status. The current must change directions and stay in the new direction for CST_DELAY * period before the status is changed and capacity is increased or decreased as a result of the new current direction. NullCurr OTP 1 0 255 3 A zero zone control is built into the PS402 so that any small inaccuracy doesn't actually drain the gas gauge, when in fact the current is zero. For this reason, current less than NullCurr mA in either direction will be measured as zero. PowerCalcVolt OTP 2 0 65535 9300 Used for power calculations early in the voltage curve, this is typically a midpoint voltage level that will approximate the flat part of the voltage curve as a straight line. PowerEmptyVolt OTP 2 0 65535 15000 Voltage used for power calculation. This is the pack voltage when the pack is empty. Typically, this will be the cell empty voltage Vempty times the number of cells. This is used in the steep part of the voltage curve to approximate a straight line. PowerVoltLimit OTP 2 0 65535 15602 Voltage for power calculations. VPOWER is cutoff voltage that decides which formula to use when converting mAh to mWh. If the battery voltage is V, then If V > PowerVoltLimit , mWh = mAh * (V + PowerVolt) / 2. If V < PowerVoltLimit, mWh = mAh * (V + PowerEmptyVolt) / 2. PwrConsumption OTP 2 0 65535 77 Current consumption of the battery module. This is the average current that the battery module typically draws from the battery (255 = 1 mA). SelfdischrgErr OTP 1 0 255 0 Self-discharge error. This is the error inherent in the ability of the self-discharge lookup tables to meet actual battery characteristics, 255 = 100%. TABLE 8-2: CAPACITY CALCULATIONS (CONTINUED) Parameter Name Loc. # Bytes Lower Limit Upper Limit Typical Value Operational Description

DS21766A-page 30  2003 Microchip Technology Inc. TABLE 8-3: EOD AND FCC RELEARN Parameter Name Loc. # Bytes Lower Limit Upper Limit Typical Value Operational Description ADLNearEmpty EE 1 0 255 6 SOC at which A/D switches to emphasize voltage over current measurement near EOD. EE value of 128 = 100%. ADLNearFull EE 1 0 255 122 SOC at which A/D switches to emphasize voltage over current measurement near EOC. EE value of 128 = 100%. EOD1Cap EE 2 0 65535 0 The capacity that remains in the battery at VEOD1. This is typically a small amount used to power a shutdown sequence for the system. EODRecheck OTP 1 0 255 6 Delay filter for the EOD condition. Number of checks before EOD trigger. The end of discharge conditions must remain for at least this number of periods before being considered true, to help filter out false empty conditions due to spikes. FullCapacity EE 2 0 65535 4150 Learned value of battery capacity. Used for SBData value of FullChargeCapacity . This is a learned parameter which is the equivalent of all charge counted from fully charged to fully discharged, including self- discharge and error terms. This is reset after a learning cycle and used for remain- ing capacity and relative state-of-charge calculations. NearEODErrReset OTP 2 0 65535 0 Near EOD error RESET. NearEODRecheck OTP 1 0 255 6 Number of periods of valid pack voltage measurements needed to trigger near EOD capacity RESET. RelearnCurrLim OTP 2 0 65535 6000 Value of measured current that prevents a capacity relearn from occurring when a terminate discharge alarm condition is reached at end-of-discharge (EOD). A learning cycle will happen when the battery discharges from fully charged all the way to fully discharged with no charging in between, and the discharge current never exceeds RelearnCurrLim . Example: 3000. A relearn will only occur if current does not exceed 3000 mA. RelearnLimit OTP 1 0 255 205 The maximum relearn limit. The maximum percentage that the FULL_CAPACITY can change after a learning cycle, where 255 = 100%. RelearnMaxErr OTP 2 0 65535 200 Maximum error for learning FullCapacity The FULL_CAPACITY will not be learned after a learning cycle if the error is too great.

 2003 Microchip Technology Inc. DS21766A-page 31 PS402-01XX RLCycles OTP 1 0 255 2 The number of initial cycles without RelearnLimit. The initial number of cycles where RelearnLimit is not active. FullCapacity can vary more greatly with the first learning cycle, since the initial capacity may not be correct, thus this should be set to at least ‘2’. VPackEOD1 EE 2 0 65535 9000 First end-of-discharge voltage point. At this point, capacity is set to S_CAP1, and FCC relearn takes place. VPackEOD2 EE 2 0 65535 8000 Second and final end-of-discharge voltage point. At this point, remaining capacity is optionally set to ‘0’. TABLE 8-4: CHARGE CONTROL Parameter Name Loc. # Bytes Lower Limit Upper Limit Typical Value Operational Description ChrgCurr EE 2 0 65535 3500 This is the full charging current that the battery requires during normal charging. It can be broadcasted to the charger or read from the PS402. ChrgCurrOff EE 2 0 65535 100 Trickle charging current. This is a small amount of current that the charger should deliver when full charging needs to be halted temporarily due to high temperature. ChrgMaxTemp OTP 2 0 65535 800 Temperature threshold when charging, coded value = (Celsius*10+200). When the temperature exceeds ChargeMaxTemp and the battery is charging, then ChargingCurrent is set to ChargingCurrOff and ChargingVoltage is set to ChargingVoltOff. ChrgMinTemp OTP 2 0 65535 200 Low temperature threshold, charging coded value = (Celsius*10+200). When charging, if the temperature is less than ChargeMinTemp, then ChargingCurrent is set to ChargingCurrOff and ChargingVoltage is set to ChargingVoltOff. ChrgVolt EE 2 0 65535 65535 This is the voltage required by the battery during normal charging. ChrgVoltOff EE 2 0 65535 0 The voltage requested by the battery when charging is complete. ClrFullyChrg OTP 1 0 255 115 Reset FULLY_CHARGED bit at this level, 128 = 100%. Once the FULLY_CHARGED bit is set, taper or pulse current will not be monitored any more. Thus, ClearFully- Charged is set at about 90%. FULLY_CHARGED bit will be on until the battery has discharged to less than 90%. TABLE 8-3: EOD AND FCC RELEARN (CONTINUED) Parameter Name Loc. # Bytes Lower Limit Upper Limit Typical Value Operational Description

DS21766A-page 32  2003 Microchip Technology Inc. ClrFullyDischrg OTP 1 0 255 13 Reset FULLY_DISCHARGED bit, 128 = 100%. Once fully discharged bit is set, it will stay set until capacity rises above this value, typically 10%. DishrgMaxTemp OTP 2 0 65535 800 Temperature threshold when discharging Coded value = (Celsius*10+200). When discharging, if the temperature exceeds DischargeMaxTemp , then ChargingCurrent is set to ChargingCurrOff and ChargingVoltage is set to ChargingVoltOff. DtEOCSOC EE 1 0 255 95 Relative SOC is set to this value after a full charge Temperature EOC condition occurs. EOCDeltaT EE 1 0 255 60 Minimum temperature change between samples to cause a temperature EOC (seconds). EOCDeltaV EE 1 0 255 10 Minimum voltage drop change between samples to cause a -dV EOC. EOCRateMax EE 1 0 255 4 Maximum C-Rate allowed for overcharge EOC to be considered. DvCRate EE 2 0 65535 1 Minimum current for -dV EOC. MaxSOC EE 1 0 255 100 Maximum state-of-charge, 128 = 100%. This is the maximum state-of-charge that the battery fuel gauge should register. Typically set to 100% so that any overcharge is not displayed as a battery more than 100% full. MaxTemp EE 2 0 65535 750 Maximum temperature measured (including external and internal sensor). Coded value = (Celsius*10+200). This is where the PS402 keeps track of the highest temperature it has measured. NDelayEOC EE 1 0 255 5 Delay, after start of charge, before full charge EOC conditions can be considered (minutes). NDtVSample EE 1 0 255 60 Delay between samples for EOC detection. PrechargeCurr OTP 2 0 65535 300 Precharge nominal current. PrechargeMax OTP 2 0 65535 500 Precharge max current. PrechargeTemp OTP 2 0 65535 250 Precharge temperature, coded value = (Temp[°C] + 20) x 10. This is the temperature under which precharging should occur. PrechargeVPack OTP 2 0 65535 7000 Precharge pack voltage. This is the voltage under which precharging should occur. ResetTCAVolt OTP 2 0 65535 11000 Terminate Charge Alarm reset condition (mV). SOCErrorLimit EE 1 0 255 120 SOC range for error clamp to zero, 128 = 100%. TABLE 8-4: CHARGE CONTROL (CONTINUED) Parameter Name Loc. # Bytes Lower Limit Upper Limit Typical Value Operational Description

 2003 Microchip Technology Inc. DS21766A-page 33 PS402-01XX SOCThreshold OTP 1 0 255 154 Third EOC trigger based on state-of-charge, 128 = 100%. If the state-of-charge exceeds a certain value, end-of-charge will be forced, even if a valid dT/dt or -dV EOC was not detected. When state-of-charge reaches SOCThreshold , then end-of- charge will trigger. StableCurr OTP 1 0 255 50 EOC trigger current deviation level. In order to prevent current spikes from causing a premature taper current trigger, the average current and the instantaneous current must be within StableCurr of each other for the end-of-charge to trigger. TABLE 8-5: GPIO Parameter Name Loc. # Bytes Lower Limit Upper Limit Typical Value Operational Description GPIO0 OTP 2 0 65535 0x0001 GPIO0 condition definition. Low byte is AND function, high byte is OR function. GPIO1 OTP 2 0 65535 0x0015 GPIO1 condition definition. Low byte is AND function, high byte is OR function. GPIO2 OTP 2 0 65535 0x0029 GPIO2 condition definition. Low byte is AND function, high byte is OR function. GPIO3 OTP 2 0 65535 0x003D GPIO3 condition definition. Low byte is AND function, high byte is OR function. GPIO4 OTP 2 0 65535 0x0051 GPIO4 condition definition. Low byte is AND function, high byte is OR function. GPIO5 OTP 2 0 65535 0xAE00 GPIO5 condition definition. Low byte is AND function, high byte is OR function. GPIO6 OTP 2 0 65535 0x0001 GPIO6 condition definition. Low byte is AND function, high byte is OR function. GPIO7 OTP 2 0 65535 0x0000 GPIO7 condition definition. Low byte is AND function, high byte is OR function. GPIOChgCtr OTP 1 0 255 0b00000000 Defines a GPIO as based on the charge control conditions. A ‘1’ sets charge control. GPIOConfig OTP 1 0 255 0b00000000 Defines function of the GPIO pins depending on the programming of each individual pin as an input or output via the GPIODirection register: Input: 1 = Reacts to rising edge 0 = Reacts to falling edge Output: 1 = LED Output 0 = Standard CMOS Push-Pull GPIODirection OTP 1 0 255 0b11111111 Defines whether a GPIO set up as a conditional I/O in GPIOConfig is an input or an output. A ‘1’ bit means output, ‘0’ means input. GPIODisplay OTP 1 0 255 0b00011111 Defines whether a GPIO set up as an LED should be used in the state-of-charge display when the "switch" is pushed. A ‘1’ sets the GPIO to be state-of-charge display. TABLE 8-4: CHARGE CONTROL (CONTINUED) Parameter Name Loc. # Bytes Lower Limit Upper Limit Typical Value Operational Description

DS21766A-page 34  2003 Microchip Technology Inc. GPIOPolarity OTP 1 0 255 0b11000000 The active polarity of the GPIOs can be programmed here. When an I/O is triggered, it can be programmed here to go either high or low, and the opposite state will be the default (not triggered). Set the appropriate bit to ‘1’ for active being high level (LED on), and ‘0’ for active being low level (LED off). GPIOReset OTP 1 0 255 b00000000 Defines the initial state of the GPIO at power up or reset. 1=high, 0=low GPIOSafety OTP 1 0 255 b01100000 Defines a GPIO as based on the safety conditions. A ‘1’ sets safety control. GPIOSwitch OTP 1 0 255 b00000000 Defines GPIO state of charge display input switch. 1 sets the switch condition. LEDDutyCycle EE 1 0 255 3 Duty cycle for LED display. LEDPermlMin OTP 2 0 65535 100 Minimum charging current for permanent LED display. Since permanent LED display requires current draw from the battery, LEDs can be set to be on only while the battery is charging, with a minimum current of LEDPermMin NLED EE 1 0 255 6 Duration of LED display. When LEDs are set up to display state-of-charge information, they will be illuminated when the switch is pushed. They will stay illuminated for 2 seconds plus NLED period. For NLED = 8, period = 0.5, the LEDs will stay on for 2 + 8 * .5 seconds, or 2 + 4 = 6 seconds. NSafel EE 1 0 255 60 Delay filter for all current safety conditions. The safety conditions must be valid for NSafeI * period to avoid false triggers due to spikes or noise. NSafeV EE 1 0 255 60 Delay filter for all voltage safety conditions. The safety conditions must be valid for NSafeV * period to avoid false triggers due to spikes or noise. ResetIMax OTP 2 0 65535 5000 Reset condition of maximum current (mA). ResetMaxVPack OTP 2 0 65535 11000 Pack voltage after SAFETY triggered to return to normal operation. If an alarm or secondary safety output is triggered due to over voltage, it will stay active until the voltage returns to the ResetMaxVPack level. ResetMaxTemp OTP 2 0 65535 750 Reset condition of maximum temperature (Celsius*10+200). ResetMinTemp OTP 2 0 65535 250 Reset condition of minimum temperature (Celsius*10+200). SafetyIMaxC OTP 2 0 65535 5500 Safety condition of maximum charging current. TABLE 8-5: GPIO (CONTINUED) Parameter Name Loc. # Bytes Lower Limit Upper Limit Typical Value Operational Description

 2003 Microchip Technology Inc. DS21766A-page 35 PS402-01XX SafetyIMaxD OTP 2 0 65535 5500 Safety condition of maximum discharging current. SafetyMaxTemp OTP 2 0 65535 800 Safety condition of maximum temperature (Celsius*10+200). SafetyMaxVPack OTP 2 0 65535 17600 Safety condition of maximum pack voltage. SafetyMinTemp OTP 2 0 65535 200 Safety condition of minimum temperature (Celsius*10+200). TABLE 8-6: PS402 SETTINGS Parameter Name Loc. # Bytes Lower Limit Upper Limit Typical Value Operational Description AutoOffset EE 1 0 255 60 The frequency of the Auto Offset Calibration cycle. BlockVersion OTP 2 0 65535 3 OTP Block ID. ComOffsetCurr EE 1 0 255 7 Current offset for Wake-up current level. ConfigEOC EE 1 0 255 b00010000 Bit coded as follows: Bit Function

7 Enable/Disable charge per Battery-

6 (reserved)

5 EOC_CAPFCC; limit REMCAP to

4 EOC_OCHG; set overcharge

3 EOC_CAPSET; load CAP with FCC

2 (reserved) 1 (reserved) 0 (reserved) ConfigEOD EE 1 0 255 b01011000 Bit coded as follows: Bit Function

7 VEOD1_FV; evaluate EOD1 on fixed

voltage (else table)

6 VEOD1_CAPSET_K; set capacity to

constant S_CAP1 at VEOD1 (else table)

5 VEOD1_CAPSET_RS; set capacity

to residual capacity value immediately upon VEOD1

4 VEOD1_ALARM_TERM; set

Terminate Discharge Alarm on VEOD1 (default on VEOD2)

3 VEOD1_LEARN; learn FCC at

2 TDA alarm

1 VEOD2_CAPCLEAR; set capacity

0 EOD1_CAPLIM_CONST; limit ITF to

TABLE 8-5: GPIO (CONTINUED) Parameter Name Loc. # Bytes Lower Limit Upper Limit Typical Value Operational Description

DS21766A-page 36  2003 Microchip Technology Inc. ConfigLED EE 1 0 255 b10000010 Bit coded as follows: Bit Function

7 Disable Master mode

6 AC Present on restart

5( f r e e )

4 LEDD_CHG: LED display while

3 LEDD_1: Display the most significant

2 LEDD_ABSOC: LED using Absolute

SOC, else Relative SOC

1 LEDD_FLASHEN: Flash LEDs on

remaining time or remaining cap alarm

0 LEDD_FLASHEN_CHG: Flash LEDs

EEError EE 1 0 255 0 Incremented when write retries exceeds EERepeats EERepeats EE 1 0 255 3 Maximum number of internal write retries. FLAGS1 EE 1 0 255 b00100110 Bit coded as follows: Bit Function

7 Enable precharge max current check

6 Hold Charge Current = 0 until next

5 Int/Ext temp

4 FET system presence

3 CFET polarity

2 Fuse enable

1 Pack resistor enable

0 Enable Sample Mode detect

NAlarm EE 1 0 255 20 Frequency of alarms. NChrgBroadcast EE 1 0 255 43 Frequency of charging condition broadcasts. NSilent EE 1 0 255 10 Bus-on silence period for messages. NSample EE 1 0 255 10 Frequency of ADC activity in Sample Mode. The A/D converter will make measurements every NSample periods while in Sample Mode. In Run Mode, new measurements are taken every period. OSCTrim EE 1 0 255 125 RC oscillator trimming. PNModeDelay EE 1 0 255 10 Time slot for Programming mode. When the PS402 is put into Programming mode to program the EEPROM through the SMBus, it will stay in Programming mode for PNModeDelay /2 periods before automatically returning to Normal mode. For PNModeDelay = 16, period = 0.5, the PS402 will stay in Programming mode for 8 seconds. EEPROM programming must be finished in this amount of time. ProgLock EE 2 0 65535 Code for EEPROM programming function. Determines successful EEPROM update. Internal P4 code only. TABLE 8-6: PS402 SETTINGS (CONTINUED) Parameter Name Loc. # Bytes Lower Limit Upper Limit Typical Value Operational Description

 2003 Microchip Technology Inc. DS21766A-page 37 PS402-01XX PTRActualData EE 2 0 65535 0x1721 OTP starting address of current data block. RFactor OTP 1 0 255 7 C-Rate scaling. R F=28/max C-Rate. This is used to scale all C-rate values, such as taper current values and lookup table C- rates. For a maximum allowable C-rate of 4C in these values, set R F to 28/4 = 7. By changing RF you can scale all C-rate values in lookup tables and other parameters for use with higher current systems, without changing all the other values. SampleLimit EE 1 0 255 15 Value used to determine the current threshold for entry/exit for Sample and Run modes: Threshold [mA] = SampleLimit x CfCurr / 16384 SleepVPack EE 2 0 65535 8800 The pack voltage at which the PS402 will enter Low Voltage SLEEP Mode. WakeUp EE 1 0 255 b00001011 When in the Low Voltage SLEEP Mode (entry due to low voltage and Sample Mode), there are four methods for waking up. They are voltage level, current level, SMBus activity and I/O pin activity. This value defines which wake-up functions are enabled, and also the voltage wake-up level. The table below indicates the appropriate setting. Note that the setting is independent of the number of cells or their configuration. Wake-up: Bit Name Function

6 Wake_IO Wake-up from I/O activity

5 Wake_Bus Wake-up from SMBus activity

4 Wake_Curr Wake-up from Current

3 Wake_Volt Wake-up from Voltage

2:0 Wake_Level Defines Wake Voltage Level Wake-up Voltage: WakeUp (2:0) Voltage Purpose 000 6.4V 2 cells Li-Ion 001 6.66V 6 cells NiMH 010 8.88V 8 cells NiMH 011 9.6V 3 cells Li-Ion 100 9.99V 9 cells NiMH 101 11.1V 10 cells NiMH 110 12.8V 4 cells Li-Ion 111 13.3V 12 cells NiMH TABLE 8-6: PS402 SETTINGS (CONTINUED) Parameter Name Loc. # Bytes Lower Limit Upper Limit Typical Value Operational Description

DS21766A-page 38  2003 Microchip Technology Inc. TABLE 8-7: SBData SETTINGS Parameter Name Loc. # Bytes Lower Limit Upper Limit Typical Value Operational Description BusConfig EE 1 0 255 b00100001 Bit coded as follows: Bit Function 7 V2.0 arbitration

6 Master wr w/CRC

5 PEC on

4 Baud rate control

HighTempAl EE 2 0 65535 750 Over Temp alarm threshold bit in AlarmWarning register, 0.1°C increments, Coded value = (Celsius*10+200). When the temperature exceeds HighTempAlarm , the OverTempAlarm becomes active. If charging, the TerminateChargeAlarm also becomes active. RemCapAl EE 2 0 65535 440 SBData value for RemCapAl . The SBData specification requires a default of DesignCapacity/10 for this value. When the Remaining Capacity calculation reached the value of RemCapAl , the REMAINING_CAPACITY_ALARM bit will be set in the BatteryStatus register, and an alarm broadcast to the host will occur if alarm broadcasts are enabled. RemTimeAl EE 2 0 65535 10 SBData value for RemTimeAl . SBData requires a default of 10 minutes for this value. When the RunTimeToEmpty calculation reaches the value of RemTimeAl , the REMAINING_TIME_ALARM bit in BatteryStatus will be set. SMBusAddr EE 1 0 255 0x16 SMBus address of the battery. TABLE 8-8: CALIBRATION Parameter Name Loc. # Bytes Lower Limit Upper Limit Typical Value Operational Description CalStatus EE 1 0 255 b11111111 Bit coded as follows: Bit Function

7 RCOSC

5 CURRENT

3 N/A

2 N/A

1 N/A

0 N/A

0 = Not Calibrated 1 = Calibrated

 2003 Microchip Technology Inc. DS21766A-page 39 PS402-01XX CFCurr EE 2 0 65535 6844 Correction Factor for Current. Adjusts the scaling of the sense resistor current measurements. Used to calibrate the measurement of current at the RSHP and RSHN input pins. This is set for the size of the current sense resistor. CFTempE EE 2 0 65535 1300 Correction Factor for Temperature. Adjusts the scaling of temperature measured across an external thermistor at the VNTC input pin. CFTempI EE 2 0 65535 23800 Correction Factor for Temperature. Adjusts the scaling of temperature measured from the internal temperature sensor. Calibration: New CF_TEMP = Old CF_TEMP x (Thermometer[°C] / SBData Temperature [°C] ) Note: SBData Temperature is reported in 0.1°K normally. It must be converted to °C for this equation. CFVPack EE 2 0 65535 20045 Correction Factor for Pack Voltage. Adjusts the scaling of the pack voltage measure- ments. Used to calibrate the measurement of pack voltage. COCurr EE 1 -128 127 -12 Correction Offset for Current. This is the value the A/D reads when zero current is flowing through the sense resistor. COD EE 1 -128 127 -12 Correction Offset Deviation - Offset value for the auto-zero calibration of the current readings. SBData Current [mA] = (I_A/D - CO_CURR - COD) x CF_CURR / 16384 Calibration: CF_CURR = ((Ammeter[mA] x 16384) - 8192) / (Current - I_A/D at OCV) COTempE EE 1 -128 127 -2 Correction Offset for Temperature. Offset = 0 used for temperature measurement using internal temperature sensor. COTempI EE 2 -32768 32767 -11375 Correction Offset for Temperature. Offset = 0 used for temperature measurement using internal temperature sensor. COVPack EE 1 -128 127 0 Correction Offset for Voltage. Offset factor used for pack voltage reading. TABLE 8-8: CALIBRATION (CONTINUED) Parameter Name Loc. # Bytes Lower Limit Upper Limit Typical Value Operational Description

DS21766A-page 40  2003 Microchip Technology Inc.

9.0 ELECTRICAL CHARACTERISTICS

TABLE 9-1: ABSOLUTE MAXIMUM RATINGS TABLE 9-2: DC CHARACTERISTICS (T A = -20°C TO +85°C; VREG (INTERNAL) = +5.0V ±10%) Symbol Parameter Min Max Units VCX Voltage at any VC(x) pin -0.5 18.5 V VPIN Voltage directly at any pin (except VC(x)) -0.5 7.0 V TBIAS Temperature under bias -20 85 °C TSTORAGE Storage temperature (package dependent) -35 125 °C Note 1: These are stress ratings only. Stress greater than the listed ratings may cause permanent damage to the device. Exposure to absolute maximum ratings for an extended period may affect device reliability. Functional operation is implied only at the listed Operating Conditions below. Symbol Characteristic Min Typ Max Units Condition VSUPPLY Supply Voltage – Applied to VC(1) 5.6 18.0 V VDDA Supply Voltage – (Output from internal regulator on VDDA pin) 4.5 5.0 5.5 V Note 1 IDD Instantaneous Supply Current 375 400 µA Note 2 IDDRUN Average Supply Current – Run Mode 300 385 µA A/D Active, Note 2 IDDINS Inactive Supply Current – Sample Mode 225 250 µA A/D Inactive, Note 2, 3 IDDSLEEP Average Supply Current – Sleep Mode 12 18 µA Sleep Mode, Note 2 IWAKE Wake Up Current Threshold from Sleep Mode – (Voltage across sense resistor) 2.50 3.75 5.00 mA VIL Input Low Voltage – GPIO(7-0) 0.2* VDDD V VIH Input High Voltage – GPIO(7-0) 0.8* VDDD V IIL-IOPU GPIO Input Low Current – Pull-up mode -80 -110 -140 µA IIH-IOPD GPIO Input High Current – Pull-down mode 70 105 140 µA IL Leakage Current – GPIO pins programmed as outputs 12 µA VOL Output low voltage for GPIO(7-0) 0.4 V I OL = 0.5 mA VOH-IO Output high voltage for GPIO(7-0) (non-LED mode)

2.0 V I OH = 100 µA

VOH-LED Output high voltage for GPIO(7-0) (LED mode) 2.0 V I OH = 10 mA, Note 4 VSR Sense Resistor Input Voltage Range -152 152 mV VNTC Thermistor Input Voltage Range 0 152 mV VREFT NTC Reference voltage output at VREFT pin 150 mV VIL-SMB Input Low Voltage for SMBus pins -0.5 0.8 V VIH-SMB Input High Voltage for SMBus pins 2.0 5.5 V VOL-SMB Output Low Voltage for SMBus pins 0.4 V I PULLUP = 350 µA VOH-SMB Output High Voltage for SMBus pins 2.1 5.5 V IPULLUP-SMB Current through pullup resistor or current source for SMBus pins 100 350 µA ILEAK-SMB Input leakage current – SMBus pins ± 5 µA Note 1: VREG is the on-chip regulator voltage. It is internally connected to analog supply voltage and is output on the V DDA pin. 2: Does not include current consumpti on due to external loading on pins. 3: Sample Mode current is specified during an A/D inactive cycle. Sample Mode average current can be calculated using the formula: Average Sample Mode Supply Current = (I DDRUN + (n-1)*IDDINS)/n; where "n" is the programmed sample rate. 4: During LED illumination, currents may peak at 10mA but av erage individual LED current is typically 5 mA (using low-current, high-brightness devices.)

 2003 Microchip Technology Inc. DS21766A-page 41 PS402-01XX TABLE 9-3: AC CHARACTERISTICS (T A = -20°C TO +85°C; VREG (INTERNAL) = +5.0V ±10%) TABLE 9-4: AC CHARACTERISTICS – SMBUS (T A = -20°C TO +85°C; VREG (INTERNAL) = +5.0V ±10%) Symbol Characteristic Min Typ Max Units Condition dfRC Internal RC oscillator frequency 512 kHz tCONV A/D Conversion measurement time, n-bit+sign 2 n/fA/D ms Symbol Characteristic Min Typ Max Units Condition fSMB SMBus clock operating frequency <1.0 100 kHz Slave Mode fSMB-MAS SMBus clock operating frequency 50 f RC/8 68 kHz Master Mode, Note 1 tBUF Bus free time between START and STOP 4.7 µs tSHLD Bus Hold time after Repeated START 4.0 µs tSU:STA Setup time before Repeated START 4.7 µs tSU:STOP STOP setup time 4.0 µs tHLD Data hold time 300 µs tSETUP Data setup time 250 µs tTIMEOUT Clock low time-out period 10 35 ms Note 2 tLOW Clock low period 4.7 µs tHIGH Clock high period 4.0 50 µsN o t e 3 tLOW:SEXT Message buffering time 10 ms Note 4 tLOW:MEXT Message buffering time 10 ms Note 5 tF Clock/data fall time 300 ns Note 6 tR Clock/data rise time 1000 ns Note 6 Note 1: Used when broadcasting AlarmWarning, Char gingCurrent and/or ChargingVoltage values to either a SMBus Host or a SMBus Smart Battery Charger. This is only used when the PS402 becomes a SMBus Master for these functions. The receiving (Slave) device may slow the transfer frequency. See SMBus Tutorial in P4 User's Guide for additional information. 2: The PS402 will timeout when the cumulative message time defined from Start-to-Ack, Ack-to-Ack, or Ack-to-Stop exceeds the value of tTIMEOUT, Min of 25 ms. The PS402 will reset the communication no later than t TIMEOUT, Max of 35 ms. 3: tHIGH Max provides a simple, guaranteed method fo r devices to detect bus idle conditions. 4: tLOW:SEXT is the cumulative time a slave device is allowed to extend the clock cycles in one message from the initial start to the stop. 5: tLOW:MEXT is the cumulative time a master device is allowed to extend its clock cycles within each byte of a message as defined from Start-to-Ack, Ack-to-Ack, or Ack-to-Stop. 6: Rise and fall time is defined as follows: tR = (VILMAX -0.15) to (VIHMIN +0.15) tF = 0.9 VDD to (VILMAX -0.15)

DS21766A-page 42  2003 Microchip Technology Inc. TABLE 9-5: A/D CONVERTER CHARACTERISTICS (T A = -20°C TO +85°C; VREG (INTERNAL) = +5.0V ±10%) FIGURE 9-1: SMBus AC TIMING DIAGRAMS TABLE 9-6: SILICON TIME BASE CHARACTERISTICS (T A = -20°C TO +85°C; VREG (INTERNAL) = +5.0V ± 10%) Symbol Characteristic Min Typ Max Units Condition ADRES A/D Converter Resolution 8 15 bits Note 1 VADIN A/D Converter Input Voltage Range (Internal) -152 152 mV Differential Mode 0 300 mV Single-Ended Mode EVGAIN Supply Voltage Gain Error 0.100 % EVOFFSET Compensated Offset Error 0.100 % ETEMP Temperature Gain Error 0.100 % EINL Integrated Nonlinearity Error 0.004 % Note 1: Voltage is internal at A/D converter inputs. VSR and VNTC are measured directly. VC(x) inputs are measured using internal level-translation circuitry that scales th e input voltage range appropriately for the converter. Symbol Characteristic Min Typ Max Units Condition ETIME Silicon time base error 0.25 % Bias Resistor R OSC tolerance = 0.5% TL = ± 25 PPM tHD:STA tBUF tLOW tR tHD:STA tHIGH tSU:DAT tF tSU:STA tSU:STA tSU:STO P S S P SCL SDA SCL SDA tLOW:MEXT SCLACK Note: SCLACK is the acknowledge-related clock pulse generated by the master. SCLACK tLOW:MEXT tLOW:MEXT tLOW:SEXT

 2003 Microchip Technology Inc. DS21766A-page 43 PS402-01XX

10.0 PACKAGING INFORMATION

28-Lead Plastic Shrink Small Outline (SS) – 209 mil, 5.30 mm (SSOP) * Controlling Parameter Notes: Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010” (0.254mm) per side. JEDEC Equivalent: MS-150 Drawing No. C04-073 10501050Mold Draft Angle Bottom 10501050αMold Draft Angle Top 203.20101.600.00840φFoot Angle 0.65.026pPitch 2828nNumber of Pins MAXNOMMINMAXNOMMINDimension Limits MILLIMETERS*INCHESUnits D p n B E Lβ c φ α A β § Significant Characteristic

DS21766A-page 44  2003 Microchip Technology Inc. Sales and Support Data Sheets Products supported by a preliminary Data Sheet may have an errata sheet describing minor operational differences and recommended workarounds. To determine if an errata sheet exists for a particular device, please contact one of the following: 1. Your local Microchip sales office 2. The Microchip Corporate Literature Center U.S. FAX: (480) 792-7277 3. The Microchip Web Site (www.microchip.com) Please specify which device, revision of silicon and Data Sheet (include Literature #) you are using. New Customer Notification System Register on our web site (www.microchip.com/cn) to receive the most current information on our products.

 2003 Microchip Technology Inc. DS21766A-page 45 PS402-01XX Information contained in this publication regarding device applications and the like is intended through suggestion only and may be superseded by updates. It is your responsibility to ensure that your application m eets with your specifications. No representation or warranty is given and no liability is assumed by Microchip Technology Incorporated with respect to the accuracy or use of such information, or infringement of patents or other intellectual property rights arising from such use or otherwise. Use of Microchip’s products as critical com- ponents in life support systems is not authorized except with express written approval by Mi crochip. No licenses are con- veyed, implicitly or otherwis e, under any intellectual property rights. Trademarks The Microchip name and logo, the Microchip logo and PowerSmart are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. Accuron, PowerTool, SmartSensor, SmartShunt, SmartTel, PowerCal and PowerInfo are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. All other trademarks mentioned he rein are property of their respective companies. © 2003, Microchip Technology Incorporated. Printed in the U.S.A., All Rights Reserved. Printed on recycled paper.

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