PS200 MICROCHIP | Alldatasheet

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© 2005 Microchip Technology Inc. DS21891B PS200 Data Sheet PowerSmart® Configurable Battery Charger

© 2005 Microchip Technology Inc. Information contained in this publication regarding device applications and the like is provided only for your convenience and may be superseded by updates. It is your responsibility to ensure that your application meets with your specifications. MICROCHIP MAKES NO REPRESENTATIONS OR WAR- RANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED, WRITTEN OR ORAL, STATUTORY OR OTHERWISE, RELATED TO THE INFORMATION, INCLUDING BUT NOT LIMITED TO ITS CONDITION, QUALITY, PERFORMANCE, MERCHANTABILITY OR FITNESS FOR PURPOSE. Microchip disclaims all liability arising from this information and its use. Use of Microchip’s products as critical components in life support systems is not authorized except with express written approval by Microchip. No licenses are conveyed, implicitly or otherwise, under any Microchip intellectual property rights. Trademarks The Microchip name and logo, the Microchip logo, Accuron, KEELOQ, MPLAB, PIC, PICmicro, PowerSmart and SmartShunt are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SmartSensor and The Embedded Control Solutions Company are registered trademarks of Microchip Technology Incorporated in the U.S.A. PowerCal, PowerInfo, PowerMate, PowerTool, Select Mode, Smart Serial and SmartTel are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. All other trademarks mentioned herein are property of their respective companies. © 2005, Microchip Technology Incorporated. Printed in the U.S.A., All Rights Reserved. Printed on recycled paper.

© 2005 Microchip Technology Inc. DS21891B-page 1 PS200

Features

  • User configurable battery charger.
  • Firmware available for the following cell chemistries: - Lithium Ion/Polymer (available now) - NiMH, NiCd (available Q2 2005) - Pb Acid (available Q3 2005)
  • 10-bit ADC for voltage, current and temperature measurement: - Accurate Voltage Regulation (+/-1%) - Accurate Current Regulation (+/-5%)
  • Maximum integration for optimal size: - Integrated voltage regulator - Internal 8 MHz clock oscillator - High-Frequency Switch mode charging – configurable switching frequency up to 1 MHz
  • 256 bytes EEPROM storage for charging parameters
  • Switch mode charger supports buck and synchronous buck topologies
  • Configurable charge status display via two LEDs
  • Power-on Reset (POR)
  • Brown-out Reset (BOR)
  • Power-saving Sleep mode

Applications

  • Notebook Computers
  • Personal Data Assistants
  • Cellular Telephones
  • Digital Still Cameras
  • Camcorders
  • Portable Audio Products
  • Bluetooth® Devices
  • Flashlights
  • Power Tools Pin Diagram PS200 20-Pin PDIP, SOIC, SSOP VDD LED2 VIN RESET CTRLOUT CHGOUT LOOPFBK LOOPIN CTRLIN LED1 VSS TEMP VOVP SHDN CHGFBK BATID IFBOUT IFBINA IFBINB HVOUT PowerSmart® Configurable Battery Charger

© 2005 Microchip Technology Inc. Pinout Description Pin Pin Name Pin Type Input Type Output Type

Description

O CMOS Status indicator VIN I Analog Battery voltage input RESET I ST Reset CTRLOUT O CMOS PWM output for setting current level CHGOUT O CMOS PWM output to a buck converter for charge control LOOPFBK I Analog Current feedback loop LOOPIN I Analog Current feedback loop input CTRLIN I Analog Current level control LED1 O CMOS Status indicator HVOUT O HVOD High-voltage, open-drain output pin (optional) IFBINB I Analog Current feedback input pin B used for current scaling IFBINA I Analog Current feedback input pin A used for current scaling IFBOUT O Analog Current feedback output BATID I Analog Battery ID select CHGFBK I Analog Charge control feedback SHDN O Analog Shutdown signal, active-low VOVP I Analog Overvoltage protection TEMP I Analog Battery temperature input VSS Supply Power Supply ground Legend: I = Input, O = Output, ST = Schmitt Trigger Input Buffer, HVOD = High-Voltage Open-Drain

© 2005 Microchip Technology Inc. DS21891B-page 3 PS200 1.0 PS200 OVERVIEW The PS200 is a configurable Switch mode charger which is comprised of a PIC16F microcontroller core and precision analog circuitry. This section explores the hardware features in relation to generic Switch mode charging. Subsequent sections will describe the opera- tion of the PS200 with firmware for Lithium-based (Section 2.0 “Lithium Chemistry Algorithm”), Nickel-based (Section 3.0 “Nickel Chemistry Algo- rithm”) and Lead Acid (Section 4.0 “Lead Acid Chemistry Algorithm”) charging.

  • Oscillator
  • Power-saving Sleep mode
  • Power-on Reset (POR)
  • Brown-out Reset (BOR)
  • High-Endurance Flash/EEPROM Cell: - 100,000 write Flash endurance - 1,000,000 write EEPROM endurance - Flash/Data EEPROM retention: > 40 years
  • High-Speed Comparator module with: - Two independent analog comparators
  • Operational Amplifier module with two independent op amps
  • Two-Phase Asynchronous Feedback PWM
  • Voltage Regulator
  • 10-bit (9-bit plus sign) A/D Converter
  • In-Circuit Serial Programming™ (ICSP™) via two pins 1.1 Hardware Features The PS200 features are well-suited for Switch mode battery charging. The PS200 device’s block diagram (Figure 1-1) is to be used in conjunction with the Switch mode charger example (Figure 2-3, page 12).
  • Current/Voltage Measurement Block – The Current/Voltage Measurement Block consists of a 10-bit Analog-to-Digital converter, operational amplifiers and a comparator. The output of this block is fed into the Charge Control module. Please refer to Figure 1-1. The inputs into this block are to be connected as described in Figure 2-3. The following signals are inputs into this block: - LOOPFBK – to comparator - LOOPIN – to op amp and ADC - CTRLIN – to op amp - IFBINB – to op amp - IFBINA – to op amp - BATID – to ADC - TEMP – to ADC - CHGFBK – to comparator The following signals are outputs from this block: - IFBOUT – from op amp
  • Charge Control Module: - The charge control module generates a Pulse-Width Modulated signal called CHGOUT. Its frequency is configurable and can be set up to 1 MHz. This signal is connected to an external DC/DC buck converter.
  • Voltage Regulator - The integrated voltage regulator is designed to work with unregulated DC supplies. - There are guidelines that should be followed. A series limiting resistor (RVDD) should be placed between the unregulated supply and the VDD pin. The value for this series resistor (RVDD) must be between RMIN and RMAX as shown in the following equation: EQUATION 1-1:
  • The precision internal 8 MHz clock oscillator eliminates the need for external oscillator circuits.
  • In-circuit configurability utilizing 256 bytes of on-board EEPROM.
  • Power on Reset – The POR insures the proper start-up of the PS200 when voltage is applied to VDD.
  • Brown-out Reset – The BOR is activated when the input voltage falls to 2.1V; the PS200 is reset. Where: RMAX = maximum value of series resistor (ohms) RMIN = minimum value of series resistor (ohms) Vs(MIN) = minimum value of charger DC supply (VDC) Vs(MAX) = maximum value of charger DC supply (VDC) I(led) = total current drawn by all LEDs when illuminated simultaneously The 1.05 and .95 constants are included to compensate for the tolerance of 5% resistors. The 16 mA constant is the anticipated load presented by the PS200, including the loading due to external components and a 4 mA minimum current for the shunt regulator itself. The 50 mA constant is the maximum acceptable current for the shunt regulator. Vs(MIN) – 5V) * 1000 RMAX = 1.05 * (16 mA + I(led)) Vs(MAX) – 5V) * 1000 RMIN = .95 * (50 mA)

© 2005 Microchip Technology Inc. FIGURE 1-1: PS200 BLOCK DIAGRAM Charge Control CTRLOUT CHGOUT LED2 HVOUT Internal Oscillator Voltage Regulator Current/Voltage Measurement Block CTRLIN LOOPIN LOOPFBK CHGFBK IFBINB IFBINA TEMP IFBOUT VDD VSS Voltage Reference VIN OA1 OA2 10-bit ADC Module RESET VOVP LED1 SHDN To Charge Control Module BATID

© 2005 Microchip Technology Inc. DS21891B-page 5 PS200 2.0 LITHIUM CHEMISTRY ALGORITHM The PS200 provides an unprecedented level of configurability for charging Lithium Ion/Lithium Polymer battery packs. It’s precision, 10-bit Analog-to-Digital converter and high-frequency Pulse-Width Modulator enable the PS200 to provide optimum control of charging algorithms for lithium battery chemistries. Special features include an internal voltage regulator and an internal clock oscillator that reduce external component count. 2.1 Lithium Overview 2.1.1 MULTI-STEP CHARGING To ensure the proper treatment of lithium chemistries during extreme temperature and voltage conditions, multi-step charging is required. The PS200 starts the charging cycle upon sensing the presence of a battery pack and a valid charging supply. During charge qualification, the battery’s temperature and voltage are measured to determine the appropriate initial state. The initial states include Charge Suspend, Precharge and Current Regulation. Charge Suspend halts charging when the user defined preset conditions for charging are not met. Precharge allows for the recovery of deeply discharged batteries by applying a low-charge current. Current Regulation provides constant current, voltage limited charge. Upon reaching the target voltage during Current Regulation, the Voltage Regulation state is entered. Charging continues at a constant voltage until the current decreases to the user specified minimum current threshold (VRIMin). At this threshold, charging is terminated and the End-Of-Charge state is reached. The state diagram illustrates the charging cycle (see Figure 2-1). 2.1.2 USER CONFIGURABLE PARAMETERS The PS200 supports user configurable parameters that allow for customizing the charging profile. This feature allows for the maximum reuse of hardware, thus reducing time-to-market. These parameters include:

  • Battery Temperature: - Minimum/maximum temperature for charge initiation - Maximum temperature allowed during charge
  • Battery Voltage: - Minimum/maximum voltage for charge initiation - Target voltage during Voltage Regulation - Voltage at which the charger will restart charging after completion of a valid charge cycle
  • Charge Current: - Target current during Current Regulation - Taper current threshold for End-Of-Charge during Voltage Regulation - Target current during Precharge
  • Time: - Precharge time limit - Current Regulation time limit - Voltage Regulation time limit
  • Status Display: - Two LEDs denote the charge states. Their flash rates can be modified.

© 2005 Microchip Technology Inc. FIGURE 2-1: PS200 STATE DIAGRAM LI CHARGER Legend: T = battery temperature I = charge current TMIN = minimum temperature allowed during charging IMIN = taper current threshold for TMAX = maximum temperature allowed during charging End-Of-Charge during voltage regulation TMAXCHG = maximum temperature allowed during voltage regulation t = time V = battery voltage tp = precharge time limit VMIN = minimum voltage for entering current regulation ti = current regulation time limit VMAX = maximum voltage for charge initiation tv = voltage current time limit VREG = target voltage during charge regulation BATPRES= battery present variable; if ‘1’, then battery VRCHG = voltage threshold at which charging will restart is present; if ‘0’, then battery is not present Note: When the PS200 resets, it enters the Charge Pending state. (A) Charge Pending (B) Charge Qualification (1) VCC Reset or BATPRES = 0 (2) Vcc Reset or BATPRES = 0 (3) VCC Reset or BATPRES = 0 (5) V> VRCHG (6) V > VMIN and TMAX > T > TMIN (8) V < VMIN and TMAX > T > TMIN (7) TMAX < T OR T < TMIN (9) TMAX > T > TMIN and V < VRCHG (10) t > tp and V < VMIN or (C) Charge Suspend (D) Precharge (11) V > VMIN and TMAX > T > TMIN (E) Current Regulation (12) V > VMAX or T > TMAX or t > ti or T < TMIN (14) V > VREG, T < TMAXCHG (15) V > VMAX or T > TMAXCHG or t > tv (F) Voltage Regulation (G) Charge Complete (16) VCC Reset BATPRES = 0 (17) I < IMIN and V ≥ VREG (18) BATPRES = 0 or V < VRCHG or VCC Reset (13) VCC Reset or BATPRES = 0 (4) BATPRES = 1 T > TMAX or T < TMIN

© 2005 Microchip Technology Inc. DS21891B-page 7 PS200 2.2 Lithium Charging To ensure the proper treatment of lithium chemistries during extreme temperature and voltage conditions, multi-step charging is required. The PS200 measures key voltage, temperature and time parameters. It com- pares them to user defined voltage, temperature and time limits. These limits are described in Section 2.4 “Lithium Configurable Parameters”. 2.2.1 CHARGE PENDING STATE – BEGINNING THE CHARGE CYCLE The PS200 is initially set in the Charge Pending state (A). In this state, the presence of a battery pack must be sensed in order to begin the charging cycle. The PS200 comes up in the Charge Pending state, after a Reset, independent of the previous state. 2.2.2 CHARGE QUALIFICATION STATE During charge qualification, the battery’s temperature and voltage are measured to determine the next charging state. There are four possible next states (see Figure 2-1). If the battery’s temperature is outside of the limits for charge initiation (TMAX, TMIN) then the next state is Charge Suspend (C). If the battery’s voltage is less than the minimum voltage for charge initiation (VMIN) and its temperature is within the limits for charge initiation (TMAX, TMIN), then the next state is Precharge (D). If the battery’s voltage is above the minimum voltage for charge initiation (VMIN) and its tem- perature is within the limits for charge initiation (TMAX, TMIN), then the next state is Current Regulation (E). If the battery’s voltage is above the voltage at which charging will restart (VRCHG), then the next state is Charge Complete (G). 2.2.3 PRECHARGE STATE The Precharge state allows for the recovery of a deeply discharged battery pack by applying a low charge rate. In this state, a user configured precharge current is applied to the battery, resulting in an increase in the battery’s voltage (refer to Figure 2-2). There are three possible next states (see Figure 2-1). If the battery’s voltage is above the minimum voltage for charge initiation (VMIN) and the battery’s temperature is within the limits for charge initiation (TMAX, TMIN), then the next state is Current Regulation (E). If the Precharge state time limit is exceeded (tp) and the battery’s voltage remains less than the minimum voltage for charge initiation (VMIN), then the next state is Charge Suspend (C). If the Precharge state time limit is exceeded (tp) and the battery’s temperature is greater than the maximum temperature for charge initiation (TMAX), then the next state is Charge Suspend (C). If the Precharge state time limit is exceeded (tp) and the battery’s temperature is less than the minimum temperature for charge initiation (TMIN), then the next state is Charge Suspend (C). If the battery pack is taken away (BATPRES = 0), then the PS200 enters the Charge Pending (A) state. 2.2.4 CHARGE SUSPEND STATE In the Charge Suspend state, no current is applied to the battery pack. There are two possible next states (see Figure 2-1). If the battery’s temperature is within the limits for charge initiation (TMAX, TMIN) and its voltage is less than the voltage at which charging would restart (VRCHG), then the next state is Precharge (D). If the battery pack is taken away (BATPRES = 0), then the PS200 enters the Charge Pending (A) state. Note: Refer to Figure 2-1 and Figure 2-2 for clarification when reading this section.

© 2005 Microchip Technology Inc. 2.2.5 CURRENT REGULATION STATE The Current Regulation state can be entered from the Precharge state or Charge Qualification state. Battery charging is initiated. This state provides constant current, voltage limited charging (refer to Figure 2-2). The charge current is referred to as IREG or the regula- tion current. While the current is applied, the battery’s voltage increases until it reaches a voltage limit referred to as VREG or regulation voltage. Charging continues, during which battery voltage and tempera- ture are monitored. There are three possible next states. If the battery’s voltage reaches or exceeds the voltage limit, VREG and its temperature remains below the maximum allowable during current regulated charging (TMAXCHG), then the next state is Voltage Regulation (F). If the battery exhibits any one of the following conditions then the next state is Charge Suspend (C): - Battery voltage exceeds upper voltage limit for charging (VMAX) - Battery temperature exceeds upper temperature limit for charging (TMAX) - Battery temperature is below the lower temperature limit for charging (TMIN) If the time in the Current Regulation state exceeds the time limit (ti), then the next state is Charge Suspend (C). If the battery pack is taken away (BATPRES = 0), then the PS200 enters the Charge Pending (A) state. 2.2.6 VOLTAGE REGULATION STATE Voltage Regulation provides charging at a constant voltage while the charge current decreases (or tapers) to the user specified minimum current threshold (IMIN). There are three possible next states. When the charge current reaches the taper current threshold for End-Of-Charge (IMIN) and the battery’s voltage remains at the regulated voltage value (VREG), then the battery has reached the Charge Complete (G) state. If the battery exhibits any one of the following conditions, then the next state is Charge Suspend (C). - Battery voltage exceeds upper voltage limit for charging (VMAX) - Battery temperature exceeds upper temperature limit for charging (TMAXCHG) If the time in the Voltage Regulation state exceeds the time limit (tv), then the next state is Charge Suspend (C). If the battery pack is taken away (BATPRES = 0), then the PS200 enters the Charge Pending (A) state. 2.2.7 CHARGE CYCLE COMPLETE STATE The user specified minimum current threshold (IMIN) can be configured for various charging temperatures. At this threshold, charging is terminated and the End- Of-Charge state is reached. The PS200 can renew the charge cycle by entering the Charge Pending (A) state when: 1) the battery is removed (BATPRES = 0), or 2) if the battery’s voltage falls below the recharge threshold voltage (VRCHG). FIGURE 2-2: PS200 CHARGING PROFILE Time Precharge Battery Voltage Charge Current Current Regulation Voltage Regulation VREG IREG IMIN Voltage Current

© 2005 Microchip Technology Inc. DS21891B-page 9 PS200 2.3 KEELOQ® Algorithm The PS200 includes Microchip’s KEELOQ decoder algorithm. The KEELOQ code hopping technology is a worldwide standard providing a simple, yet highly secure, solution for authentication. Microchip’s battery management products include the KEELOQ algorithm to provide secure identification for rechargeable batteries. When the KEELOQ algorithm is enabled, the PS200 will issue a 32-bit challenge to the attached rechargeable battery. The battery, which also includes the KEELOQ decoder algorithm, will generate a response. See Microchip application note AN827 “Using KEELOQ® to Validate Subsystem Compatibility” (DS00827) for details on implementing a complete KEELOQ battery authentication system. 2.4 Lithium Configurable Parameters The PS200 device’s configurable parameters allow for flexible changes in designing battery chargers. The parameters are categorized as follows:

  • Configuration
  • Charging Limits - Precharge - Current Regulation - Voltage Regulation
  • LED Display Configuration Please refer to Table 2-1 “PS200 Lithium Configurable Parameters”. 2.4.1 CONFIGURATION PARAMETERS The configuration parameters provide an identity to the battery pack and provide its basic characteristics to the PS200. 2.4.2 CHARGING LIMITS 2.4.2.1 Precharge Parameters The Precharge parameters configure the charger’s operation during this initial battery charging phase. 2.4.2.2 Current Regulation Parameters The Current Regulation parameters configure the charger’s operation during this second battery charging phase. 2.4.2.3 Voltage Regulation Parameters The Voltage Regulation parameters configure the charger’s operation during this third battery charging phase. 2.4.3 LED DISPLAY CONFIGURATION The PS200 supports a two-LED charging state display. These LEDs can be configured to identify seven unique charger states:
  • Charge Pending – charger is waiting for battery pack that needs charge.
  • Charge Qualification – charger is determining if the battery pack can be safely charged.
  • Precharge – charger is charging the battery pack under the conditions configured for precharge.
  • Charge Suspend – charger has temporarily suspended charging the battery pack. This state is usually entered as a result of violating a maximum temperature requirement. Charging will resume when conditions are within required charging parameter values.
  • Current Regulation – charger is charging the battery pack with a constant current.
  • Voltage Regulation – charger is charging the battery pack at the constant target voltage.
  • Charge Complete – charger has completed charging the battery pack.

© 2005 Microchip Technology Inc. TABLE 2-1: PS200 LITHIUM CONFIGURABLE PARAMETERS Step 1 – Configuration Parameter Name Bytes Lower Limit Upper Limit Typical Value ASCII value. DevName N/A N/A PS200 ASCII value. SeriesCells 255 Number of series connected cells in the battery pack. Capacity (mAh) 65535 2000 Full-charge capacity of the battery pack. PWMFreq LUT value which determines the PWM frequency. Step 2 – Charging Limits Parameter Name Bytes Lower Limit Upper Limit Typical Value PCVMin (mV) 65535 2500 Minimum cell voltage required to enable charging with precharge conditions. PCVMax (mV) 65535 3000 Maximum cell voltage required to enable charging with precharge conditions. PCCurrent (mA) 65535 200 Charging current during precharge. PCTempMin 255 Minimum temperature required to enable charging with precharge conditions. PCTempMin value = (temperature °C * 10 + 200)/4; so typical value of 50 = 0°C. PCTempMax 255 175 Maximum temperature required to enable charging with precharge conditions. PCTempMax value = (temperature °C * 10 + 200)/4; so typical value of 175 = 50°C. PCTime (min) 255 Duration of precharge. CRVTarg (mV) 65535 4200 Target cell voltage in current regulation. This is set to the fully charged voltage of one cell, typically, as specified by the cell manufacturer. CRCurrent (mA) 65536 2000 Charging current during current regulation. CRTimeMax (min) 255 Current regulation time limit. VRVrech (mV) 65536 3780 Voltage regulation recharge cell voltage. Charger will automatically begin charging if cell voltage of pack falls below SeriesCells * VRVrech. VRIMin (mA) 65536 150 Voltage regulation fully charged current. This is the value of the taper current or IMIN which will determine that the battery is fully charged. VRTimeMax (min) 255 Voltage regulation time limit. TempMax 255 200 Maximum temperature required to enable charging during current regulation and voltage regulation. TempMax value = (temperature °C * 10 + 200)/4; so typical value of 200 = 60°C.

© 2005 Microchip Technology Inc. DS21891B-page 11 PS200 TABLE 2-1: PS200 LITHIUM CONFIGURABLE PARAMETERS (CONTINUED) Step 3 – LED Display Parameter Name Bytes Lower Limit Upper Limit Typical Value 0b00000000 LED1 display when charge is pending. LED2Pending N/A N/A 0b00000000 LED2 display when charge is pending. LED1Qual N/A N/A 0b00000000 LED1 display during charge qualification. LED2Qual N/A N/A 0b00000000 LED2 display during charge qualification. LED1PC N/A N/A 0b00000000 LED1 display during precharge. LED2PC N/A N/A 0b00000000 LED2 display during precharge. LED1Suspend N/A N/A 0b00000000 LED1 display when charge has been temporarily suspended. LED2Suspend N/A N/A 0b00000000 LED2 display when charge has been temporarily suspended. LED1CR N/A N/A 0b00000000 LED1 display during charge regulation. LED2CR N/A N/A 0b00000000 LED2 display during charge regulation. LED1VR N/A N/A 0b00000000 LED1 display during voltage regulation. LED2VR N/A N/A 0b00000000 LED2 display during voltage regulation. LED1Full N/A N/A 0b00000000 LED1 display when battery is fully charged. LED2Full N/A N/A 0b00000000 LED2 display when battery is fully charged. Miscellaneous Parameter Name Bytes Lower Limit Upper Limit Typical Value Pattern ID. BatIDMin 255 BATID input pin value minimum. BatIDMax 255 255 BATID input pin value maximum.

© 2005 Microchip Technology Inc. DS21891B-page 13 PS200 3.0 NICKEL CHEMISTRY ALGORITHM The PS200 algorithms for NiMH and NiCd chemistries are currently being developed. 4.0 LEAD ACID CHEMISTRY ALGORITHM The PS200 algorithms for lead acid chemistries are currently being developed.

© 2005 Microchip Technology Inc. NOTES:

© 2005 Microchip Technology Inc. DS21891B-page 15 PS200 5.0 ELECTRICAL SPECIFICATIONS Absolute Maximum Ratings† Note 1: Power dissipation is calculated as follows: PDIS = VDD x {IDD – ∑ IOH} + ∑ {(VDD – VOH) x IOH} + ∑(VOL x IOL). Total source current must not exceed the shunt regulator capacity. 5.1 Reliability Targets 5.2 Design Targets † NOTICE: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operation listings of this specification is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability. The device must be designed to target the following reliability specifications: ESD: ±4000V HBM ±400V MM all pins including VDD, VSS, RESET Latch-up: ±400 mA @ 125°C The AC/DC specifications included in the following sections are preliminary specifications that we intend to publish at product introduction. As the product matures, we intend to expand the specifications. Therefore, design should try and meet the following extended VDD/temperature targets: Frequency of operation: DC – 4 MHz, VDD = 2.0V – 5.5V, -40°C to 125°C Frequency of operation: DC – 20 MHz, VDD = 4.5V – 5.5V, -40°C to 125°C

© 2005 Microchip Technology Inc. 5.3 DC Characteristics 5.4 Shunt Regulator TABLE 5-1: SHUNT REGULATOR SPECIFICATIONS DC CHARACTERISTICS Standard Operating Conditions (unless otherwise stated) Operating temperature -40°C to +85°C Param No. Sym Characteristic Min Typ† Max Units Conditions D001B D001C VDD Supply Voltage 2.0 4.5 5.0 5.0 V V FOSC <= 4 MHz FOSC > 4 MHz D002 VDR RAM Data Retention Voltage(1) 1.5* V Device in Sleep mode D003 VPOR VDD Start Voltage to ensure internal Power-on Reset signal VSS V See section on Power-on Reset for details D004 SVDD VDD Rise Rate to ensure internal Power-on Reset signal 0.05* V/ms See section on Power-on Reset for details D005 VBOR VDD Voltage required to initiate a Brown-out Detect 2.1 V D010S IDD Supply Current(2) mA VDD and current are constant due to shunt regulator. D020 IPD Power-Down Current(3) 2.9 TBD nA VDD = 5.0V, WDT disabled Legend: TBD = To Be Determined These parameters are characterized but not tested. Data in “Typ” column is at 5.0V, 25°C unless otherwise stated. These parameters are for design guidance only and are not tested Note 1: This is the limit to which VDD can be lowered in Sleep mode without losing RAM data. The test conditions for all IDD measurements in active operation mode are: OSC1 = external square wave, from rail to rail; all I/O pins tri-stated, pulled to VDD; RESET = VDD. The power-down current in Sleep mode does not depend on the oscillator type. Power-down current is measured with the part in Sleep mode, with all I/O pins in high-impedance state and tied to VDD and VSS. Shunt Regulator Specifications Standard Operating Conditions (unless otherwise stated) Operating temperature -40°C to +125°C Characteristic Sym Min Typ Max Units Comments Shunt Voltage VSHUNT 4.75 5.25 Volts Shunt Current ISHUNT mA Shunt Resistance RSHUNT Ω Settling Time* TSETTLE 150 ns To 1% of final value Load Capacitance CLOAD 0.01 μF Bypass capacitor on VDD pin Regulator Operating Current ΔISNT 180 μA Includes band gap reference current These parameters are characterized but not tested. Note: The Δ current is the additional current consumed when this peripheral is enabled. This current should be added to the base IDD or IPD measurement.

© 2005 Microchip Technology Inc. DS21891B-page 17 PS200 5.5 DC Characteristics 5.6 DC Characteristics DC CHARACTERISTICS Standard Operating Conditions (unless otherwise stated) Operating temperature -40°C to +85°C Param No. Sym Characteristic Min Typ† Max Units Conditions VIL Input Low Voltage D032 RESET VSS

0.2 VDD

V 4.5V ≤ VDD ≤ 5.5V, otherwise entire range VIH Input High Voltage D042 RESET

0.8 VDD

V 4.5V ≤ VDD ≤ 5.5V, otherwise entire range IIL Input Leakage Current(2) D060A Analog inputs ±0.1 μA Vss ≤ VPIN ≤ VDD D061 RESET(1) μA Vss ≤ VPIN ≤ VDD Output Low Voltage D080 VOL Pins LED1, LED2, CTRLOUT, CHGOUT, HVOUT 0.6 V IOL = 8.5 mA, VDD = 4.5V Output High Voltage D090 VOH Pins LED1, LED2, CTRLOUT, CHGOUT, HVOUT VDD – 0.7 V IOH = -3.0 mA, VDD = 4.5V Data in “Typ” column is at 5.0V, 25°C unless otherwise stated. These parameters are for design guidance only and are not tested. Note 1: The leakage current on the RESET pin is strongly dependent on the applied voltage level. The specified levels represent normal operating conditions. Higher leakage current may be measured at different input voltages. Negative current is defined as current sourced by the pin. DC CHARACTERISTICS Standard Operating Conditions (unless otherwise stated) Operating temperature -40°C to +85°C Param No. Sym Characteristic Min Typ† Max Units Conditions Capacitive Loading Specs on Output Pins D101 CIO Pins LED1, LED2, CTRLOUT, CHGOUT, HVOUT 50* pF Data EEPROM Memory D120 ED Endurance 10M E/W 25°C at 5V D121 VDRW VDD for read/write VMIN 5.5 V VMIN = Minimum operating voltage D122 TDEW Erase/Write cycle time ms These parameters are characterized but not tested. Data in “Typ” column is at 5.0V, 25°C unless otherwise stated. These parameters are for design guidance only and are not tested.

© 2005 Microchip Technology Inc. 5.7 AC Characteristics: PS200 (Industrial) FIGURE 5-1: EXTERNAL CLOCK TIMING TABLE 5-2: EXTERNAL CLOCK TIMING REQUIREMENTS FOSC Param No. Sym Characteristic Min Typ† Max Units Conditions FOSC Oscillator Frequency(1) MHz Using PS200 internal oscillator TOSC Oscillator Period(1) 125 ns Using PS200 internal oscillator Data in “Typ” column is at 5 V, 25°C unless otherwise stated. These parameters are for design guidance only and are not tested.

© 2005 Microchip Technology Inc. DS21891B-page 19 PS200 FIGURE 5-2: CLKO AND I/O TIMING TABLE 5-3: CLKO AND I/O TIMING REQUIREMENTS FOSC LED1, LED2, 20, 21 Old Value New Value CTRLOUT, CHGOUT, HVOUT (input) LED1, LED2, CTRLOUT, CHGOUT, HVOUT (output) Param No. Sym Characteristic Min Typ† Max Units Conditions TosH2ioV FOSC ↑ (Q1 cycle) to Port Out Valid 150* ns 300 ns TosH2ioI FOSC ↑ (Q2 cycle) to Port Input Invalid (I/O in hold time) 100 ns TioV2osH Port Input Valid to FOSC ↑ (I/O in setup time) ns TioR Port Output Rise Time ns TioF Port Output Fall Time ns These parameters are characterized but not tested. Data in “Typ” column is at 5.0 V, 25°C unless otherwise stated.

© 2005 Microchip Technology Inc. DS21891B-page 21 PS200 TABLE 5-4: RESET, WATCHDOG TIMER, OSCILLATOR START-UP TIMER, POWER-UP TIMER AND BROWN-OUT DETECT REQUIREMENTS TABLE 5-5: PRECISION INTERNAL OSCILLATOR PARAMETERS Param No. Sym Characteristic Min Typ† Max Units Conditions TMCL RESET Pulse Width (low) μs ms VDD = 5V, -40°C to +85°C Extended temperature TOST Oscillation Start-up Timer Period

1024 TOSC

TOSC = FOSC period 33* TPWRT Power-up Timer Period (4 x TWDT) 28* TBD TBD 132* TBD ms ms VDD = 5V, -40°C to +85°C TIOZ I/O High-Impedance from RESET Low or Watchdog Timer Reset 2.0 μs BVDD Brown-out Detect Voltage 2.025 2.175 V BVHY Brown-out Hysteresis mV TBOR Brown-out Detect Pulse Width 100* μs VDD ≤ BVDD (D005) Legend: TBD = To Be Determined These parameters are characterized but not tested. Data in “Typ” column is at 5V, 25°C unless otherwise stated. These parameters are for design guidance only and are not tested. Param No. Sym Characteristic Freq Tolerance Min Typ† Max Units Conditions F10 FOSC Internal Calibrated INTOSC Frequency(1) ±1% 8.00 TBD MHz VDD and Temperature (TBD) ±2% 8.00 TBD MHz 2.5V ≤ VDD ≤ 5.5V 0°C ≤ TA ≤ +85°C ±5% 8.00 TBD MHz 2.0V ≤ VDD ≤ 5.5V -40°C ≤ TA ≤ +85°C (Ind.) -40°C ≤ TA ≤ +125°C (Ext.) F14 TIOSCST Oscillator Wake-up from Sleep Start-up Time* TBD TBD μs VDD = 2.0V, -40°C to +85°C TBD TBD μs VDD = 3.0V, -40°C to +85°C TBD TBD μs VDD = 5.0V, -40°C to +85°C Legend: TBD = To Be Determined Data in “Typ” column is at 5.0V, 25°C unless otherwise stated. These parameters are for design guidance only and are not tested. Note 1: To ensure these oscillator frequency tolerances, VDD and VSS must be capacitively decoupled as close to the device as possible. 0.1 μF and .01 μF values in parallel are recommended.

© 2005 Microchip Technology Inc. FIGURE 5-5: CTRLOUT TIMINGS (PIN 5) TABLE 5-6: CTRLOUT REQUIREMENTS CTRLOUT Param No. Sym Characteristic Min Typ† Max Units Conditions 53* TccR CTRLOUT Output Rise Time ns 54* TccF CTRLOUT Output Fall Time ns These parameters are characterized but not tested. Data in “Typ” column is at 5V, 25°C unless otherwise stated. Parameters are for design guidance only and are not tested.

© 2005 Microchip Technology Inc. DS21891B-page 23 PS200 5.8 Current Voltage Measurement Block TABLE 5-7: DC CHARACTERISTICS (PINS LOOPIN, CTRLIN, IFBINB, IFBINA INPUTS; PIN IFBOUT OUTPUT) TABLE 5-8: AC CHARACTERISTICS (PINS LOOPIN, CTRLIN, IFBINB, IFBINA INPUTS; PIN IFBOUT OUTPUT) DC CHARACTERISTICS Standard Operating Conditions (unless otherwise stated) VDD = 2.7V to 5.5V, TA = 25°C, VCM = VDD/2, RL = 100 kΩ to VDD/2 and VOUT ~ VDD/2 Operating Temperature -40°C to +85°C for Industrial Param No. Sym Parameters Min Typ Max Units Conditions 001 VOS Input Offset Voltage mV 002 003 IB IOS Input Current and Impedance Input Bias Current Input Offset Bias Current ±2* ±1* nA pA 004 005 VCM CMR Common Mode Common Mode Input Range Common Mode Rejection VSS TBD VDD – 1.4 V dB VDD = 5V VCM = VDD/2, Frequency = DC 006A 006B AOL AOL Open-Loop Gain DC Open-Loop Gain DC Open-Loop Gain dB dB No load Standard load 007 008 VOUT ISC Output Output Voltage Swing Output Short Circuit Current VSS + 50 VDD – 50 TBD mV mA TO VDD/2 (20 kΩ connected to VDD, 20 kΩ + 20 pF to VSS) 010 PSR Power Supply Power Supply Rejection dB Legend: TBD = To Be Determined These parameters are characterized but not tested. AC CHARACTERISTICS Standard Operating Conditions (unless otherwise stated) VDD = 2.7V to 5.5V, VSS = GND, TA = 25°C, VCM = VDD/2, RL = 100 kΩ to VDD/2 and VOUT = VDD/2 Operating Temperature -40°C to +85°C for Industrial Param No. Sym Parameters Min Typ Max Units Conditions 011 GBWP Gain Bandwidth Product MHz VDD = 5V 012 TON Turn-on Time TBD μs VDD = 5V 013 ΘM Phase Margin degrees VDD = 5V 014 SR Slew Rate TBD V/μs VDD = 5V Legend: TBD = To Be Determined

© 2005 Microchip Technology Inc. TABLE 5-9: COMPARATOR SPECIFICATIONS (PINS LOOPFBK, CHGFBK, SHDN, VOVP) TABLE 5-10: COMPARATOR VOLTAGE REFERENCE (VREF) SPECIFICATIONS Comparator Specifications Standard Operating Conditions (unless otherwise stated) Operating temperature Param No. Symbol Characteristics Min Typ Max Units Comments C01 VOS Input Offset Voltage ± 2 ± 5 mV C02 VCM Input Common Mode Voltage VDD – 1.5 V C03 ILC Input Leakage Current 200* nA C04 CMRR Common Mode Rejection Ratio +70* dB C05 TRT Response Time(1) 20* 40* ns ns Internal Output to pin These parameters are characterized but not tested. Note 1: Response time measured with one comparator input at (VDD – 1.5)/2, while the other input transitions from VSS to VDD – 1.5V. Comparator Voltage Reference Specifications Standard Operating Conditions (unless otherwise stated) Operating temperature Param No. Symbol Characteristics Min Typ Max Units Comments CV01 CVRES Resolution VDD/24* VDD/32 LSb LSb Low Range (VRR = 1) High Range (VRR = 0) CV02 Absolute Accuracy ±1/4* ±1/2* LSb LSb Low Range (VRR = 1) High Range (VRR = 0) CV03 Unit Resistor Value (R) 2K* Ω CV04 Settling Time(1) 10* μs These parameters are characterized but not tested. Note 1: Settling time measured while VRR = 1 and VR<3:0> transitions from 0000 to 1111.

© 2005 Microchip Technology Inc. DS21891B-page 25 PS200 TABLE 5-11: A/D CONVERTER CHARACTERISTICS FIGURE 5-6: A/D CONVERSION TIMING (NORMAL MODE) Param No. Sym Characteristic Min Typ† Max Units Conditions A01 NR Resolution 10 bits bit A02 EABS Total Absolute Error*(1) LSb VREF = 5.0V A03 EIL Integral Error LSb VREF = 5.0V A04 EDL Differential Error LSb No missing codes to 10 bits, VREF = 5.0V A05 EFS Full-Scale Range 2.2* 5.5* V A06 EOFF Offset Error LSb VREF = 5.0V A07 EGN Gain Error LSb VREF = 5.0V A10 Monotonicity guaranteed(2) VSS ≤ VAIN ≤ VREF A20 A20A VREF Reference Voltage 2.2(4) 2.5 VDD + 0.3 V Absolute minimum to ensure 10-bit accuracy A25 VAIN Analog Input Voltage VSS VREF(5) V A30 ZAIN Recommended Impedance of Analog Voltage Source kΩ A50 IREF VREF Input Current*(3) 1000 μA μA During VAIN acquisition. Based on differential of VHOLD to VAIN. During A/D conversion cycle. These parameters are characterized but not tested. Data in ‘Typ’ column is at 5.0V, 25°C unless otherwise stated. These parameters are for design guidance only and are not tested. Note 1: Total Absolute Error includes Integral, Differential, Offset and Gain Errors. The A/D conversion result never decreases with an increase in the input voltage and has no missing codes. VREF current is from external VREF or VDD pin, whichever is selected as reference input. Analog input voltages are allowed up to VDD, however, the conversion accuracy is limited to VSS to VREF. 131 130 132 A/D CLK A/D DATA ADRES ADIF GO SAMPLE OLD_DATA SAMPLING STOPPED DONE NEW_DATA Note 1: If the A/D clock source is selected as RC, a time of TCY is added before the A/D clock starts. This allows the SLEEP instruction to be executed. 1/2 TCY 134

© 2005 Microchip Technology Inc. TABLE 5-12: A/D CONVERSION REQUIREMENTS FIGURE 5-7: A/D CONVERSION TIMING (SLEEP MODE) Param No. Sym Characteristic Min Typ† Max Units Conditions 130* TAD A/D Clock Period 1.6 μs TOSC based, VREF ≥ 2.5V 3.0* μs TOSC based, VREF full range 130* TAD A/D Internal RC Oscillator Period 3.0* 6.0 9.0* μs ADCS<1:0> = 11 (RC mode) At VDD = 2.5V 2.0* 4.0 6.0* μs At VDD = 5.0V 131* TCNV Conversion Time (not including acquisition time)(1)

11 TAD

132* TACQ Acquisition Time 11.5 μs μs The minimum time is the amplifier settling time. This may be used if the “new” input voltage has not changed by more than 1 LSb (i.e., 1 mV @ 4.096V) from the last sampled voltage (as stated on CHOLD). 134* TGO Q4 to A/D Clock Start TOSC/2 If the A/D clock source is selected as RC, a time of TCY is added before the A/D clock starts. This allows the SLEEP instruction to be executed. These parameters are characterized but not tested. Data in “Typ” column is at 5V, 25°C unless otherwise stated. These parameters are for design guidance only and are not tested. Note 1: ADRES register may be read on the following TCY cycle. 131 130 A/D CLK A/D DATA ADRES ADIF GO SAMPLE OLD_DATA SAMPLING STOPPED DONE NEW_DATA Note 1: If the A/D clock source is selected as RC, a time of TCY is added before the A/D clock starts. This allows the SLEEP instruction to be executed. 134 132

© 2005 Microchip Technology Inc. DS21891B-page 27 PS200 6.0 PACKAGING INFORMATION 6.1 Package Marking Information 20-Lead PDIP XXXXXXXXXXXXXXXXX XXXXXXXXXXXXXXXXX YYWWNNN Example PS200-I/P 0510017 20-Lead SOIC XXXXXXXXXXXXXX XXXXXXXXXXXXXX XXXXXXXXXXXXXX YYWWNNN Example PS200/SO 0510017 20-Lead SSOP XXXXXXXXXXX XXXXXXXXXXX YYWWNNN Example PS200/SS 0510017 Legend: XX...X Customer-specific information Y Year code (last digit of calendar year) YY Year code (last 2 digits of calendar year) WW Week code (week of January 1 is week ‘01’) NNN Alphanumeric traceability code Pb-free JEDEC designator for Matte Tin (Sn) This package is Pb-free. The Pb-free JEDEC designator ( ) can be found on the outer packaging for this package. Note: In the event the full Microchip part number cannot be marked on one line, it will be carried over to the next line, thus limiting the number of available characters for customer-specific information. e e e e e

© 2005 Microchip Technology Inc. 6.2 Package Details The following sections give the technical details of the packages. 20-Lead Plastic Dual In-line (P) – 300 mil Body (PDIP) β Mold Draft Angle Bottom α Mold Draft Angle Top 10.92 9.40 7.87 .430 .370 .310 eB Overall Row Spacing 0.56 0.46 0.36 .022 .018 .014 B Lower Lead Width 1.65 1.52 1.40 .065 .060 .055 Upper Lead Width 0.38 0.29 0.20 .015 .012 .008 c Lead Thickness 3.56 3.30 3.05 .140 .130 .120 L Tip to Seating Plane 26.42 26.24 26.04 1.040 1.033 1.025 D Overall Length 6.60 6.35 6.10 .260 .250 .240 Molded Package Width 8.26 7.87 7.49 .325 .310 .295 E Shoulder to Shoulder Width 0.38 .015 Base to Seating Plane 3.68 3.30 2.92 .145 .130 .115 Molded Package Thickness 4.32 3.94 3.56 .170 .155 .140 A Top to Seating Plane 2.54 .100 p Pitch n Number of Pins MAX NOM MIN MAX NOM MIN Dimension Limits MILLIMETERS INCHES* Units D n c β eB E α p L B A * Controlling Parameter Notes: Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010” (0.254mm) per side. JEDEC Equivalent: MS-001 Drawing No. C04-019 § Significant Characteristic

© 2005 Microchip Technology Inc. DS21891B-page 29 PS200 20-Lead Plastic Small Outline (SO) – Wide, 300 mil Body (SOIC) * Controlling Parameter Notes: Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010” (0.254mm) per side. JEDEC Equivalent: MS-013 Drawing No. C04-094 Foot Angle φ β Mold Draft Angle Bottom α Mold Draft Angle Top 0.51 0.42 0.36 .020 .017 .014 B Lead Width 0.33 0.28 0.23 .013 .011 .009 c Lead Thickness 1.27 0.84 0.41 .050 .033 .016 L Foot Length 0.74 0.50 0.25 .029 .020 .010 h Chamfer Distance 13.00 12.80 12.60 .512 .504 .496 D Overall Length 7.59 7.49 7.39 .299 .295 .291 Molded Package Width 10.67 10.34 10.01 .420 .407 .394 E Overall Width 0.30 0.20 0.10 .012 .008 .004 Standoff 2.39 2.31 2.24 .094 .091 .088 Molded Package Thickness 2.64 2.50 2.36 .104 .099 .093 A Overall Height 1.27 .050 p Pitch n Number of Pins MAX NOM MIN MAX NOM MIN Dimension Limits MILLIMETERS INCHES* Units h L c β 45° φ D p n B E α A § Significant Characteristic

© 2005 Microchip Technology Inc. 20-Lead Plastic Shrink Small Outline (SS) – 209 mil Body, 5.30 mm (SSOP) 0.38 0.22 .015 .009 B Lead Width f Foot Angle 0.25 0.09 .010 .004 c Lead Thickness 0.95 0.75 0.55 .037 .030 .022 L Foot Length 7.50 7.20 .295 .289 .283 .272 D Overall Length 5.60 5.30 5.00 .220 .209 .197 Molded Package Width 8.20 7.80 7.40 .323 .307 .291 E Overall Width 0.05 .002 Standoff 1.85 1.75 1.65 .073 .069 .065 Molded Package Thickness 2.00 .079 A Overall Height 0.65 .026 p Pitch n Number of Pins MAX NOM MIN MAX NOM MIN Dimension Limits MILLIMETERS* INCHES Units D p n B E L c f A shall not exceed .010" (0.254mm) per side. Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions Notes: JEDEC Equivalent: MO-150 Drawing No. C04-072 *Controlling Parameter Revised 11/03/03

© 2005 Microchip Technology Inc. DS21891B-page 31 PS200 THE MICROCHIP WEB SITE Microchip provides online support via our WWW site at www.microchip.com. This web site is used as a means to make files and information easily available to customers. Accessible by using your favorite Internet browser, the web site contains the following information:

  • Product Support – Data sheets and errata, application notes and sample programs, design resources, user’s guides and hardware support documents, latest software releases and archived software
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  • Distributor or Representative
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  • Development Systems Information Line Customers should contact their distributor, representative or field application engineer (FAE) for support. Local sales offices are also available to help customers. A listing of sales offices and locations is included in the back of this document. Technical support is available through the web site at: http://support.microchip.com In addition, there is a Development Systems Information Line which lists the latest versions of Microchip’s development systems software products. This line also provides information on how customers can receive currently available upgrade kits. The Development Systems Information Line numbers are: 1-800-755-2345 – United States and most of Canada 1-480-792-7302 – Other International Locations

© 2005 Microchip Technology Inc. READER RESPONSE It is our intention to provide you with the best documentation possible to ensure successful use of your Microchip prod- uct. If you wish to provide your comments on organization, clarity, subject matter, and ways in which our documentation can better serve you, please FAX your comments to the Technical Publications Manager at (480) 792-4150. Please list the following information, and use this outline to provide us with your comments about this document. To: Technical Publications Manager RE: Reader Response From: Name Company Address City / State / ZIP / Country Application (optional): Would you like a reply? Y N Device: Literature Number: Questions: DS21891B PS200 What are the best features of this document? How does this document meet your hardware and software development needs? Do you find the organization of this document easy to follow? If not, why? What additions to the document do you think would enhance the structure and subject? What deletions from the document could be made without affecting the overall usefulness? Is there any incorrect or misleading information (what and where)? How would you improve this document?

© 2005 Microchip Technology Inc. DS21891B-page 33 PS200 PRODUCT IDENTIFICATION SYSTEM To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office. PART NO. X /XX XXX Pattern Package Temperature Range Device Device PS200 Temperature Range I = -20°C to +85°C (Industrial) Package P PDIP SO SOIC SS SSOP Examples: PS200-I/SO = Industrial Temperature, SOIC package PS200-I/SS = Industrial Temperature, SSOP package PS200-I/P = Industrial Temperature, PDIP package

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