PMN38EN PHILIPS
Document overview
- Manufacturer or author: Provided By www.digicamel.com(FREE DATASHEET DOWNLOAD SITE)
- PDF pages: 12
Technical content
- Product profile
1.1 General description
Logic level N-channel enhancement mode Field-Effect Transistor (FET) in a plastic package using TrenchMOS technology.
1.2 Features
1.3 Applications
1.4 Quick reference data
- Pinning information PMN38EN N-channel TrenchMOS logic level FET Rev. 01 — 13 January 2006 Product data sheet ■ Logic level threshold ■ Very fast switching ■ Low threshold voltage ■ Surface-mounted package ■ Battery powered motor control ■ Load switch in notebook computers ■ High-speed switch in set top box power supplies ■ Driver FET in DC-to-DC converters ■ VDS ≤ 30 V ■ ID ≤ 5.4 A ■ R DSon ≤ 38 mΩ ■ Ptot≤ 1.75 W Table 1: Pinning Pin Description Simplified outline Symbol 1, 2, 5, 6 drain (D) SOT457 (TSOP6) 3 gate (G) 4 source (S) 13 2 456 S D G mbb076
PMN38EN_1 © Koninklijke Philips Electronics N.V. 2006. All rights reserved. Product data sheet Rev. 01 — 13 January 2006 2 of 12 Philips Semiconductors PMN38EN N-channel TrenchMOS logic level FET 3. Ordering information 4. Limiting values Table 2: Ordering information Type number Package Name Description Version PMN38EN TSOP6 plastic surface mounted package (TSOP6); 6 leads SOT457 Table 3: Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter Conditions Min Max Unit VDS drain-source voltage 25 °C ≤ Tj≤ 150 °C - 30 V VGS gate-source voltage - ±20 V ID drain current T sp =2 5°C; VGS = 10 V; seeFigure2 and 3 - 5.4 A Tsp = 100°C; VGS = 10 V; seeFigure2 - 3.4 A IDM peak drain current T sp =2 5°C; pulsed; tp ≤ 10 µs; seeFigure3 - 21.6 A Ptot total power dissipation T sp =2 5°C; seeFigure1 - 1.75 W Tstg storage temperature −55 +150 °C Tj junction temperature −55 +150 °C Source-drain diode I S source current T sp =2 5°C - 1.45 A ISM peak source current T sp =2 5°C; pulsed; tp ≤ 10 µs - 5.80 A
PMN38EN_1 © Koninklijke Philips Electronics N.V. 2006. All rights reserved. Product data sheet Rev. 01 — 13 January 2006 3 of 12 Philips Semiconductors PMN38EN N-channel TrenchMOS logic level FET Fig 1. Normalized total power dissipation as a function of solder point temperature Fig 2. Normalized continuous drain current as a function of solder point temperature Tsp =2 5°C; IDM is single pulse Fig 3. Safe operating area; continuous and peak drain currents as a function of drain-source voltage 03aa17 120 0 50 100 150 200 Tsp (°C) Pder (%) 03aa25 120 0 50 100 150 200 Tsp (°C) Ider (%) P der P tot P tot 25 C°() ID I D2 5 C°() 003aab227 10-2 10-1 102 10-1 1 10 10 2 VDS (V) ID (A) DC 10 ms Limit RDSon = VDS / ID 1 ms tp = 10 µ s 100 ms 100 µ s
PMN38EN_1 © Koninklijke Philips Electronics N.V. 2006. All rights reserved. Product data sheet Rev. 01 — 13 January 2006 4 of 12 Philips Semiconductors PMN38EN N-channel TrenchMOS logic level FET 5. Thermal characteristics [1] Mounted on a metal clad board Table 4: Thermal characteristics Symbol Parameter Conditions Min Typ Max Unit R th(j-sp) thermal resistance from junction to solder point seeFigure4 [1] --7 0 K / W Fig 4. Transient thermal impedance from junction to solder point as a function of pulse duration 03aj69 102 10-4 10-3 10-2 10-1 1 10 10 2 tp (s) Zth(j-sp) (K/W) single pulse δ = 0.5 0.2 0.1 0.05 0.02 tp T P t tp Tδ =
PMN38EN_1 © Koninklijke Philips Electronics N.V. 2006. All rights reserved. Product data sheet Rev. 01 — 13 January 2006 5 of 12 Philips Semiconductors PMN38EN N-channel TrenchMOS logic level FET 6. Characteristics Table 5: Characteristics Tj=2 5°C unless otherwise specified. Symbol Parameter Conditions Min Typ Max Unit Static characteristics V (BR)DSS drain-source breakdown voltage ID = 250µA; VGS =0V Tj=2 5°C 3 0 --V Tj= −55 °C 2 7 --V VGS(th) gate-source threshold voltage ID = 1 mA; VDS =V GS ; seeFigure9 and10 Tj=2 5°C 1 1.5 2 V IDSS drain leakage current V DS =3 0V ; VGS =0V Tj=2 5°C - 0.01 1.0 µA Tj= 150°C --1 0 µA IGSS gate leakage current V GS = ±20 V; VDS = 0 V - 10 100 nA R DSon drain-source on-state resistance VGS = 10 V; ID = 3 A; seeFigure6 and 8 Tj=2 5°C - 31 38 m Ω Tj= 150°C - 49.6 60.9 m Ω VGS = 4.5 V; ID = 2.8 A; seeFigure6 and 8 - 3 84 6m Ω Dynamic characteristics Q G(tot) total gate charge ID = 5 A; VDS = 15 V; VGS = 4.5 V; see Figure11 and 12 - 6.1 - nC Q GS gate-source charge - 1.7 - nC Q GD gate-drain charge - 2.35 - nC C iss input capacitance V GS =0V ; VDS = 25 V; f = 1 MHz; see Figure14 - 495 - pF C oss output capacitance - 100 - pF C rss reverse transfer capacitance - 70 - pF td(on) turn-on delay time V DS =1 5V ; RL =1 2Ω ; VGS = 4.5 V; RG =6 Ω -1 4 -n s tr rise time -1 9 -n s td(off) turn-off delay time - 28 - ns tf fall time -1 6 -n s Source-drain diode V SD source-drain voltage I S = 1.7 A; VGS = 0 V; seeFigure13 - 0.75 1.2 V
PMN38EN_1 © Koninklijke Philips Electronics N.V. 2006. All rights reserved. Product data sheet Rev. 01 — 13 January 2006 6 of 12 Philips Semiconductors PMN38EN N-channel TrenchMOS logic level FET Tj=2 5°CT j=2 5°C Fig 5. Output characteristics: drain current as a function of drain-source voltage; typical values Fig 6. Drain-source on-state resistance as a function of drain current; typical values Tj=2 5°C and 150°C; VDS >ID × R DSon Fig 7. Transfer characteristics: drain current as a function of gate-source voltage; typical values Fig 8. Normalized drain-source on-state resistance factor as a function of junction temperature 003aab228 0 0.2 0.4 0.6 0.8 1 VDS (V) ID (A) 2.7 2.5 4.5 3.96 3.5 3.1 2.9 2.3 VGS (V) = 2.1 003aab229 0 5 10 15 20 ID (A) R DSon (mΩ ) Tj = 25 °C 3.5 4.5 3.9 VGS (V) = 3.1 03aj73 01234 VGS (V) ID (A) Tj = 150 °C 25 °C 03af18 0.5 1.5 -60 0 60 120 180 Tj (°C) a a R DSon R DSon 25 C°()
PMN38EN_1 © Koninklijke Philips Electronics N.V. 2006. All rights reserved. Product data sheet Rev. 01 — 13 January 2006 7 of 12 Philips Semiconductors PMN38EN N-channel TrenchMOS logic level FET ID = 1 mA; VDS =V GS Tj=2 5°C; VDS =5V Fig 9. Gate-source threshold voltage as a function of junction temperature Fig 10. Sub-threshold drain current as a function of gate-source voltage ID = 5 A; VDS =1 5V Fig 11. Gate-source voltage as a function of gate charge; typical values Fig 12. Gate charge waveform definitions 03aa33 0.5 1.5 2.5 -60 0 60 120 180 Tj (°C) VGS(th) (V) max typ min 03aa36 10-6 10-5 10-4 10-3 10-2 10-1 0123 VGS (V) ID (A) maxtypmin 03aj76 0 5 10 15 Q G (nC) VGS (V) ID = 5 A Tj = 25 °C VDS = 15 V 003aaa508 VGS VGS(th) Q GS1 Q GS2 Q GD VDS Q G(tot) ID Q GS VGS(pl)
PMN38EN_1 © Koninklijke Philips Electronics N.V. 2006. All rights reserved. Product data sheet Rev. 01 — 13 January 2006 8 of 12 Philips Semiconductors PMN38EN N-channel TrenchMOS logic level FET Tj=2 5°C and 150°C; VGS =0V V GS = 0 V; f = 1 MHz Fig 13. Source current as a function of source-drain voltage; typical values Fig 14. Input, output and reverse transfer capacitances as a function of drain-source voltage; typical values 03aj74 00 . 511 . 5 VSD (V) IS (A) Tj = 25 °C150 °C VGS = 0 V 03aj75 102 103 10-1 1 10 10 2 VDS (V) C (pF) C iss C oss C rss
PMN38EN_1 © Koninklijke Philips Electronics N.V. 2006. All rights reserved. Product data sheet Rev. 01 — 13 January 2006 9 of 12 Philips Semiconductors PMN38EN N-channel TrenchMOS logic level FET 7. Package outline Fig 15. Package outline SOT457 (TSOP6) REFERENCESOUTLINE VERSION EUROPEAN PROJECTION ISSUE DATE IEC JEDEC JEITA SOT457 SC-74 wB Mbp D e pin 1 index A Lp Q detail X H E E v M A AB y scale c X 13 2 456 0 1 2 mm Plastic surface mounted package (TSOP6); 6 leads SOT457 UNIT A 1 bp cD E H E Lp Qy wv mm 0.1 0.013 0.40 0.25 3.1 2.7 0.26 0.10 1.7 1.3 e 0.95 3.0 2.5 0.2 0.10.2 DIMENSIONS (mm are the original dimensions) 0.6 0.2 0.33 0.23 A 1.1 0.9 04-11-08 05-11-07
PMN38EN_1 © Koninklijke Philips Electronics N.V. 2006. All rights reserved. Product data sheet Rev. 01 — 13 January 2006 10 of 12 Philips Semiconductors PMN38EN N-channel TrenchMOS logic level FET 8. Revision history Table 6: Revision history Document ID Release date Data sheet status Change notice Doc. number Supersedes PMN38EN_1 20060113 Product data sheet - - -
Philips Semiconductors PMN38EN N-channel TrenchMOS logic level FET PMN38EN_1 © Koninklijke Philips Electronics N.V. 2006. All rights reserved. Product data sheet Rev. 01 — 13 January 2006 11 of 12 9. Data sheet status [1] Please consult the most recently issued data sheet before initiating or completing a design. [2] The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com. [3] For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status. 10. Definitions Short-form specification —The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. 11. Disclaimers Life support —These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes —Philips Semiconductors reserves the right to make changes in the products - including circuits, standard cells, and/or software - described or contained herein in order to improve design and/or performance. When the product is in full production (status ‘Production’), relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN). Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. 12. Trademarks Notice —All referenced brands, product names, service names and trademarks are the property of their respective owners. TrenchMOS — is a trademark of Koninklijke Philips Electronics N.V. 13. Contact information For additional information, please visit: http://www.semiconductors.philips.com For sales office addresses, send an email to: sales.addresses@www.semiconductors.philips.com Level Data sheet status[1] Product status[2][3] Definition I Objective data Development This data sheet contains data from the objective specification for product development. Philips Semiconductors reserves the right to change the specification in any manner without notice. II Preliminary data Qualification This data sheet contains data from the preliminary specification. Supplementary data will be published at a later date. Philips Semiconductors reserves the right to change the specification without notice, in order to improve the design and supply the best possible product. III Product data Production This data sheet contains data from the product specification. Philips Semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. Relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN).
© Koninklijke Philips Electronics N.V. 2006 All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Date of release: 13 January 2006 Document number: PMN38EN_1 Published in The Netherlands Philips Semiconductors PMN38EN N-channel TrenchMOS logic level FET 14. Contents