PMCS1133A1AQDVGR

TMCS1133_V02 TI | Alldatasheet

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Technical content

TMCS1133 Precision 1MHz Hall-Effect Current Sensor With Reinforced Isolation Working Voltage, Overcurrent Detection and Ambient Field Rejection

1 Features

• High continuous current capability: 80ARMS
• Robust reinforced isolation
• High accuracy – Sensitivity error: ±0.1% – Sensitivity thermal drift: ±20ppm/°C – Sensitivity lifetime drift: ±0.2% – Offset error: ±0.2mV – Offset thermal drift: ±10μV/°C – Offset lifetime drift: ±0.2mV – Non-linearity: ±0.1%
• High immunity to external magnetic fields
• Fast Response – Signal bandwidth: 1MHz – Response time: 120ns – Propagation delay: 50ns – Overcurrent detection response: 100ns
• Operating supply range: 3V to 5.5V
• Bidirectional and unidirectional current sensing
• Multiple sensitivity options: – Ranging from 20mV/A to 150mV/A
• Safety related certifications (planned) – UL 1577 Component Recognition Program – IEC/CB 62368-1

2 Applications

• Solar Energy
• EV charging
• Power supplies
• Industrial AC/DC

3 Description

The TMCS1133 is a galvanically isolated Hall-effect current sensor with industry leading isolation and accuracy. An output voltage proportional to the input current is provided with excellent linearity and low drift at all sensitivity options. Precision signal conditioning circuitry with built-in drift compensation is capable of less than 1.4% maximum sensitivity error over temperature and lifetime with no system level calibration, or less than 0.9% maximum sensitivity error including both lifetime and temperature drift with a one-time calibration at room temperature. AC or DC input current flows through an internal conductor generating a magnetic field measured by integrated, on-chip, Hall-effect sensors. Core- less construction eliminates the need for magnetic concentrators. Differential Hall sensors reject interference from stray external magnetic fields. Low conductor resistance increases measurable current ranges up to ± 96A while minimizing power loss and easing thermal dissipation requirements. Insulation capable of withstanding 5kV RMS, coupled with a minimum of 8mm creepage and clearance, provides high levels of reliable lifetime reinforced working voltage. Integrated shielding enables excellent common-mode rejection and transient immunity. Fixed sensitivity allows the device to operate from a single 3V to 5.5V power supply, eliminating ratiometry errors and improving supply noise rejection.

Package Information

PART NUMBER PACKAGE(1) PACKAGE SIZE(2) TMCS1133 DVG (SOIC, 10) 10.3mm × 10.3mm (1) For all available packages, see Section 12. (2) The package size (length × width) is a nominal value and includes pins, where applicable. Bridge DriverPassive / PFC Rectifier DC V+ AC DC V– Controller Current Sense LoadsTMCS1133 TMCS1133 TMCS1133 Control ControlCurrent Sense Current SenseOC OCOC Typical Application TMCS1133 SBOSAG0B – OCTOBER 2023 – REVISED AUGUST 2024 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA.

10.4 Receiving Notification of Documentation Updates..31

12 Mechanical, Packaging, and Orderable

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4 Device Comparison

Table 4-1. Device Comparison PRODUCT(3) SENSITIVITY ZERO CURRENT OUTPUT VOLTAGE IIN LINEAR MEASUREMENT RANGE(1) VS = 5V VS = 3.3V TMCS1133A1A 25mV/A 2.5V TMCS1133A2A 50mV/A ±48A(2) –48A to 14A(2) TMCS1133A3A 75mV/A ±32A –32A to 9.3A TMCS1133A4A 100mV/A ±24A –24A to 7A TMCS1133A5A 150mV/A ±16A –16A to 4.7A TMCS1133B7A 20mV/A 1.65V TMCS1133B1A 25mV/A –62A to 130A(2) ±62A(2) TMCS1133B8A 33mV/A –47A to 98.5A(2) ±47A(2) TMCS1133B2A 50mV/A –31A to 65A(2) ±31A TMCS1133B3A 75mV/A –20.7A to 43.3A(2) ±20.7A TMCS1133B4A 100mV/A –15.5A to 32.5A ±15.5A TMCS1133B5A 150mV/A –10.3A to 21.7A ±10.3A TMCS1133C1A 25mV/A 0.33V –9.2A to 183A(2) –9.2A to 115A(2) TMCS1133C2A 50mV/A –4.6A to 91.4A(2) –4.6A to 57.4A(2) TMCS1133C9A 66mV/A –3.4A to 69.2A(2) –3.4A to 43.4A(2) TMCS1133C3A 75mV/A –3.1A to 60.9A(2) –3.1A to 38.3A(2) TMCS1133C4A 100mV/A –2.3A to 45.7A(2) –2.3A to 28.7A TMCS1133C5A 150mV/A –1.5A to 30.5A –1.5A to 19.1A (1) Linear range limited by the maximum output swing to power supply (3V to 5.5V) and ground, not by thermal limitations. (2) Current levels must remain below both allowable continuous DC/RMS and transient peak current safe operating areas to not exceed device thermal limits. See the Safe Operating Area section. (3) For more information on the device name and device options, see the Device Nomenclature section. www.ti.com TMCS1133 SBOSAG0B – OCTOBER 2023 – REVISED AUGUST 2024 Copyright © 2024 Texas Instruments Incorporated Submit Document Feedback 3 Product Folder Links: TMCS1133

5 Pin Configuration and Functions

6 VOUT

4 ALERT

3 GND

Figure 5-1. DVG Package 10-Pin SOIC Top View Table 5-1. Pin Functions PIN TYPE DESCRIPTION NO. NAME

1 IN+ Analog Input Input current positive pin

2 IN– Analog Input Input current negative pin

3 GND Analog Ground

4 ALERT Digital Output Sensor diagnostics PWM output, open-drain active low. Connect pin to GND if not used. 5 NC - Reserved. Pin can be connected to GND or left floating.

6 VOUT Analog Output Output voltage

7 OC Digital Output Overcurrent output, open-drain active low. Connect pin to GND if not used. 8 VOC Analog Input Overcurrent threshold. Sets overcurrent threshold. Connect pin to VS if not used.

9 VS Analog Power supply

10 VS Analog Power supply

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6 Specifications

6.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)(1) MIN MAX UNIT Supply voltage VS GND – 0.3 6 V Analog input VOC GND – 0.3 (VS) + 0.3 V Analog output VOUT Digital output ALERT, OC No Connection NC Junction temperature TJ –65 165 °C Storage temperature Tstg –65 165 °C (1) Operation outside the Absolute Maximum Ratings may cause permanent device damage. Absolute Maximum Ratings do not imply functional operation of the device at these or any other conditions beyond those listed under Recommended Operating Conditions. If used outside the Recommended Operating Conditions but within the Absolute Maximum Ratings, the device may not be fully functional, and this may affect device reliability, functionality, performance, and shorten the device lifetime.

6.2 ESD Ratings

V(ESD) Electrostatic discharge Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) ±4000 V Charged-device model (CDM), per ANSI/ESDA/JEDEC JS-002(2) ±1000 (1) JEDEC document JEP155 states that 500V HBM allows safe manufacturing with a standard ESD control process. (2) JEDEC document JEP157 states that 250V CDM allows safe manufacturing with a standard ESD control process.

6.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted) MIN NOM MAX UNIT VS Operating supply voltage 3 5 5.5 V TA (1) Operating free-air temperature –40 125 °C (1) Input current safe operating area is constrained by junction temperature. Recommended condition based on use with the TMCS1133xEVM. Input current rating is derated for elevated ambient temperatures.

6.4 Thermal Information

THERMAL METRIC(1) TMCS1133(2) UNITDVG (SOIC-W-10)

10 PINS

RθJA Junction-to-ambient thermal resistance 27.9 °C/W RθJC(top) Junction-to-case (top) thermal resistance 26.8 RθJB Junction-to-board thermal resistance 10.1 ΨJT Junction-to-top characterization parameter 4.4 ΨJB Junction-to-board characterization parameter 8.3 (1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application note. (2) Applies when device is mounted on the TMCS1133xEVM. For more details, see the Safe Operating Area section. www.ti.com TMCS1133 SBOSAG0B – OCTOBER 2023 – REVISED AUGUST 2024 Copyright © 2024 Texas Instruments Incorporated Submit Document Feedback 5 Product Folder Links: TMCS1133

6.5 Insulation Specifications

PARAMETER TEST CONDITIONS VALUE UNIT GENERAL CLR External clearance(1) Shortest terminal-to-terminal distance through air ≥ 8 mm CPG External creepage(1) Shortest terminal-to-terminal distance across the package surface ≥ 8 mm CTI Comparative tracking index DIN EN 60112; IEC 60112 ≥ 600 V Material group According to IEC 60664-1 I Overvoltage category per IEC 60664-1 Rated mains voltage ≤ 600VRMS I-IV VIORM Maximum repetitive peak isolation voltage AC voltage (bipolar) 1344 VPK VIOWM Maximum reinforced isolation working voltage AC voltage (sine wave)

600 VRMS

849 VDC

Maximum basic isolation working voltage AC voltage (sine wave)

950 VRMS

1344 VDC

VIOTM Maximum transient isolation voltage VTEST = √2 x VISO, t = 60s (qualification); VTEST = 1.2 × VIOTM, t = 1s (100% production) 7071 VPK VIOSM Maximum surge isolation voltage(2) Test method per IEC 62368-1, 1.2/50µs waveform, VTEST = 1.3 × VIOSM (qualification) 10000 VPK qpd Apparent charge(3) Method b1: At routine test (100% production) and preconditioning (type test), Vini = 1.2 × VIOTM, tini = 1s; Vpd(m) = 1.875 × VIORM, tm = 1s ≤5 pC CIO Barrier capacitance, input to output(4) VIO = 0.4 sin (2πft), f = 1MHz 0.6 pF RIO Isolation resistance, input to output(4) VIO = 500V, TA = 25°C > 1012 Ω VIO = 500V, 100°C ≤ TA ≤ 125°C > 1011 Ω VIO = 500V at TS = 150°C > 109 Ω Pollution degree 2 UL 1577 VISO Withstand isolation voltage VTEST = VISO, t = 60s (qualification); VTEST = 1.2 × VISO, t = 1s (100% production) 5000 VRMS (1) Apply creepage and clearance requirements according to the specific equipment isolation standards of an application. Take care to maintain the creepage and clearance distance of the board design to make sure that the mounting pads of the isolator on the printed-circuit board do not reduce this distance. Creepage and clearance on a printed-circuit board become equal in certain cases. Techniques such as inserting grooves, ribs, or both on a printed circuit board are used to help increase these specifications. (2) Testing is carried out in air or oil to determine the intrinsic surge immunity of the isolation barrier. (3) Apparent charge is electrical discharge caused by a partial discharge (pd). (4) All pins on each side of the barrier tied together creating a two-terminal device. TMCS1133 SBOSAG0B – OCTOBER 2023 – REVISED AUGUST 2024 www.ti.com

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6.6 Electrical Characteristics

at TA = 25°C, VS = 5V on TMCS1133AxA, VS = 3.3V on TMCS1133BxA and TMCS1133CxA (unless otherwise noted) PARAMETERS TEST CONDITIONS MIN TYP MAX UNIT INPUT RIN Input Conductor Resistance IN+ to IN– 0.7 mΩ RIN Input Conductor Resistance Temperature Drift TA= –40ºC to 125ºC 2.1 μΩ/°C IIN,MAX Maximum Continuous Input Current(1) TA= 25ºC 80 ARMS TA= 125ºC 44 OUTPUT S Sensitivity TMCS1133x7A 20 mV/A TMCS1133x1A 25 TMCS1133x8A 33 TMCS1133x2A 50 TMCS1133x9A 66 TMCS1133x3A 75 TMCS1133x4A 100 TMCS1133x5A 150 eS Sensitivity Error 0.05V ≤ VOUT ≤ VS − 0.2V ±0.1 ±0.4 % Sdrift,therm Sensitivity Thermal Drift 0.05V ≤ VOUT ≤ VS − 0.2V, TA = −40°C to 125°C ±20 ±50 ppm/°C Sdrift, life Sensitivity Lifetime Drift(2) 0.05V ≤ VOUT ≤ VS − 0.2V ±0.2 ±0.5 % eNL Nonlinearity Error VOUT = 0.1V to VS – 0.1V ±0.1 % VOUT,0A Zero Current Output Voltage TMCS1133AxA, IIN = 0A 2.5 VTMCS1133BxA, IIN = 0A 1.65 TMCS1133CxA, IIN = 0A 0.33 VOE Output Voltage Offset Error TMCS1133x7A, IIN = 0A ±0.2 ±1 mV TMCS1133x1A, IIN = 0A ±0.2 ±1 TMCS1133x8A, IIN = 0A ±0.2 ±1 TMCS1133x2A, IIN = 0A ±0.3 ±2 TMCS1133x9A, IIN = 0A ±0.3 ±2 TMCS1133x3A, IIN = 0A ±0.4 ±3 TMCS1133x4A, IIN = 0A ±0.5 ±4 TMCS1133x5A, IIN = 0A ±0.6 ±5 VOE, drift, therm Output Voltage Offset Thermal Drift TMCS1133x7A, IIN = 0A, TA = –40°C to 125°C ±10 ±25 µV/°C TMCS1133x1A, IIN = 0A, TA = –40°C to 125°C ±10 ±25 TMCS1133x8A, IIN = 0A, TA = –40°C to 125°C ±10 ±25 TMCS1133x2A, IIN = 0A, TA = –40°C to 125°C ±10 ±30 TMCS1133x9A, IIN = 0A, TA = –40°C to 125°C ±10 ±30 TMCS1133x3A, IIN = 0A, TA = –40°C to 125°C ±10 ±30 TMCS1133x4A, IIN = 0A, TA = –40°C to 125°C ±15 ±40 TMCS1133x5A, IIN = 0A, TA = –40°C to 125°C ±15 ±40 IOS, drift, life Offset Lifetime Drift(2) Input Referred, VOUT,0A / S, IIN = 0A ±10 ±24 mA PSRR Power Supply Rejection Ratio Input Referred, VS = 3V to 5.5V, TA= –40ºC to 125ºC ±15 ±50 mA/V CMTI Common Mode Transient Immunity(3) VCM = 1000V, ΔVOUT < 200mV, 1µs 150 kV/µs CMRR Common Mode Rejection Ratio Input Referred, DC to 60Hz 5 µA/V CMFR Common Mode Field Rejection Uniform External Magnetic Field, Input Referred, DC to 1kHz 10 mA/mT Input Noise Density Input Referred, Full Bandwidth 130 μA/√Hz CL,MAX Maximum Capacitive Load VOUT to GND 4.7 nF Short Circuit Output Current VOUT short to GND, short to VS 50 mA SwingVS Swing to VS Power Supply Rail RL = 10kΩ to GND, TA= –40ºC to 125ºC VS – 0.02 VS – 0.05 V SwingGND Swing to GND 5 10 mV www.ti.com TMCS1133 SBOSAG0B – OCTOBER 2023 – REVISED AUGUST 2024 Copyright © 2024 Texas Instruments Incorporated Submit Document Feedback 7 Product Folder Links: TMCS1133

6.6 Electrical Characteristics (continued)

at TA = 25°C, VS = 5V on TMCS1133AxA, VS = 3.3V on TMCS1133BxA and TMCS1133CxA (unless otherwise noted) PARAMETERS TEST CONDITIONS MIN TYP MAX UNIT BANDWIDTH & RESPONSE BW Analog Bandwidth - 3dB Gain 1.1 MHz SR Slew Rate(4) Output rate of change between reaching 10% and 90% of final value as shown in Figure 7-2 with a 100ns input step

8 V/µs

tr Response Time(4) Time between input and output reaching 90% of final values, as shown in Figure 7-2 with a 100ns input step and a 1V output transition 120 ns tpd Propagation Delay(4) Time between input and output reaching 10% of final values as shown in Figure 7-2 with a 100ns input step and a 1V output transition 50 ns Current Overload Recovery Time 300 ns OVER CURRENT DETECTION VOC Over Current Detection Threshold Voltage VOC = S x IOC / 2.5 0.3 VS V VOC Pin Input Impedance 120 kΩ Over Current Hysteresis TMCS1133x7A 5 A TMCS1133x1A 4.5 TMCS1133x8A 3.4 TMCS1133x2A 3.5 TMCS1133x9A 2.8 TMCS1133x3A 2.2 TMCS1133x4A 1.4 TMCS1133x5A 2.7 Vover Current Threshold Error TA = –40°C to 125°C ±2 ±10 % Over Current Detection Response Time IIN step = 120% of IOC 100 250 ns OC ,OL OC Pin Pull-down Voltage IOL = 3mA, TA = –40°C to 125°C GND 0.07 0.2 V DIAGNOSTICS ALERT Output Frequency 8 kHz Output Duty Cycle, Active Low Thermal Alert 80 %Sensor Alert 50 Thermal & Sensor Alert 20 ALERT Pin Pull-down Voltage IOL = 3mA. TA = –40°C to 125°C GND 0.07 0.2 V POWER SUPPLY VS Supply Voltage TA = –40ºC to 125ºC 3.0 5.5 V IQ Quiescent Current TA = 25ºC 11 14 mA TA = –40ºC to 125ºC 14.5 mA Power On Time Time from VS > 3V to valid output 34 ms (1) Thermally limited by junction temperature, see Absolute Maximum Ratings. Applies when device mounted on TMCS1133xEVM. For more details, see the Safe Operating Area section. (2) Lifetime and environmental drift specifications based on three lot AEC-Q100 qualification stress test results. Typical values are population mean+1σ from worst case stress test condition. Min/max are tested device population mean±6σ; devices tested in AEC- Q100 qualification stayed within min/max limits for all stress conditions. See Lifetime and Environmental Stability section for more details. (3) Refer to the Common-Mode Transient Immunity section for details on common-mode transient response. (4) Refer to the Transient Response Parameters section for details on transient response of the device. TMCS1133 SBOSAG0B – OCTOBER 2023 – REVISED AUGUST 2024 www.ti.com

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6.7 Typical Characteristics

T e m p e r a t u r e ( ° C ) Sensitivity Error (%) - 5 0 - 2 5 0 2 5 5 0 7 5 1 0 0 1 2 5 1 5 0 - 0 . 4 - 0 . 3 - 0 . 2 - 0 . 1 0 . 1 S = 2 5 m V / A S = 7 5 m V / A S = 1 5 0 m V / A Figure 6-1. Sensitivity Error vs Temperature T e r m p e r a t u r e ( ° C ) Output Voltage Offset Error (mV) - 5 0 - 2 5 0 2 5 5 0 7 5 1 0 0 1 2 5 1 5 0 - 2 - 1 S = 2 5 m V / A S = 7 5 m V / A S = 1 5 0 m V / A Figure 6-2. Offset Error vs Temperature: TMCS1133Axx Device Options T e r m p e r a t u r e ( ° C ) Output Voltage Offset Error (mV) - 5 0 - 2 5 0 2 5 5 0 7 5 1 0 0 1 2 5 1 5 0 - 2 - 1 S = 2 5 m V / A S = 7 5 m V / A S = 1 5 0 m V / A Figure 6-3. Offset Error vs Temperature: TMCS1133Bxx Device Options T e r m p e r a t u r e ( ° C ) Output Voltage Offset Error (mV) - 5 0 - 2 5 0 2 5 5 0 7 5 1 0 0 1 2 5 1 5 0 - 2 - 1 S = 2 5 m V / A S = 7 5 m V / A S = 1 5 0 m V / A Figure 6-4. Offset Error vs Temperature: TMCS1133Cxx Device Options T e m p e r a t u r e ( ° C ) Non-linearity (%) - 5 0 - 2 5 0 2 5 5 0 7 5 1 0 0 1 2 5 1 5 0 - 0 . 0 5 0 . 0 0 0 . 0 5 0 . 1 0 0 . 1 5 0 . 2 0 0 . 2 5 Figure 6-5. Non-Linearity vs Temperature Population -0.40 -0.32 -0.24 -0.16 -0.08 0.0 0.08 0.16 0.24 0.32 0.40 S e n s i t i v i t y E r r o r ( % ) All sensitivities Figure 6-6. Sensitivity Error Production Distribution www.ti.com TMCS1133 SBOSAG0B – OCTOBER 2023 – REVISED AUGUST 2024 Copyright © 2024 Texas Instruments Incorporated Submit Document Feedback 9 Product Folder Links: TMCS1133

Frequency (Hz) Gain (dB) -12 10 100 1k 10k 100k 1M 10M Figure 6-7. Sensitivity vs Frequency, All Gains Normalized to 1Hz Frequency (Hz) Phase (°) -120 -90 -60 -30 10 100 1k 10k 100k 1M 10M Figure 6-8. Phase vs Frequency, All Gains F r e q u e n c y ( H z ) 1 0 1 0 0 1 k 1 0 k 1 0 0 k 1 M 1 0 m 1 0 0 m 1 0 Input Referred PSRR (A/V) Figure 6-9. PSRR vs Frequency F r e q u e n c y ( H z ) 1 0 1 0 0 1 k 1 0 k 1 0 0 k 1 M 1 0 1 0 0 Closed-loop Output Impedance () Figure 6-10. Output Impedance vs Frequency T i m e ( 1 0 0 n s / d i v ) - 1 0 2 0 2 . 5 1 0 3 2 0 3 . 5 3 0 4 4 0 4 . 5 5 0 5 V OUT (V) I IN (A) I I N V O U T Figure 6-11. Voltage Output Step Response, Rising T i m e ( 1 0 0 n s / d i v ) - 1 0 2 0 2 . 5 1 0 3 2 0 3 . 5 3 0 4 4 0 4 . 5 5 0 5 V OUT (V) I IN (A) I I N V O U T Figure 6-12. Voltage Output Step Response, Falling TMCS1133 SBOSAG0B – OCTOBER 2023 – REVISED AUGUST 2024 www.ti.com

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7 Parameter Measurement Information

7.1 Accuracy Parameters

The ideal first-order transfer function of the TMCS1133 is given by Equation 1, where the output voltage is a linear function of input current. The accuracy of the device is quantified both by the error terms in the transfer function parameters, as well as by nonidealities that introduce additional error terms not in the simplified linear model. See Total Error Calculation Examples for example calculations of total error, including all device error terms. V OUT = I IN × S + V RE F (1) where

• VOUT is the analog output voltage.
• IIN is the isolated input current.
• S is the sensitivity of the device.
• VREF is the zero current reference output voltage for the device variant.

7.1.1 Sensitivity Error

Sensitivity is the proportional change in the sensor output voltage due to a change in the input conductor current. This sensitivity is the slope of the first-order transfer function of the sensor (see Figure 7-1). The sensitivity of the TMCS1133 is tested and calibrated at the factory for high accuracy. VOUT (V) IIN (A)IFS± S = Slope (V/A) VREF IFS+ best fit linear VREF VOUT, 0 A VOE VNL VREF + VFS+ VREF ± VFS± Figure 7-1. Sensitivity, Offset, and Nonlinearity Error Sensitivity error e S is the deviation from ideal sensitivity and is defined in Equation 2 as the variation of the best-fit measured sensitivity from the ideal sensitivity. e S = S f it − S ideal S id ea l (2) where

• eS is the sensitivity error.
• Sfit is the best fit sensitivity.
• SIdeal is the ideal sensitivity. Sensitivity thermal drift S drift,therm is the change in sensitivity with temperature and is reported in ppm/°C. To calculate sensitivity error at any given temperature T use Equation 3 to multiply the sensitivity thermal drift by the change in temperature from 25°C and add that value to the sensitivity error at 25°C. e S, ∆ T = e S , 25℃ + S d rif t , t he rm × ∆ T (3) TMCS1133 SBOSAG0B – OCTOBER 2023 – REVISED AUGUST 2024 www.ti.com

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• Sdrift,therm is the sensitivity drift over temperature in ppm/°C.
• ΔT is the change in device temperature from 25°C. Sensitivity lifetime drift S drift,life is the change in sensitivity due to operational and environmental stresses over the entire lifetime of the device, and is reported as a worst-case percentage change in sensitivity over lifetime at 25°C.

7.1.2 Offset Error and Offset Error Drift

Offset error is the deviation from the ideal output with zero input current and most often limits measurement accuracy at low input current levels. Offset error can be referred to the output as offset voltage error or referred to the input as offset current error. When divided by device sensitivity, S, output voltage offset error V OE is input referred as input current offset error I OS (see Equation 4). Offset error referred to the input (RTI) allows for more direct comparisons or offset error with input current. Regardless of whether offset error is referred to the input as current offset error IOS, or to the output as voltage offset error V OE, offset error is a single error source and must only be included once in either input-referred or output-referred error calculations. I O S = V OE S (4) As shown in Figure 7-1, the output voltage offset error V OE of the TMCS1133 is the difference between the zero current output voltage VOUT,0A and the zero current output reference voltage VREF (see Equation 5). V OE = V OUT, 0A − V RE F (5) The output offset error V OE includes magnetic offset error in the Hall sensor , offset voltage error in the signal chain, and offset error in the internal zero current output reference voltage VREF. Offset drift is the change in the offset as a function of temperature T. Output offset drift is reported in µV/°C. To calculate offset error at any given temperature, multiply the offset drift by the change in temperature and add that value to the offset error at 25°C (see Equation 6). V OE , ∆ T = V O E, 25 ℃ + V OE , dri f t × ∆ T (6) where

• VOE,drift is the output voltage offset drift with temperature in µV/°C.
• ΔT is the change in device temperature from 25°C.

7.1.3 Nonlinearity Error

Nonlinearity is the deviation of the output voltage from a linear relationship to the input current. Nonlinearity voltage, as shown in Figure 7-1 , is the maximum voltage deviation from the best-fit line based on measured parameters (see Equation 7). V NL = V OUT, meas − I mea s × S f it + V O UT , 0A (7) where

• VOUT,meas is the voltage output at maximum deviation from best fit.
• Imeas is the input current at maximum deviation from best fit.
• Sfit is the best-fit sensitivity of the device.
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Nonlinearity error for the TMCS1133 is specified as a percentage of the full-scale output range, V FS (see Equation 8). e N L = V NL V F S (8)

7.1.4 Power Supply Rejection Ratio

Power supply rejection ratio (PSRR) is the change in device offset due to variations in supply voltage. Use Equation 9 to calculate input referred offset errors caused by supply variations on TMCS11 33Axx variants. Use Equation 10 to calculate input referred offset errors caused by supply variations on TMCS11 33Bxx and TMCS1133Cxx variants. e PSRR, A = P S RR × V S − 5V (9) e PSRR, B = e PSRR, C = P S RR × V S − 3.3V (10) where

• PSRR is the input referred power supply rejection ratio in mA/V.
• VS is the operational supply voltage.

7.1.5 Common-Mode Rejection Ratio

Common-mode rejection ratio (CMRR) quantifies the effective input current error due to varying voltage on the isolated input of the device. Due to magnetic coupling and galvanic isolation of the current signal, the TMCS1133 has very high rejection of input common-mode voltage. Use Equation 11 to calculate the error contribution from the input common-mode voltage VCM. e C M RR = C MR R × V CM (11) where

• CMRR is the input-referred common-mode rejection in µA/V.
• VCM is the operational AC or DC voltage on the input of the device.

7.1.6 External Magnetic Field Errors

The TMCS1133 suppresses interference from external magnetic fields generated by adjacent high-current carrying conductors, nearby motors, magnets, or any other sources of stray magnetic fields. Common-mode field rejection (CMFR) quantifies the effective input-referred error caused by stray magnetic fields. Use Equation 12 to calculate error contributions from stray external magnetic fields BEXT. e Bext = B EX T × CMFR (12) where

• BEXT is the intensity of the external magnetic field in mT.
• CMRF is the common-mode field rejection in mA/mT. TMCS1133 SBOSAG0B – OCTOBER 2023 – REVISED AUGUST 2024 www.ti.com

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7.2 Transient Response Parameters

Critical TMCS1133 transient step response parameters are shown in Figure 7-2. Propagation delay, t pd, is the time period between the input current waveform reaching 10% of the final value and the output voltage, V OUT, reaching 10% of the final value. Response time, t r, is the time period between the input current reaching 90% of the final value and the output voltage reaching 90% of the final value, for an input current step sufficient to cause a 1V change in the output voltage. Slew rate, SR, is defined as the rate of change between the output voltage reaching 10% and 90% of the final value during the sufficiently fast input current step. IIN VOUT me 90 % 10 % SR tr tpd Figure 7-2. Transient Step Response

7.2.1 CMTI, Common-Mode Transient Immunity

CMTI is the capability of the device to tolerate a rising or falling voltage step on the input without coupling significant disturbance on the output signal. The device is specified for the maximum common-mode transition rate when the output signal does not experience a disturbance greater than 200mV lasting longer than 1µs, as shown in Figure 7-3 with a 150kV/µs common-mode input step. Higher edge rates than the specified CMTI can be supported with sufficient filtering or blanking time after common-mode transitions. 5 0 ( n s / d i v ) Common Mode Voltage (kV) - 0 . 2 0 . 0 0 . 2 0 . 4 0 . 6 0 . 8 1 . 0 1 . 2 1 . 4 1 . 6 3 . 0 2 . 5 2 . 0 1 . 5 1 . 0 0 . 5 0 . 0 - 0 . 5 - 1 . 0 - 1 . 5 Output Voltage (V) V C M V O U T Figure 7-3. Common-Mode Transient Response www.ti.com TMCS1133 SBOSAG0B – OCTOBER 2023 – REVISED AUGUST 2024 Copyright © 2024 Texas Instruments Incorporated Submit Document Feedback 15 Product Folder Links: TMCS1133

7.3 Safe Operating Area

The isolated input current safe operating area (SOA) of the TMCS1133 is constrained by self-heating due to power dissipation in the input conductor. Depending upon the use case, the SOA is constrained by multiple conditions, including exceeding maximum junction temperature, Joule heating in the leadframe, or leadframe fusing under extremely high currents. These mechanisms depend greatly on input current amplitude and duration, along with ambient thermal conditions. Current SOA strongly depends on the thermal environment and design of the system-level printed circuit board (PCB). Multiple thermal variables control the transfer of heat from the device to the surrounding environment, including air flow, ambient temperature, and PCB construction and design. All ratings are for a single TMCS1133 device mounted on the TMCS1133xEVM , or equivalent PCB design with no air flow under specified ambient temperature conditions. Device use profiles must satisfy continuous current conduction SOA capabilities for the thermal environment planned for system operation.

7.3.1 Continuous DC or Sinusoidal AC Current

The longest thermal time constants of device packaging and PCBs are in the order of seconds; therefore, any continuous DC or sinusoidal AC periodic waveform with a frequency higher than 1Hz can be evaluated based on the RMS continuous-current levels. The continuous-current capability has a strong dependence upon the operating ambient temperature range expected in operation. Figure 7-4 shows the maximum continuous current-handling capability of the device when mounted on the TMCS1133xEVM . Current capability falls off at higher ambient temperatures because of the reduced thermal transfer from junction-to-ambient and increased power dissipation in the leadframe. By improving the thermal design of an application, the SOA can be extended to higher currents at elevated temperatures. Using larger and heavier copper power planes, providing air flow over the board, or adding heat sinking structures to the area of the device can all improve thermal performance. Figure 7-4. Maximum Continuous RMS Current vs Ambient Temperature TMCS1133 SBOSAG0B – OCTOBER 2023 – REVISED AUGUST 2024 www.ti.com

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7.3.2 Repetitive Pulsed Current SOA

For applications where current is pulsed between a high current and no current, the allowable capabilities are limited by short-duration heating in the leadframe. The TMCS1133 can tolerate higher current ranges under some conditions, however, for repetitive pulsed events, the current levels must satisfy both the pulsed current SOA and the RMS continuous current constraint. Pulse duration, duty cycle, and ambient temperature all impact the SOA for repetitive pulsed events. Figure 7-5 , Figure 7-6 , Figure 7-7 , and Figure 7-8 illustrate repetitive stress levels based on test results from the TMCS1133xEVM under which parametric performance and isolation integrity was not impacted post-stress for multiple ambient temperatures. At high duty cycles or long pulse durations, this limit approaches the continuous current SOA for a RMS value defined by Equation 13. I IN, RM S = I IN, P × D (13) where

• IIN,RMS is the RMS input current level
• IIN,P is the pulse peak input current
• D is the pulse duty cycle Current Pulse Duration (s) Allowable Current (A) 100 150 200 250 300 350 400 450 500 1m 10m 100m 1 10 10% 25% TA = 25°C Figure 7-5. Maximum Repetitive Pulsed Current vs. Pulse Duration Current Pulse Duration (s) Allowable Current (A) 100 150 200 250 300 350 400 450 1m 10m 100m 1 10 10% 25% TA = 85°C Figure 7-6. Maximum Repetitive Pulsed Current vs. Pulse Duration Current Pulse Duration (s) Allowable Current (A) 100 150 200 250 300 350 400 450 1m 10m 100m 1 10 10% 25% TA = 105°C Figure 7-7. Maximum Repetitive Pulsed Current vs. Pulse Duration Current Pulse Duration (s) Allowable Current (A) 100 150 200 250 300 350 400 450 1m 10m 100m 1 10 10% 25% TA = 125°C Figure 7-8. Maximum Repetitive Pulsed Current vs. Pulse Duration www.ti.com TMCS1133 SBOSAG0B – OCTOBER 2023 – REVISED AUGUST 2024 Copyright © 2024 Texas Instruments Incorporated Submit Document Feedback 17 Product Folder Links: TMCS1133

7.3.3 Single Event Current Capability

Single higher-current events that are shorter duration can be tolerated by the TMCS1133 , because the junction temperature does not reach thermal equilibrium within the pulse duration. Figure 7-9 shows the short-circuit duration curve for the device for single current-pulse events, where the leadframe resistance changes after stress. This level is reached before a leadframe fusing event, but must be considered an upper limit for short duration SOA. For long-duration pulses, the current capability approaches the continuous RMS limit at the given ambient temperature. P u l s e D u r a t i o n ( s ) Fuse Current (A) 1 0 m 1 0 0 m 1 1 0 1 0 0 1 k T A = 2 5 ° C T A = 1 2 5 ° C Figure 7-9. Single-Pulse Leadframe Capability

8 Detailed Description

8.1 Overview

The TMCS1133 is a precision Hall-effect current sensor, providing high levels of reliable reinforced isolation working voltage, ambient field rejection and high current carrying capability. A maximum total lifetime error of less than 1.4% can be achieved with no system level calibration, or less than 1% maximum total error can be achieved with a one-time room temperature calibration (including both temperature and lifetime drift). Numerous device options are provided for both unidirectional and bidirectional current measurements. The input current flows through a conductor between the isolated input current pins. The conductor has a 0.7m Ω resistance at room temperature and accommodates up to 44A RMS of continuous current at 125°C ambient temperature when used with printed circuit boards of comparable thermal design, such as the TMCS1133xEVM . The low-ohmic leadframe path reduces power dissipation compared to alternative current measurement methodologies, and does not require any external passive components, isolated supplies, or control signals on the high-voltage side. The magnetic field generated by the input current is sensed by a Hall sensor and amplified by a precision signal chain. The device can be used for both AC and DC current measurements and has a bandwidth of 1MHz. There are multiple fixed-sensitivity device options to choose from, providing a wide variety of bidirectional linear current sensing ranges from ±10A to ± 96A, as well as unidirectional linear current sensing ranges from 19A to 183A. The TMCS1133 can operate with a low voltage supply ranging from 3V to 5.5V, and is optimized for high accuracy and temperature stability, with both offset and sensitivity compensated across the entire operating temperature range. TMCS1133 SBOSAG0B – OCTOBER 2023 – REVISED AUGUST 2024 www.ti.com

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8.2 Functional Block Diagram

Reinforced Isolation Barrier GND Precision Reference Sensor & Thermal Diagnostics ALERT In Window Thr+ Thr - Output Amplifier Threshold Generation VS VOC OC Figure 8-1. Function Block Diagram

8.3 Feature Description

8.3.1 Current Input

Input current to the TMCS1133 passes through the isolated high-voltage side of the package leadframe into and out of the IN+ and IN– pins. The current flowing through the package generates a magnetic field that is proportional to the input current, which is measured by an integrated on-chip galvanically-isolated, precision Hall sensor. As a result of the electrostatic shielding on the Hall sensor die, only the magnetic field generated by the input current is measured, thus limiting input voltage switching pass-through to the circuitry. This configuration allows for direct measurement of currents with high-voltage transients without signal distortion on the current- sensor output. The leadframe conductor has a low resistance and a positive temperature coefficient as defined in Electrical Characteristics.

8.3.2 Ambient Field Rejection

The TMCS1133 is designed to provide high levels of current measurement accuracy in harsh environments. Immunity to interference from stray magnetic fields allows for use in close proximity to high current carrying traces, motor windings, inductors, or any other erroneous source of stray magnetic fields. The TMCS1133 incorporates differential Hall sensors that are strategically located and configured to reject interference from stray external magnetic fields. Ambient Field Rejection (AFR) limited only by Hall element matching and package leadframe coupling reduces errors from stray magnetic fields.

8.3.3 High-Precision Signal Chain

The TMCS1133 uses a precision, low-drift signal chain with proprietary sensor linearization techniques to provide a highly accurate and stable current measurement across the full temperature range and lifetime of the device. The device is fully tested and calibrated at the factory to account for any variations in either silicon processing, assembly, or packaging of the device. The full signal chain provides a fixed sensitivity voltage output that is proportional to the current flowing through the leadframe of the isolated input.

8.3.3.1 Temperature Stability

The TMCS1133 includes a proprietary temperature compensation technique which results in significantly improved parametric drift across the full temperature range. This compensation technique accounts for changes in ambient temperature, self-heating, and package stress. A zero-drift signal chain architecture along with Hall sensor temperature compensation methods enable stable sensitivity while minimizing offset errors across temperature. System-level performance is drastically improved across required operating conditions. www.ti.com TMCS1133 SBOSAG0B – OCTOBER 2023 – REVISED AUGUST 2024 Copyright © 2024 Texas Instruments Incorporated Submit Document Feedback 19 Product Folder Links: TMCS1133

8.3.3.2 Lifetime and Environmental Stability

In addition to large thermal drift, typical magnetic current sensors suffer an additional 2% to 3% drift in sensitivity due to aging over the lifetime of the device. The same proprietary compensation techniques used in the TMCS1133 to reduce temperature drift are also used to greatly reduce lifetime drift due to aging from stress and environmental conditions especially at high operating temperatures. As shown in the Electrical Characteristics, the TMCS1133 has industry leading lifetime sensitivity drift realized after Highly Accelerated Stress Tests (HAST) at 130°C and 85% relative humidity (RH) during standard three lot AEC-Q100 qualifications. Low sensitivity and offset drift within the bounds specified in the Electrical Characteristics are also observed after 1000 hour, 125°C high temperature operating life stress tests are performed as prescribed by AEC-Q100 qualifications. These tests mimic typical device lifetime operation, and show device performance variation due to aging is vastly improved compared with typical magnetic current sensors. Figure 8-2 and Figure 8-3 show the sensitivity and offset drift after a 1000 hour, 125°C high temperature operating life stress test as specified by AEC-Q100. Device operational performance varies over the lifetime of the device. This test mimics typical device lifetime operations and shows the likelihood of the device vastly improving performance compared to typical magnetic sensors. Figure 8-2. Sensitivity Error Drift After AEC-Q100 High Temperature Operating Life Stress Test I n p u t - r e f e r r e d O f f s e t D r i f t ( m A ) Population -16 -12 Figure 8-3. Input-Referred Offset Drift After AEC- Q100 High Temperature Operating Life Stress Test

8.3.4 Internal Reference Voltage

The TMCS1133 has a precision internal reference that determines the zero current output voltage, V OUT,0A. Overall current sensing dynamic range can be optimized by choosing either of the three different zero current output voltage options listed in the Device Comparison table. These extremely low-drift precision zero current reference options are listed in Equation 14 , Equation 15 , and Equation 16 . These equations are for precise bidirectional or unidirectional current measurements using various supply voltages ranging between 3.0V to 5.5V. TMCS1133Axx ➔ VOUT,0A = VREF = 2.5V (14) TMCS1133Bxx ➔ VOUT,0A = VREF = 1.65V (15) TMCS1133Cxx ➔ VOUT,0A = VREF = 0.33V (16)

8.3.5 Current-Sensing Measurable Ranges

The zero current reference voltage, V REF, along with device sensitivity, S, and supply voltage, V S, determine the TMCS1133 linear input current measurement ranges listed in the Device Comparison table. The maximum linear output voltage, V OUT,max, is limited to 100mV less than the supply voltage as shown in Equation 17. The minimum linear output voltage, VOUT,min, is limited to 100mV above ground as shown in Equation 18. V OUT, max = V S − 100 mV (17) TMCS1133 SBOSAG0B – OCTOBER 2023 – REVISED AUGUST 2024 www.ti.com

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V OUT, min = 100mV (18) Overall maximum dynamic range can be optimized with proper device selection by referring minimum and maximum linear output voltage swing to minimum and maximum linear input current range by dividing output voltage by sensitivity, S (see Equation 19 and Equation 20). I IN, max + = V O UT, ma x − V OUT, 0A S (19) I IN, max − = V O UT, 0A − V OUT, min S (20) where

• IIN,max+ is the maximum linear measurable positive input current.
• IIN,max– is the maximum linear measurable negative input current.
• S is the sensitivity of the device variant.
• VOUT,0A is the appropriate zero current output voltage. As examples for determining linear input current measurement range, consider TMCS11 33A2A, TMCS1133B2A and TMCS1133C2A devices, all with 50mV/A sensitivity as shown in the Device Comparison table. When used with a 5V supply, the TMCS11 33A2A has a balanced ±48A bidirectional linear current measurement range about the 2.5V zero current output reference voltage, V REF, as shown in Figure 8-4. When used with a 3.3V supply, the TMCS11 33B2A has a balanced ±31A bidirectional linear current measurement range about the 1.65V zero current output reference voltage. If used with a 5V supply, the linear current measurement range of the TMCS1133B2A can be extended from –31A to 65A as shown in Figure 8-4. The TMCS1133C2A with a 0.33V zero current reference voltage is intended for measuring unidirectional currents. When used with a 3.3V supply the TMCS1133C2A has a unidirectional linear current measurement range from –5A to 57A which can be extended from –5A to 91.4A when used with a 5V supply. VS = 3.3V VREF = 2.5V VREF = 1.65V VREF = 0.33V VS = 5V Figure 8-4. Output Voltage Relationship to Input Current for TMCS1133x2A

8.3.6 Overcurrent Detection

In addition to a fast precision analog signal response, the TMCS1133 also offers a fast digital overcurrent response. The Overcurrent Detection (OCD) circuit provides a comparator output that can be used to trigger a warning or system shutdown to prevent damage from excessive current flow caused by short circuits, motor stalls, or other system conditions. This fast digital response can be configured on both bidirectional and unidirectional devices to trip anywhere between half and over twice the analog measurement range. When www.ti.com TMCS1133 SBOSAG0B – OCTOBER 2023 – REVISED AUGUST 2024 Copyright © 2024 Texas Instruments Incorporated Submit Document Feedback 21 Product Folder Links: TMCS1133

set up to trigger outside the analog measurement range, this fast digital overcurrent output OC along with the precision analog output VOUT allows the user to optimize control-loop dynamic range. The desired overcurrent threshold I OC is set by applying an external voltage V OC to the VOC pin according to Equation 21. V OC = S × I O C 2.5 (21) where

• S is the device sensitivity in mV/A.
• IOC is the desired overcurrent threshold.
• VOC is the voltage applied that sets the overcurrent threshold. A digital-to-analog converter (DAC) can be used to set the desired overcurrent threshold I OC, or a simple external resistor divider circuit can be used as shown in Figure 8-5. When using a resistor divider, R2 must be less than 10kΩ to mitigate the impact of the VOC input impedance on overcurrent threshold accuracy. VS GND R1 R2 RPU VS VOC OC IN + IN - Differential Hall Element Bias Temperature Compensation Offset Cancellation VOUT Precision AFE Reinforced Isolation Barrier GND Precision Reference Sensor & Thermal Diagnostics ALERT In Window Thr+ Thr - Output Amplifier Threshold Generation Figure 8-5. User Configurable Overcurrent Threshold Using Power Supply Voltage Higher overcurrent threshold accuracy can be achieved on the bidirectional TMCS11 33Axx and TMCS1133Bxx devices by using the zero current output reference voltage VREF as shown in Figure 8-6. Figure 8-6. User Configurable Overcurrent Threshold Using Zero Current Output Reference Voltage For example, to set the desired overcurrent threshold to I OC = ±50A on the bidirectional TMCS11 33A3A or TMCS1133B3A devices, or to I OC = 50A on the unidirectional TMCS11 33C3A device, size the resistors R1 and R2 to apply a voltage VOC = 1.5V to the VOC pin according to Equation 21. with
• TMCS1133A3A, TMCS1133B3A and TMCS1133C3A device sensitivity, S = 75mV/A.
• Desired overcurrent threshold, IOC = 50A.
• Applied overcurrent threshold voltage VOC = 1.5V. Figure 8-7 shows the overcurrent digital output OC response as active-low. When the input current exceeds ±IOC on a bidirectional device, the fast OC pin is pulled low. The input current must return to within ±I OC by more than a hysteresis current IHys before the OC pin resets back to the normal high-state. TMCS1133 SBOSAG0B – OCTOBER 2023 – REVISED AUGUST 2024 www.ti.com

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+ IOC - IOC Hysteresis OC Figure 8-7. Overcurrent Detection Diagram

8.3.7 Sensor Diagnostics

Built-in self-diagnostic features are incorporated in the TMCS1133 to warn when operating conditions invalidate current sensor measurements. Two critical conditions being monitored are sensor temperature and sensitivity. Thermal Alert As discussed in the Safe Operating Area section, high levels of input current can generate excessive heat inside the TMCS1133 . High input currents, coupled with elevated ambient temperatures and printed circuit board thermal design can cause the TMCS1133 to overheat and be permanently damaged by exceeding maximum allowed junction temperatures. A thermal alert occurs when the internal temperature approaches the maximum allowed junction temperature. Sensor Alert In addition to temperature, sensor sensitivity and offset are constantly being monitored inside the TMCS1133 . A sensor alert occurs in the unlikely event Hall sensor sensitivity or offset is out of range compared with factory set limits. The active-low ALERT output signal can be used to decipher which of four diagnostic states the TMCS1133 resides. As shown in Figure 8-8, the duty cycle of the 8kHz PWM output signal indicates which, neither, or both of the thermal and sensor operating condition warnings exist. No Fault Thermal & Sensor Sensor Thermal 20% 50% 80%100% Duty Cycle ALERT Figure 8-8. Sensor Diagnostics Waveform www.ti.com TMCS1133 SBOSAG0B – OCTOBER 2023 – REVISED AUGUST 2024 Copyright © 2024 Texas Instruments Incorporated Submit Document Feedback 23 Product Folder Links: TMCS1133

8.4 Device Functional Modes

8.4.1 Power-Down Behavior

As a result of the inherent galvanic isolation of the device, very little consideration must be paid to powering down the device, as long as the limits in the Absolute Maximum Ratings table are not exceeded on any pins. The isolated current input and the low-voltage signal chain can be decoupled in operational behavior, as either can be energized with the other shutdown, as long as the isolation barrier capabilities are not exceeded. The low-voltage power supply can be powered down while the isolated input is still connected to an active high-voltage signal or system.

9 Application and Implementation

Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes, as well as validating and testing their design implementation to confirm system functionality.

9.1 Application Information

The key feature sets of the TMCS1133 provide significant advantages in any application where an isolated current measurement is required.

• Galvanic isolation provides a high isolated working voltage and excellent immunity to input voltage transients.
• Hall-based measurement simplifies system level designs without the need for a power supply on the high- voltage (HV) side.
• An input current path through the low impedance conductor minimizes power dissipation.
• Excellent accuracy and low temperature drift eliminate the need for multipoint calibrations without sacrificing system performance.
• A wide operating supply range enables a single device to function across a wide range of voltage levels. These advantages increase system-level performance while minimizing complexity for any application where precision current measurements must be made on isolated currents. Specific examples and design requirements are detailed in the following section.

9.1.1 Total Error Calculation Examples

Users can calculate the total error for any arbitrary device condition and current level. Consider error sources like input-referred offset current (I OS), Common Mode Rejection Ratio (CMRR), Power Supply Rejection Ratio (PSRR), sensitivity error, nonlinearity, as well as errors caused by any external magnetic fields (B EXT). Compare each of these error sources in percentage terms, as some are significant drivers of error and some have inconsequential impact to current measurement error. Offset ( Equation 22 ), CMRR ( Equation 23 ), PSRR (Equation 24), and external magnetic field error ( Equation 25) are all referred to the input, and so are divided by the actual input current IIN to calculate percentage errors. For sensitivity error and nonlinearity error calculations, the percentage limits explicitly specified in the Electrical Characteristics table can be used. e Ios = I OS I I N × 100% = V O E S × I IN × 100 % (22) e C M RR = C M RR × V C M I IN × 100 % (23) e PSRR, A = PSRR × V S − 5V I IN × 100 % ; e PSRR, B = e PSRR, C = P S RR × V S − 3.3V I IN × 100 % (24) e Bext = B EXT × C M FR I IN × 100 % (25) TMCS1133 SBOSAG0B – OCTOBER 2023 – REVISED AUGUST 2024 www.ti.com

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• VOE is the output-referred offset voltage error.
• VCM is the input common-mode voltage.
• ePSRR,A is the power supply rejection error for TMCS1133Axx devices.
• ePSRR,B is the power supply rejection error for TMCS1133Bxx devices.
• ePSRR,C is the power supply rejection error for TMCS1133Cxx devices.
• VS is the supply voltage.
• CMFR is the common-mode magnetic field rejection. When calculating error contributions across temperature, only offset error and sensitivity error contributions vary significantly. To determine the offset error across temperature, use Equation 26 to calculate total input-referred offset error current, IOS, at any ambient temperature, TA. e Ios , ∆ T = V O E, 25 ℃ + V OE , dri f t × ∆ T S × I I N × 100 % (26) where
• VOE,25°C is the output-referred offset error at 25°C.
• VOE,drift is the output-referred offset drift with temperature in µV/°C.
• ΔT is the change in temperature from 25°C.
• S is the sensitivity of the device variant. Sensitivity error at 25°C is specified as e S,25°C in the Electrical Characteristics table along with sensitivity variation over temperature as sensitivity thermal drift S drift,therm in ppm/°C. To determine the sensitivity error across temperature, use Equation 27 to calculate sensitivity error at any ambient temperature, TA, over the given application operating ambient temperature range between –40°C and 125°C. e S, ∆ T = e S, 25 ℃ + S dri f t , t her m × ∆ T × 100 % (27) To accurately calculate the total expected error of the device, the contributions from each of the individual components above must be understood in reference to operating conditions. To account for the individual error sources that are statistically uncorrelated, use a root sum square (RSS) error calculation to calculate total error. For the TMCS1133 , only the input-referred offset current (I OS), CMRR, and PSRR are statistically correlated. These error terms are lumped in an RSS calculation to reflect this nature, as shown in Equation 28 for room temperature and in Equation 29 across a given temperature range. The same methodology can be applied for calculating typical total error by using the appropriate error term specification. e RSS = e Ios +e PSRR +e C M RR 2 + e Bext 2 + e S 2 + e NL 2 (28) e RSS, ∆ T = e Ios, ∆ T +e PSRR + e CMRR 2 + e Bext 2 + e S, ∆ T 2 + e NL 2 (29) The total error calculation has a strong dependence on the actual input current, therefore always calculate total error across the dynamic range that is required. These curves asymptotically approach the sensitivity and nonlinearity error at high current levels, and approach infinity at low current levels due to offset error terms with input current in the denominator. Key figures of merit for any current-measurement system include the total error percentage at full-scale current, as well as the dynamic range of input current over which the error remains below some key level. Figure 9-1 shows the RSS maximum total error as a function of input current for a TMCS1133A2A at room temperature and across the full temperature range with a 5.25V supply. www.ti.com TMCS1133 SBOSAG0B – OCTOBER 2023 – REVISED AUGUST 2024 Copyright © 2024 Texas Instruments Incorporated Submit Document Feedback 25 Product Folder Links: TMCS1133

Figure 9-1. RSS Error vs Input Current

9.1.1.1 Room-Temperature Error Calculations

For room-temperature total error calculations, specifications across temperature and drift are ignored. As an example, consider a TMCS11 33B2A with a supply voltage (V S) of 3.1V and a worst-case common-mode excursion of 600V to calculate operating-point-specific parameters. Consider a measurement error due to an external 400µT magnetic field generated by a 20A DC current flowing through an adjacent trace or conductor that is 10mm away. The full-scale current range of the device in specified conditions is slightly greater than ±31A, as shown in the Device Comparison table. In this case, the calculating error at both 25A and 12.5A highlights error dependencies on the input-current level. Table 9-1 shows the individual error components and RSS maximum total error calculations at room temperature under the conditions specified. Relative to other errors, the additional errors from CMRR, external ambient magnetic fields B EXT and nonlinearity are negligible, and can typically be excluded from total error calculations. Table 9-1. Total Error Calculation: Room Temperature Example ERROR COMPONENT SYMBOL EQUATION ERROR AT IIN = 25A ERROR AT IIN = 12.5A Input offset error eIos e Ios = I O S I IN × 100 % = V OE S × I I N × 100 % = ± 2mV PSRR error ePSRR e PSRR = PSRR × V S − 3.3 CMRR error eCMRR e C M RR = C M RR × V C M External Field error eBext e Bext = B EX T × CMFR Sensitivity error eS Specified in Electrical Characteristics ±0.4% ±0.4% Nonlinearity error eNL Specified in Electrical Characteristics ±0.1% ±0.1% RSS total error eRSS e RSS = e Ios + e PSRR + e CMRR 2 + e Bext 2 + e S 2 + e NL 2 0.46% 0.59%

9.1.1.2 Full-Temperature Range Error Calculations

To calculate total error across any specific temperature range, use Equation 28 and Equation 29 for RSS maximum total errors, similar to the example for room temperatures. Conditions from the example in Room- Temperature Error Calculations are replaced with the respective equations and error components for a –40°C to 85°C temperature range below in Table 9-2. TMCS1133 SBOSAG0B – OCTOBER 2023 – REVISED AUGUST 2024 www.ti.com

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Table 9-2. Total Error Calculation: –40°C to 85°C Example ERROR COMPONENT SYMBOL EQUATION ERROR AT IIN = 25A ERROR AT IIN = 12.5A Input offset error eIos,ΔT e Ios , ∆ T = V OE, 25 ℃ + V O E, d rif t × ∆ T PSRR error ePSRR e PSRR = PSRR × V S − 3.3 CMRR error eCMRR e C M RR = C M RR × V C M External Field error eBext e Bext = B EX T × CMFR Sensitivity error eS,ΔT e S, ∆ T = e S, 25 ℃ + S dri f t , t her m × ∆ T × 100% ±0.70% ±0.70% Nonlinearity error eNL Specified in Electrical Characteristics ±0.1% ±0.1% RSS total error eRSS,ΔT e RSS, ∆ T = e Ios , ∆ T +e PSRR +e C M RR 2 + e Bext 2 + e S, ∆ T 2 + e NL 2 0.79% 1.00%

9.2 Typical Application

In many applications, power must be converted from AC sources for use in DC circuitry. Some type of controlled power factor correction (PFC) stage is usually needed to improve power transfer efficiency. Faster and faster power switches are being used in modern PFC stages to reduce overall size and to improve power transfer efficiency. Often, the PFC stage of AC to DC converters is connected directly to AC power grids. A primary challenge to sensing in PFC stages is that the current sensor is subjected to large voltage spikes coming from the high-voltage (HV) power grid along with large transients coming from high speed power switches during charge transfer. Inherent isolation in the TMCS1133 construction helps overcome these challenges by providing high levels of isolation between the HV current sensing nodes and low-voltage control circuitry, with high common-mode transient immunity (CMTI). Figure 9-2 shows the use of the TMCS1133 measuring phase currents in a common AC to DC converter stage. Figure 9-2. AC to DC Converter Current Sensing

9.2.1 Design Requirements

For a 3-phase current sensing application, make sure to provide linear sensing across the expected current range, and make sure that the device remains within working thermal constraints. A single TMCS1133 can be used to measure current in each phase if necessary. For this example, consider a nominal supply of 5V but a minimum of 4.9V to include for some supply variation. Maximum output swings are defined according to TMCS1133 specifications, and a full-scale current measurement of ±20A is required. www.ti.com TMCS1133 SBOSAG0B – OCTOBER 2023 – REVISED AUGUST 2024 Copyright © 2024 Texas Instruments Incorporated Submit Document Feedback 27 Product Folder Links: TMCS1133

Table 9-3. Example Application Design Requirements DESIGN PARAMETER EXAMPLE VALUE VS,nom 5V VS,min 4.9V IIN,FS ±20A

9.2.2 Detailed Design Procedure

The primary design parameter for using the TMCS1133 is the optimum sensitivity variant based on the required measured current levels and the selected supply voltage. Positive and negative currents are measured in this in-line phase current application example, therefore select a bidirectional variant. The TMCS1133 has a precision internal reference voltage that determines the zero current output voltage, VOUT,0A. The internal reference voltage on TMCS1133AxA variants, with zero current output voltage V OUT,0A = 2.5V is intended for bidirectional current measurements when used with 5V power supplies. The internal reference voltage on TMCS1133BxA variants, with zero current output voltage V OUT,0A = 1.65V is intended for bidirectional current measurements when used with 3.3V power supplies. Further consideration of noise and integration with an ADC can be explored, but is beyond the scope of this application design example. The TMCS1133 output voltage VOUT is proportional to the input current IIN as defined by Equation 30 with output offset set by VOUT,0A. V OUT = I IN × S + V O UT , 0A (30) Design of the sensing solution focuses on maximizing the sensitivity of the device while maintaining linear measurement over the expected current input range. The TMCS1133 has a linear measurable current range that is constrained by either the positive swing to supply or negative swing to ground. To account for the operating margin, consider the previously defined minimum possible supply voltage V S,min = 4.9V. With the previous parameters, the maximum linear output voltage V OUT,max is defined by Equation 31 and the minimum linear output voltage VOUT,min is defined by Equation 32. V OUT, max = V S, min − 100mV (31) V OUT, min = 100mV (32) Design parameters for this example application are shown in Table 9-4 along with the calculated output range. Table 9-4. Example Application Design Parameters DESIGN PARAMETER EXAMPLE VALUE VOUT,max 4.8V VOUT,0A 2.5V VOUT,max – VOUT,0A 2.3V These design parameters result in a maximum positive linear output voltage swing of ±2.3V about V OUT,0A = 2.5V. To determine which sensitivity variant of the TMCS1133 most fully uses this linear range, use Equation 33 to calculate the maximum current range for a bidirectional current ±IIN,max. I IN, max = V OUT, max − V OUT, 0 A S (33) where

• S is the sensitivity of the relevant AxA variant. Table 9-5 shows the calculation for each gain variant of the TMCS1133 with the appropriate sensitivities. TMCS1133 SBOSAG0B – OCTOBER 2023 – REVISED AUGUST 2024 www.ti.com

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Table 9-5. Maximum Full-Scale Current Ranges With 2.3V Positive Output Swing VARIANT SENSITIVITY IIN,max TMCS1133A1A 25mV/A ±92A TMCS1133A2A 50mV/A ±46A TMCS1133A3A 75mV/A ±30.6A TMCS1133A4A 100mV/A ±23A TMCS1133A5A 150mV/A ±15.3A In general, the highest sensitivity variant is selected to provide the lowest maximum input current range that is larger than the desired full-scale current range. For the design parameters in this example, the TMCS11 33A4A with sensitivity of 100mV/A is the proper selection because the maximum ±23A linear measurable range is larger than the desired ±20A full-scale current range.

9.2.3 Application Curve

To illustrate high levels of isolation achievable between noisy high-voltage current sensing nodes and low- voltage precision current measurement and control circuitry, Figure 9-3 shows the output signal from the TMCS1133 in a noisy in-phase PWM motor control example. In this example with a large induction motor under no load, no PWM edge interference is seen on the current sensor output with high-voltage PWM switching on the current sensor input, as is often pronounced on many current sensors. Figure 9-3. Inline Motor Current-Sense Input and Output Signals

9.3 Power Supply Recommendations

The TMCS1133 only requires a power supply (V S) on the low-voltage isolated side, which powers the analog circuitry independent of the isolated current input. V S determines the full-scale output range of the analog output VOUT, and can be supplied with any voltage between 3V and 5.5V. To filter noise in the power-supply path, place a low-ESR decoupling capacitor of 0.1µF between V S and GND pins as close as possible to the supply and ground pins of the device. More decoupling capacitance can be added to compensate for noisy or high-impedance power supplies. When used in extremely noisy environments, ferrite beads can be added close to the supply pin as shown in Figure 9-4 to target and suppress high-frequency noise coupled on to system supply. www.ti.com TMCS1133 SBOSAG0B – OCTOBER 2023 – REVISED AUGUST 2024 Copyright © 2024 Texas Instruments Incorporated Submit Document Feedback 29 Product Folder Links: TMCS1133

F.B. 0.1µF Figure 9-4. Power Supply Noise Filtering The TMCS1133 power supply V S can be sequenced independently of current flowing through the input. However, there is a power-on delay between V S reaching the recommended operating voltage and the analog output validation. During this power-on time, the output voltage V OUT can transition between GND and VS as the output transfers from a high impedance reset state to the active drive state. If this behavior must be avoided, then provide a stable supply voltage VS for longer than the power-on time prior to applying input current.

9.4 Layout

9.4.1 Layout Guidelines

The TMCS1133 is specified for a continuous current handling capability on the TMCS1133xEVM which uses 4oz copper planes. This current capability is fundamentally limited by the maximum device junction temperature and the thermal environment, primarily the PCB layout and design. To maximize current-handling capability and thermal stability of the device, take care with PCB layout and construction to optimize the thermal capability. Efforts to improve the thermal performance beyond the design and construction of the TMCS1133xEVM can result in increased continuous-current capability due to higher heat transfer to the ambient environment. Keys to improving thermal performance of the PCB include:

• Use large copper planes for both input current path and isolated power planes and signals.
• Use heavier copper PCB construction.
• Place thermal via farms around the isolated current input.
• Provide airflow across the surface of the PCB.

9.4.2 Layout Example

An example layout, shown in Figure 9-5 , is from the TMCS1133xEVM User's Guide . Device performance is targeted for thermal and magnetic characteristics of this layout, which provides optimal current flow from the terminal connectors to the device input pins while large copper planes enhance thermal performance. TMCS1133 SBOSAG0B – OCTOBER 2023 – REVISED AUGUST 2024 www.ti.com

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Figure 9-5. Recommended Board Layout

10 Device and Documentation Support

10.1 Device Nomenclature

TI device nomenclature also includes a suffix with the device family name. This suffix indicates the package type (for example, DVG), the temperature range, and the device speed range, in megahertz. For orderable part numbers of TMCS1133 devices in the SOIC package types, see the Package Option Addendum of this document, ti.com, or contact your TI sales representative. For additional description of the device nomenclature markings on the die, see the Silicon Errata.

10.2 Device Support

10.2.1 Development Support

For development tool support see the following:

• Texas Instruments, TMCS1133xEVM

10.3 Documentation Support

10.3.1 Related Documentation

For related documentation see the following:

• Texas Instruments, TMCS1133xEVM User's Guide
• Texas Instruments, Isolation Glossary, application note

10.4 Receiving Notification of Documentation Updates

To receive notification of documentation updates, navigate to the device product folder on ti.com. Click on Notifications to register and receive a weekly digest of any product information that has changed. For change details, review the revision history included in any revised document.

10.5 Support Resources

TI E2E™ support forums are an engineer's go-to source for fast, verified answers and design help — straight from the experts. Search existing answers or ask your own question to get the quick design help you need. Linked content is provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use. www.ti.com TMCS1133 SBOSAG0B – OCTOBER 2023 – REVISED AUGUST 2024 Copyright © 2024 Texas Instruments Incorporated Submit Document Feedback 31 Product Folder Links: TMCS1133

10.6 Trademarks

TI E2E™ is a trademark of Texas Instruments. All trademarks are the property of their respective owners.

10.7 Electrostatic Discharge Caution

This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.

10.8 Glossary

TI Glossary This glossary lists and explains terms, acronyms, and definitions. NOTE: Page numbers for previous revisions may differ from page numbers in the current version. Changes from Revision A (March 2024) to Revision B (August 2024) Page Changes from Revision * (October 2024) to Revision A (March 2024) Page

12 Mechanical, Packaging, and Orderable Information

The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation. TMCS1133 SBOSAG0B – OCTOBER 2023 – REVISED AUGUST 2024 www.ti.com

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www.ti.com PACKAGE OUTLINE C10.639.97 TYP

2.65 MAX

2X 4.324.12

0.320.23 TYP

0- 8 0.30.1(1.4) 0.25GAGE PLANE1.270.40 ANOTE 310.510.1 B NOTE 47.67.4 SOIC - 2.65 mm max heightDVG0010ASMALL OUTLINE PACKAGE 1 10 0.25CA32 PIN 1 IDAREA SEATING PLANE0.1C SEE DETAIL A DETAIL ATYPICAL SCALE 1.500 4226847/C 10/2022 8X 0.510.31 7X 1.272X 2.642.44 B (0.86) www.ti.com TMCS1133 SBOSAG0B – OCTOBER 2023 – REVISED AUGUST 2024 Copyright © 2024 Texas Instruments Incorporated Submit Document Feedback 33 Product Folder Links: TMCS1133

www.ti.com EXAMPLE BOARD LAYOUT (9.75)R0.05 TYP 0.07 MAXALL AROUND0.07 MINALL AROUND 10X (2) 8X (0.6) SOIC - 2.65 mm max heightDVG0010ASMALL OUTLINE PACKAGE SYMM SYMM SEEDETAILS1 2 3 10SYMM HV / ISOLATION OPTION8.1 mm CLEARANCE/CREEPAGE NOTES: (continued) 6. Publication IPC-7351 may have alternate designs. 7. Solder mask tolerances between and around signal pads can vary based on board fabrication site. METALSOLDER MASKOPENING NON SOLDER MASKDEFINEDSOLDER MASK DETAILS SOLDER MASKOPENINGMETAL SOLDER MASKDEFINED LAND PATTERN EXAMPLESCALE:4X SYMM1 2 3 IPC-7351 NOMINAL7.3 mm CLEARANCE/CREEPAGE SEEDETAILS 4226847/C 10/2022 TMCS1133 SBOSAG0B – OCTOBER 2023 – REVISED AUGUST 2024 www.ti.com

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www.ti.com EXAMPLE STENCIL DESIGN R0.05 TYPR0.05 TYP 10X (2) 8X (0.6) 7X (1.27)(9.3) SOIC - 2.65 mm max heightDVG0010ASMALL OUTLINE PACKAGE SYMM SYMM1 2 3 HV / ISOLATION OPTION8.1 mm CLEARANCE/CREEPAGESOLDER PASTE EXAMPLEBASED ON 0.125 mm THICK STENCILSCALE:4X SYMM SYMM1 2 3 IPC-7351 NOMINAL7.3 mm CLEARANCE/CREEPAGE 4226847/C 10/2022 www.ti.com TMCS1133 SBOSAG0B – OCTOBER 2023 – REVISED AUGUST 2024 Copyright © 2024 Texas Instruments Incorporated Submit Document Feedback 35 Product Folder Links: TMCS1133

12.1 Tape and Reel Information

Reel Width (W1) REEL DIMENSIONS W Dimension designed to accommodate the component length Dimension designed to accommodate the component thickness Overall width of the carrier tape Pitch between successive cavity centers Dimension designed to accommodate the component width TAPE DIMENSIONS B0 W A0Cavity QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE Pocket Quadrants Sprocket Holes Q1 Q1Q2 Q2 Q3 Q3Q4 Q4 Reel Diameter User Direction of Feed Device Package Type Package Drawing Pins SPQ Reel Diameter (mm) Reel Width W1 (mm) (mm) (mm) (mm) (mm) W (mm) Pin1 Quadrant TMCS1133A1AQDVGR SOIC DVG 10 2000 330 16.4 10.75 10.7 2.7 12 16 Q1 TMCS1133A2AQDVGR SOIC DVG 10 2000 330 16.4 10.75 10.7 2.7 12 16 Q1 TMCS1133A3AQDVGR SOIC DVG 10 2000 330 16.4 10.75 10.7 2.7 12 16 Q1 TMCS1133A4AQDVGR SOIC DVG 10 2000 330 16.4 10.75 10.7 2.7 12 16 Q1 TMCS1133A5AQDVGR SOIC DVG 10 2000 330 16.4 10.75 10.7 2.7 12 16 Q1 TMCS1133B1AQDVGR SOIC DVG 10 2000 330 16.4 10.75 10.7 2.7 12 16 Q1 TMCS1133B2AQDVGR SOIC DVG 10 2000 330 16.4 10.75 10.7 2.7 12 16 Q1 TMCS1133B3AQDVGR SOIC DVG 10 2000 330 16.4 10.75 10.7 2.7 12 16 Q1 TMCS1133B4AQDVGR SOIC DVG 10 2000 330 16.4 10.75 10.7 2.7 12 16 Q1 TMCS1133B5AQDVGR SOIC DVG 10 2000 330 16.4 10.75 10.7 2.7 12 16 Q1 TMCS1133B7AQDVGR SOIC DVG 10 2000 330 16.4 10.75 10.7 2.7 12 16 Q1 TMCS1133B8AQDVGR SOIC DVG 10 2000 330 16.4 10.75 10.7 2.7 12 16 Q1 TMCS1133C1AQDVGR SOIC DVG 10 2000 330 16.4 10.75 10.7 2.7 12 16 Q1 TMCS1133C2AQDVGR SOIC DVG 10 2000 330 16.4 10.75 10.7 2.7 12 16 Q1 TMCS1133C3AQDVGR SOIC DVG 10 2000 330 16.4 10.75 10.7 2.7 12 16 Q1 TMCS1133C4AQDVGR SOIC DVG 10 2000 330 16.4 10.75 10.7 2.7 12 16 Q1 TMCS1133C5AQDVGR SOIC DVG 10 2000 330 16.4 10.75 10.7 2.7 12 16 Q1 TMCS1133C9AQDVGR SOIC DVG 10 2000 330 16.4 10.75 10.7 2.7 12 16 Q1 TMCS1133 SBOSAG0B – OCTOBER 2023 – REVISED AUGUST 2024 www.ti.com

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TAPE AND REEL BOX DIMENSIONS Width (mm) W L H Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) TMCS1133A1AQDVGR SOIC DVG 10 2000 350 350 43 TMCS1133A2AQDVGR SOIC DVG 10 2000 350 350 43 TMCS1133A3AQDVGR SOIC DVG 10 2000 350 350 43 TMCS1133A4AQDVGR SOIC DVG 10 2000 350 350 43 TMCS1133A5AQDVGR SOIC DVG 10 2000 350 350 43 TMCS1133B1AQDVGR SOIC DVG 10 2000 350 350 43 TMCS1133B2AQDVGR SOIC DVG 10 2000 350 350 43 TMCS1133B3AQDVGR SOIC DVG 10 2000 350 350 43 TMCS1133B4AQDVGR SOIC DVG 10 2000 350 350 43 TMCS1133B5AQDVGR SOIC DVG 10 2000 350 350 43 TMCS1133B7AQDVGR SOIC DVG 10 2000 350 350 43 TMCS1133B8AQDVGR SOIC DVG 10 2000 350 350 43 TMCS1133C1AQDVGR SOIC DVG 10 2000 350 350 43 TMCS1133C2AQDVGR SOIC DVG 10 2000 350 350 43 TMCS1133C3AQDVGR SOIC DVG 10 2000 350 350 43 TMCS1133C4AQDVGR SOIC DVG 10 2000 350 350 43 TMCS1133C5AQDVGR SOIC DVG 10 2000 350 350 43 TMCS1133C9AQDVGR SOIC DVG 10 2000 350 350 43 www.ti.com TMCS1133 SBOSAG0B – OCTOBER 2023 – REVISED AUGUST 2024 Copyright © 2024 Texas Instruments Incorporated Submit Document Feedback 37 Product Folder Links: TMCS1133

www.ti.com 20-Sep-2024 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead finish/ Ball material (6) MSL Peak Temp (3) Op Temp (°C) Device Marking (4/5) Samples PMCS1133A1AQDVGR ACTIVE SOIC DVG 10 2000 TBD Call TI Call TI -40 to 125 Samples PMCS1133A2AQDVGR ACTIVE SOIC DVG 10 2000 TBD Call TI Call TI -40 to 125 Samples PMCS1133B1AQDVGR ACTIVE SOIC DVG 10 2000 TBD Call TI Call TI -40 to 125 Samples PMCS1133B2AQDVGR ACTIVE SOIC DVG 10 2000 TBD Call TI Call TI -40 to 125 Samples TMCS1133A1AQDVGR ACTIVE SOIC DVG 10 2000 RoHS & Green SN Level-2-260C-1 YEAR -40 to 125 1133A1A Samples TMCS1133A2AQDVGR ACTIVE SOIC DVG 10 2000 RoHS & Green SN Level-2-260C-1 YEAR -40 to 125 1133A2A Samples TMCS1133A3AQDVGR ACTIVE SOIC DVG 10 2000 RoHS & Green SN Level-2-260C-1 YEAR -40 to 125 1133A3A Samples TMCS1133A4AQDVGR ACTIVE SOIC DVG 10 2000 RoHS & Green SN Level-2-260C-1 YEAR -40 to 125 1133A4A Samples TMCS1133A5AQDVGR ACTIVE SOIC DVG 10 2000 RoHS & Green SN Level-2-260C-1 YEAR -40 to 125 1133A5A Samples TMCS1133B1AQDVGR ACTIVE SOIC DVG 10 2000 RoHS & Green SN Level-2-260C-1 YEAR -40 to 125 1133B1A Samples TMCS1133B2AQDVGR ACTIVE SOIC DVG 10 2000 RoHS & Green SN Level-2-260C-1 YEAR -40 to 125 1133B2A Samples TMCS1133B3AQDVGR ACTIVE SOIC DVG 10 2000 RoHS & Green SN Level-2-260C-1 YEAR -40 to 125 1133B3A Samples TMCS1133B4AQDVGR ACTIVE SOIC DVG 10 2000 RoHS & Green SN Level-2-260C-1 YEAR -40 to 125 1133B4A Samples TMCS1133B5AQDVGR ACTIVE SOIC DVG 10 2000 RoHS & Green SN Level-2-260C-1 YEAR -40 to 125 1133B5A Samples TMCS1133B8AQDVGR ACTIVE SOIC DVG 10 2000 RoHS & Green SN Level-2-260C-1 YEAR -40 to 125 1133B8A Samples TMCS1133C1AQDVGR ACTIVE SOIC DVG 10 2000 RoHS & Green SN Level-2-260C-1 YEAR -40 to 125 1133C1A Samples TMCS1133C2AQDVGR ACTIVE SOIC DVG 10 2000 RoHS & Green SN Level-2-260C-1 YEAR -40 to 125 1133C2A Samples TMCS1133C3AQDVGR ACTIVE SOIC DVG 10 2000 RoHS & Green SN Level-2-260C-1 YEAR -40 to 125 1133C3A Samples TMCS1133C4AQDVGR ACTIVE SOIC DVG 10 2000 RoHS & Green SN Level-2-260C-1 YEAR -40 to 125 1133C4A Samples TMCS1133C5AQDVGR ACTIVE SOIC DVG 10 2000 RoHS & Green SN Level-2-260C-1 YEAR -40 to 125 1133C5A Samples Addendum-Page 1

www.ti.com 20-Sep-2024 Orderable Device Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead finish/ Ball material (6) MSL Peak Temp (3) Op Temp (°C) Device Marking (4/5) Samples TMCS1133C9AQDVGR ACTIVE SOIC DVG 10 2000 RoHS & Green SN Level-2-260C-1 YEAR -40 to 125 1133C9A Samples (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. OTHER QUALIFIED VERSIONS OF TMCS1133 :

• Automotive : TMCS1133-Q1 Addendum-Page 2

www.ti.com 20-Sep-2024 NOTE: Qualified Version Definitions:

• Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects Addendum-Page 3

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