PMCS1100A1QDR

TMCS1100 TI1 | Alldatasheet

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ADVANCE□INFORMATION Product Folder Order Now T echnical Documents Tools & Software Support & Community An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. ADVANCE INFORMATION for pre-production products; subject to change without notice. TMCS1100 SBOS820 –SEPTEMBER 2019 TMCS1100High-Precision,IsolatedCurrentSensorWithExternalReference

1 Features

1• Total error current sensing: < 1% – Sensitivity error: ±0.3%, –40ºC to +125ºC – Offset error: ±10.5 mA, –40ºC to +125ºC – Offset current drift: 0.01 mA/°C – Linearity over temperature: 0.1% typ

UL1577, VDE 0884-11, 60950 certifications planned – 600-VDC/VPK working isolation – 3-kVRMS withstand isolation
Bidirectional and unidirectional linear current sensing
External reference voltage enables variable measurable ranges and differential signal chains
Operating supply range: 3 V to 5.5 V
Signal bandwidth: 80-kHz
Multiple sensitivity options: – TMCS1100A1: 50 mV/A – TMCS1100A2: 100 mV/A – TMCS1100A3: 200 mV/A – TMCS1100A4: 400 mV/A

2 Applications

Motor and load control
Inverter and H-bridge current measurements
Power factor correction
Overcurrent protection
DC and ac power monitoring

3 Description

The TMCS1100 is a galvanically isolated Hall-effect current sensor capable of dc or ac current measurement with high accuracy, excellent linearity, and temperature stability. A low-drift, temperature- compensated signal chain provides < 1% full-scale error across the entire device temperature range. The input current flows through an internal 1.8-mΩ conductor that generates a magnetic field measured by an integrated Hall-effect sensor. This structure eliminates external concentrators and simplifies PCB design. Low conductor resistance minimizes power loss and thermal dissipation. Inherent galvanic insulation provides a 600-V basic working isolation and 3-kV dielectric withstand isolation between the current path and circuitry. Integrated electrical shielding enables excellent common-mode rejection and transient immunity protection. The output voltage is proportional to the input current with four sensitivity options. Fixed sensitivity allows the TMCS1100 to operate from a single 3-V to 5.5-V power supply, eliminates ratiometry errors, and improves supply noise rejection. The current polarity is considered positive when flowing into the positive input pin. The VREF input pin provides a variable zero-current output voltage, enabling bidirectional or unidirectional current sensing. The TMCS1100 draws a maximum supply current of 5 mA, and all sensitivity options are specified over the operating temperature range of –40°C to +125°C. Device Information(1) PART NUMBER PACKAGE BODY SIZE (NOM) TMCS1100 SOIC (8) 4.90 mm x 3.90 mm (1) For all available packages, see the package option addendum at the end of the data sheet. Typical Application

13.3 Receiving Notification of Documentation Updates 29

14 Mechanical, Packaging, and Orderable

4 Revision History

September 2019 * Initial release

ADVANCE□INFORMATION 1IN+ 8 VS 2IN+ 7 VOUT 3IN± 6 VREF 4IN± 5 GND Not to scale TMCS1100 www.ti.com SBOS820 –SEPTEMBER 2019 Product Folder Links: TMCS1100 Submit Documentation FeedbackCopyright © 2019, Texas Instruments Incorporated (1) Linear range limited by swing to supply and ground. (2) Current levels must remain below both allowable continuous DC/RMS and transient peak current safe operating areas.

5 Device Comparison Table

SENSITIVITY BIDIRECTIONAL LINEAR MEASUREMENT RANGE, VREF = VS / 2(1) UNIDIRECTIONAL LINEAR MEASUREMENT RANGE, VREF = VGND(1) ΔVOUT / ΔIIN+, IN– VS = 5 V VS = 3.3 V VS = 5 V VS = 3.3 V TMCS1100A1 50 mV/A ±46 A(2) ±29 A(2) 1 A to 96 A(2) 1 A to 61 A(2) TMCS1100A2 100 mV/A ±23 A(2) ±14.5 A 0.5 A to 48 A(2) 0.5 A to 31 A(2)

6 Pin Configuration and Functions

NO. NAME

1 IN+ Analog input Input current positive pin

2 IN+ Analog input Input current positive pin

3 IN– Analog input Input current negative pin

4 IN– Analog input Input current negative pin

5 GND Analog Ground

6 VREF Analog input Zero current output voltage reference

7 VOUT Analog output Output voltage

8 VS Analog Power supply

ADVANCE□INFORMATION TMCS1100 SBOS820 –SEPTEMBER 2019 www.ti.com Product Folder Links: TMCS1100 Submit Documentation Feedback Copyright © 2019, Texas Instruments Incorporated (1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

7 Specifications

7.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)(1) MIN MAX UNIT VS Supply voltage GND – 0.3 6 V Analog input VREF GND – 0.3 (VS) + 0.3 V Analog output VOUT GND – 0.3 (VS) + 0.3 V TJ Junction temperature –65 150 °C Tstg Storage temperature –65 150 °C (1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. (2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

7.2 ESD Ratings

V(ESD) Electrostatic discharge Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) ±2000 V Charged-device model (CDM), per JEDEC specification JESD22-C101(2) ±1000 (1) VIN+ and VIN– refer to the voltage at input current pins IN+ and IN–, relative to pin 5 (GND). (2) Input current safe operating area is constrained by junction temperature. Recommended condition based on the TMCS1100EVM. Rating is derated for elevated ambient temperatures.

7.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted) MIN NOM MAX UNIT VIN+,VIN– (1) Input voltage –600 600 VPK IIN (2) Input current (Continuous dc or rms current) –20 20 A VS Operating supply voltage, TMCS1100A1-3 3 5 5.5 V VS Operating supply voltage, TMCS1100A4 4.5 5 5.5 V TA Operating free-air temperature –40 125 °C (1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report.

7.4 Thermal Information

THERMAL METRIC(1) TMCS1100 UNITD (SOIC)

8 PINS

RθJA Junction-to-ambient thermal resistance 36.6 °C/W RθJC(top) Junction-to-case (top) thermal resistance 50.7 °C/W RθJB Junction-to-board thermal resistance 9.6 °C/W ΨJT Junction-to-top characterization parameter –0.1 °C/W ΨJB Junction-to-board characterization parameter 11.7 °C/W RθJC(bot) Junction-to-case (bottom) thermal resistance N/A °C/W

ADVANCE□INFORMATION TMCS1100 www.ti.com SBOS820 –SEPTEMBER 2019 Product Folder Links: TMCS1100 Submit Documentation FeedbackCopyright © 2019, Texas Instruments Incorporated (1) Apply creepage and clearance requirements according to the specific equipment isolation standards of an application. Take care to maintain the creepage and clearance distance of the board design to make sure that the mounting pads of the isolator on the printed- circuit board do not reduce this distance. Creepage and clearance on a printed-circuit board become equal in certain cases. Techniques such as inserting grooves, ribs, or both on a printed circuit board are used to help increase these specifications. (2) This coupler is for basic electrical insulation only within the maximum operating ratings. Compliance with the safety ratings is by means of protective circuits. (3) Testing is carried out in air or oil to determine the intrinsic surge immunity of the isolation barrier. (4) Apparent charge is electrical discharge caused by a partial discharge (pd).

7.5 Insulation Specifications

PARAMETER TEST CONDITIONS VALUE UNIT GENERAL CLR External clearance(1) Shortest terminal-to-terminal distance through air 4 mm CPG External creepage(1) Shortest terminal-to-terminal distance across the package surface 4 mm DTI Distance through the insulation Minimum internal gap (internal clearance) 60 µm CTI Comparative tracking index DIN EN 60112 (VDE 0303-11); IEC 60112 600 V Material group II Overvoltage category Rated mains voltage ≤ 150 VRMS I-IV Rated mains voltage ≤ 300 VRMS I-III Rated mains voltage ≤ 600 VRMS I-II DIN V VDE V 0884-11:2017-01(2) VIORM Maximum repetitive peak isolation voltage AC voltage (bipolar) 600 VPK VIOWM Maximum working isolation voltage AC voltage (sine wave) 424 VRMS DC voltage 600 VDC VIOTM Maximum transient isolation voltage VTEST = VIOTM, t = 60 s (qualification); VTEST = 1.2 × VIOTM, t = 1 s (100% production) 4242 VPK VIOSM Maximum surge isolation voltage(3) Test method per IEC 62368-1, 1.2/50 µs waveform, VTEST = 1.3 × VIOSM (qualification) 6000 VPK qpd Apparent charge(4) Method a: After I/O safety test subgroup 2/3, Vini = VIOTM, tini = 60 s; Vpd(m) = 1.2 × VIORM, tm = 10 s pC Method a: After environmental tests subgroup 1, Vini = VIOTM, tini = 60 s; Vpd(m) = 1.2 × VIORM, tm = 10 s Method b3: At routine test (100% production) and preconditioning (type test) Vini = 1.2 × VIOTM, tini = 1 s; Vpd(m) = 1.2 × VIOTM, tm = 1 s Pollution degree 2 UL 1577 VISO Withstand isolation voltage VTEST = VISO, t = 60 s (qualification); VTEST = 1.2 × VISO, t = 1 s (100% production) 3000 VRMS

ADVANCE□INFORMATION TMCS1100 SBOS820 –SEPTEMBER 2019 www.ti.com Product Folder Links: TMCS1100 Submit Documentation Feedback Copyright © 2019, Texas Instruments Incorporated (1) RTI = referred-to-input. Output voltage is divided by device sensitivity to refer signal to input current. See the Parameter Measurement Information section. (2) Thermally limited by junction temperature. Applies when device mounted on TMCS1100EVM. For more details, see the Safe Operating Area section.

7.6 Electrical Characteristics

at TA = 25°C, VS = 5 V, VREF = 2.5 V (unless otherwise noted) PARAMETERS TEST CONDITIONS MIN TYP MAX UNIT OUTPUT Sensitivity TMCS1100A1 50 mV/A TMCS1100A2 100 mV/A TMCS1100A3 200 mV/A TMCS1100A4 400 mV/A Sensitivity error 0.05 V ≤ VOUT ≤ VS – 0.2 V ±0.1% ±0.35% Sensitivity error 0.05 V ≤ VOUT ≤ VS – 0.2 V, TA= –40ºC to Sensitivity error drift 0.05 V ≤ VOUT ≤ VS – 0.2 V ±20 ±30 ppm/°C VOE Output voltage offset error TMCS1100A1 ±1 ±2.5 mV TMCS1100A2 ±1.2 ±4.5 mV TMCS1100A3 ±1.4 ±7.5 mV TMCS1100A4 ±2.25 ±12 mV Output voltage offset error TMCS1100A1, TA= –40ºC to +125ºC ±1.5 ±4 mV TMCS1100A2, TA= –40ºC to +125ºC ±2 ±6 mV TMCS1100A3, TA= –40ºC to +125ºC ±2.4 ±10 mV TMCS1100A4, TA= –40ºC to +125ºC ±4.2 ±20 mV IOS Offset error, RTI(1) TMCS1100A1 ±20 ±50 mA TMCS1100A2 ±12 ±45 mA TMCS1100A3 ±7 ±37.5 mA TMCS1100A4 ±5.6 ±30 mA Offset error, RTI(1) TMCS1100A1, TA= –40ºC to +125ºC ±30 ±80 mA TMCS1100A2, TA= –40ºC to +125ºC ±20 ±60 mA TMCS1100A3, TA= –40ºC to +125ºC ±12 ±50 mA TMCS1100A4, TA= –40ºC to +125ºC ±10.5 ±50 mA Offset error drift, RTI(1) TMCS1100A1, TA= –40ºC to +125ºC ±20 µA/°C TMCS1100A2, TA= –40ºC to +125ºC ±14 µA/°C TMCS1100A3, TA= –40ºC to +125ºC ±10 µA/°C TMCS1100A4, TA= –40ºC to +125ºC ±10.75 µA/°C PSRR Power-supply rejection ratio VS = 3 V to 5.5 V, TA= –40ºC to +125ºC 1 mV/V Nonlinearity error VOUT = 0.5 V to VS – 0.5 V ±0.1% CMTI Common mode transient immunity 25 kV/µs CMRR Common mode rejection ratio, RTI(1) 0.1 uA/V Zero current VOUT VREF V RVRR Reference voltage rejection ratio, output referred VREF = 0.5 V to 4.5 V 1 5 mV/V Noise density, RTI(1) TMCS1100A1 380 μA/√Hz TMCS1100A2 330 μA/√Hz TMCS1100A3 300 μA/√Hz TMCS1100A4 225 μA/√Hz INPUT RIN Input conductor resistance IN+ to IN– 1.8 mΩ Input conductor resistance drift TA= –40ºC to +125ºC 7 μΩ/°C G Magnetic coupling factor TA= 25ºC 1.2 mT/A IIN Maximum continuous RMS current (2) TA= 25ºC 30 A IIN Maximum continuous RMS current (2) TA= 85ºC 25 A IIN Maximum continuous RMS current (2) TA= 105ºC 22.5 A

ADVANCE□INFORMATION TMCS1100 www.ti.com SBOS820 –SEPTEMBER 2019 Product Folder Links: TMCS1100 Submit Documentation FeedbackCopyright © 2019, Texas Instruments Incorporated Electrical Characteristics (continued) at TA = 25°C, VS = 5 V, VREF = 2.5 V (unless otherwise noted) PARAMETERS TEST CONDITIONS MIN TYP MAX UNIT (3) Refer to the Transient Response section for details of frequency response of the device. IIN Maximum continuous RMS current (2) TA= 125ºC 16 A VREF Reference input voltage VGND VS V VREF input current VREF = GND, VS ±1 ±5 µA VREF external source impedance Maximum source impedance of external circuit driving VREF 5 kΩ VOLTAGE OUTPUT ZOUT Closed loop output impedance f = 1 Hz to 1 kHz 0.2 Ω f = 10 kHz 2 Ω Maximum capacitive load No sustained oscillation 1 nF Short circuit output current VOUT short to ground, short to VS 90 mA Swing to VS power-supply rail RL = 10 kΩ to GND, TA= –40ºC to +125ºC VS – 0.02 VS – 0.1 V Swing to GND RL = 10 kΩ to GND, TA= –40ºC to +125ºC 5 10 mV FREQUENCY RESPONSE BW Bandwidth(3) –3-dB Bandwidth 80 kHz Nyquist Frequency(3) 125 kHz SR Slew rate Slew rate of output amplifier during single transient step. 1.5 V/µs tr Response time Time between the input current step reaching 90% of final value to the sensor output reaching 90% of its final value, for a 1V output transition. 6.5 µs tp Propagation delay Time between the input current step reaching 10% of final value to the sensor output reaching 10% of its final value, for a 1V output transition. 4 µs tr,SC Short-circuit response time Time between the input current step reaching 90% of final value to the sensor output reaching 90% of its final value. Input current step amplitude is twice full scale linear range. 5 µs tp,SC Short-circuit propagation delay Time between the input current step reaching 10% of final value to the sensor output reaching 10% of its final value. Input current step amplitude is twice full scale linear range. 3 µs POWER SUPPLY IQ Quiescent current TA = 25ºC 4.25 5 mA TA = –40ºC to +125ºC 6 mA

8 Parameter Measurement Information

8.1 Accuracy Parameters

VOUT is the analog output voltage.
S is the ideal sensitivity of the device.
IIN is the isolated input current.
VREF is the voltage applied to the reference voltage input. (1)

8.1.1 Sensitivity, Sensitivity Error, and Drift

Sensitivity is the proportional change in the sensor output voltage due to a change in the input conductor current. of the TMCS1100 is tested and calibrated at the factory for high accuracy. Figure 1. Sensitivity, Offset, and Nonlinearity Error variation of the best-fit measured sensitivity from the ideal sensitivity, based on the variant of the TMCS1100.

eS is the sensitivity error.
Sfit is the best fit sensitivity.
SIdeal is the ideal sensitivity. (2)

ADVANCE□INFORMATION NL NL FS Ve 100% * V OS OEI V / S OE OUT,0A REFV V V S, T drift ppme % S T 1000 C TMCS1100 www.ti.com SBOS820 –SEPTEMBER 2019 Product Folder Links: TMCS1100 Submit Documentation FeedbackCopyright © 2019, Texas Instruments Incorporated Accuracy Parameters (continued) Sensitivity error drift is the worst-case change in sensitivity error per degree Celsius change in ambient temperature. This parameter is reported in ppm/°C. To convert sensitivity error drift to a percentage for a given change in temperature, multiply the drift by the change in temperature and convert to percentage, as in Equation 3. where

Sdrift is the sensitivity error drift.
ΔT is the temperature range from 25°C. (3)

8.1.2 Offset Error and Drift

Offset error is the deviation from the ideal output voltage with zero input current through the device. Offset error can be referred to the output as a voltage error VOE or referred to the input as a current offset error IOS; however, offset error is a single error source and must only be included once in error calculations. The output voltage offset error of the TMCS1100 is the error in the zero current output voltage from the VREF pin voltage. where

VOUT,0A is the device output voltage with zero input current. (4) The total offset error includes multiple individual error sources: errors from the VREF pin potential to VOUT, the magnetic offset of the Hall sensor, and any offset voltage errors of the signal chain. The input referred (RTI) offset error is the output voltage offset error divided by the sensitivity of the device, shown in Equation 5. Refer the offset error to the input of the device to allow for easier total error calculations and direct comparison to input current levels. However the calculations are done, the error sources quantified by VOE and IOS are the same, and must only be included once for error calculations. (5) Offset error specifications are defined at both room temperature and across the full temperature range. Offset error specified over a temperature range is the worst-case sensitivity error at any temperature within the range, and must not be considered as additive to room temperature offset error. Offset error drift is the worst-case rate of change in a device offset across the temperature spectrum, and is used to calculate maximum offset error across an arbitrary temperature range in the same manner as sensitivity drift, and as described in the Total Error Calculation Examples section.

8.1.3 Nonlinearity Error

Nonlinearity is the deviation of the output voltage from a linear relationship to the input current. Nonlinearity voltage, as shown in Figure 1, is the maximum voltage deviation from the best-fit line based on measured parameters, calculated by Equation 6. VNL = VOUT,MEAS – (IMEAS × Sfit + VOUT,0A) where

VOUT,MEAS is the voltage output at maximum deviation from best fit.
IMEAS is the input current at maximum deviation from best fit.
Sfit is the best-fit sensitivity of the device.
VOUT,0A is the device zero current output voltage. (6) Nonlinearity error (eNL) for the TMCS1100 is the nonlinearity voltage specified as a percentage of the full-scale output range (VFS), as shown in Equation 7. (7)

ADVANCE□INFORMATION EXT EXT B BI G OUT EXT Hall V IN Hall V OUT,0AV B * S * A I * G * S * A V Hall VS G * S * A TMCS1100 SBOS820 –SEPTEMBER 2019 www.ti.com Product Folder Links: TMCS1100 Submit Documentation Feedback Copyright © 2019, Texas Instruments Incorporated Accuracy Parameters (continued)

8.1.4 Reference Voltage Rejection Ratio

The zero current output voltage for the TMCS1100 is derived from sampling an external voltage on the VREF pin. Ideally, the zero current output voltage directly tracks VREF; however, slight internal tolerances and mismatches can cause minor errors. When the reference voltage deviates from half of the supply, an additional effective output offset error is introduced into the device transfer function.

8.1.5 External Magnetic Field Errors

The TMCS1100 does not have stray field-rejection capabilities, so external magnetic fields from adjacent high- current traces or nearby magnets can impact the output measurement. The total sensitivity (S) of the device is comprised of the initial transformation of input current to magnetic field quantified as the magnetic coupling factor (G), as well as the sensitivity of the Hall element and the analog circuitry that is factory calibrated to provide a final sensitivity. The output voltage is proportional to the input current by the device sensitivity, as defined in Equation 8. where

S is the TMCS1100 sensitivity in mV/A.
G is the magnetic coupling factor in mT/A.
SHall is the senitivity of the Hall plate in mV/mT.
AV is the analog circuitry gain in V/V. (8) An external field, BEXT, is measured by the Hall sensor and signal chain, in addition to the field generated by the leadframe current, and is added as an extra input term in the total output voltage function: (9) Observable from Equation 9 is that the impact of an external field is an additional equivalent input current signal, IBEXT, shown in Equation 10. This effective additional input current has no dependence on Hall or analog circuitry sensitivity, so all gain variants have equivalent input-referred current error due to external magnetic fields. (10)

ADVANCE□INFORMATION IN+ IN± Hall Element Bias Temperature Compensation Offset Cancellation VREF VOUTPrecision Amplifier Output Amplifier Isolation Barrier VS GND Reference Sampling TMCS1100 www.ti.com SBOS820 –SEPTEMBER 2019 Product Folder Links: TMCS1100 Submit Documentation FeedbackCopyright © 2019, Texas Instruments Incorporated

9 Detailed Description

9.1 Overview

The TMCS1100 is a Hall-sensor-based precision current sensor, featuring a 600-V basic isolation working voltage, < 1% full-scale error across temperature, and an external reference voltage enabling unidirectional or bidirectional current sensing. Input current flows through a conductor between the isolated input current pins. The conductor has a 1.8-mΩ resistance at room temperature for low power dissipation and a 20-A RMS continuous current handling capability up to 125°C ambient temperature on the TMCS1100EVM. The magnetic field generated by the input current is sensed by a Hall sensor and amplified by a precision signal chain. The device can be used for both ac and dc current measurements and has a bandwidth of 80 kHz. There are four fixed- sensitivity device variants for a wide option of linear sensing ranges, and the TMCS1100 can operate with a low voltage supply from 3 V to 5.5 V. The TMCS1100 is optimized for high accuracy and temperature stability, with both offset and sensitivity compensated across the entire operating temperature range.

9.2 Functional Block Diagram

9.3 Feature Description

9.3.1 Current Input

Input current to the TMCS1100 passes through the isolated side of the package leadframe through the IN+ and IN– pins. The current flow through the package generates a magnetic field that is proportional to the input current, and measured by a galvanically isolated, precision, Hall sensor IC. The low-ohmic leadframe path reduces power dissipation compared to alternative current measurement methodologies, and does not require any passive external components on the high-voltage side. In addition, no isolated supplies or control signals are needed on the high-voltage side, further simplifying implementation. As a result of the electrostatic shielding on the Hall sensor die, only the magnetic field generated by the input current is measured, thus limiting input voltage switching pass-through to the circuitry. This configuration allows for direct measurement of currents with high- voltage transients without signal distortion on the current-sensor output. The current input leadframe conductor has a nominal resistance of 1.8 mΩ at 25°C. The leadframe is composed of copper; therefore, the leadframe has a positive temperature coefficient that causes resistance to increase at higher temperatures. A typical temperature coefficient is 3300 ppm/°C, causing a 33% rise in resistivity for every 100°C of leadframe temperature change from room temperature.

9.3.2 Input Isolation

minimum required lifetime of 26 years at 509 VRMS. 424 VRMS. However, at lower working voltages, the corresponding insulation barrier lifetime is much longer. Figure 2. Insulation Lifetime

9.3.3 High-Precision Signal Chain

through the leadframe of the isolated input.

9.3.3.1 Temperature Stability

required operating conditions. precision, even a system with no calibration can reach < 1% of total error current-sensing capability. Figure 3. Offset Error Drift Across Temperature Figure 4. Sensitivity Drift Across Temperature

9.3.3.2 Transient Response

The TMCS1100 signal chain is a discrete time-sampled system with a typical sampling frequency of 250 kHz. signal, the output is a discrete time representation with a phase delay of the integration sampling window. Figure 5. Precision Signal-Chain Response Behavior determines the proportional amplitude of the first and second sampling intervals. Figure 6. Transient Response to Input-Current Step Sufficient for 1-V Output Swing

response time is approximately one integration period. Figure 7. Transient Response to a Large Input Current Step

9.3.4 External Reference Voltage Input

input current can be modified. Figure 8. Output Voltage Relationship to Input Current With Varying VREF Voltages settling, keep the source impedance below the level specified in Electrical Characteristics.

9.3.5 Current-Sensing Measurable Ranges

The TMCS1100 can be configured to allow for bidirectional or unidirectional measurable current ranges based on the external voltage on the VREF pin. The output voltage is a first-order linear function of the input current, as shown in Equation 1, and is only limited by VOUT swing to either supply or ground. Linear output swing range to both VS and GND is calculated by equations Equation 11 and Equation 12. VOUT,max = VS – SwingVS (11) VOUT,min = SwingGND (12) Rearranging the transfer function of the device to solve for input current, and substituting VOUT,max and VOUT,min yields the maximum and minimum measurable input current ranges as shown in Equation 13 and Equation 14. IIN,MAX+ = (VOUT,max – VREF) / S (13) IIN,MAX- = (VREF – VOUT,min) / S where

IIN,MAX+ is the maximum linear measurable positive input current.
IIN,MAX- is the maximum linear measurable negative input current.
S is the sensitivity of the device variant. (14) Setting VREF to the middle of the output swing range provides bidirectional measurement capability, whereas setting VREF close to the ground provides a unidirectional measurement. Custom ranges with nonuniform positive and negative input current ranges can be achieved by appropriately scaling the VREF potential relative to the full output voltage range.

9.4 Device Functional Modes

9.4.1 Power-Down Mode

As a result of the inherent galvanic isolation of the device, very little consideration must be paid to powering down the device, as long as the limits in the Absolute Maximum Ratings table are not exceeded on any pins. The isolated current input and the low-voltage signal chain can be decoupled in operational behavior, as either can be energized with the other shut down, as long as the isolation barrier capabilities are not exceeded. The low- voltage power supply can be powered down while the isolated input is still connected to an active high-voltage signal or system.

ADVANCE□INFORMATION TMCS1100 www.ti.com SBOS820 –SEPTEMBER 2019 Product Folder Links: TMCS1100 Submit Documentation FeedbackCopyright © 2019, Texas Instruments Incorporated NOTE Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality.

10.1 Application Information

The key feature sets of the TMCS1100 provide significant advantages in any application where an isolated current measurement is required.

Galvanic isolation provides a high isolated working voltage and excellent immunity to input voltage transients.
Hall based measurement simplifies system level solution without the need for a power supply on the high voltage (HV) side.
An input current path through the low impedance conductor minimizes power dissipation.
Excellent accuracy and low temperature drift eliminate the need for multipoint calibrations without sacrificing system performance.
An external reference input maximizes flexibility for unidirectional or bidirectional measurement with custom dynamic ranges, and improves accuracy at the system level.
A wide operating supply range enables a single device to function across a wide range of voltage levels. These advantages increase system-level performance while minimizing complexity for any application where precision current measurements must be made on isolated currents. Specific examples and design requirements are detailed in the following section.

ADVANCE□INFORMATION OS, T REF EXTworst, T I PSRR CMRR V B S, T NLe (%) e e e e e e e '' ' OS REF EXTworst I PSRR CMRR V B S NLe (%) e e e e e e e TS S S,drift S,FTe (%) min e e *1000 * T;e ª º '¬ ¼ OS, T OS,RT OS,drift OS,FT I IN min I I * T;I e (%) I' ª º ' ¬ ¼ EXT EXT B IN B Ge (%) I REF S REF V IN VRVRR (V ) 2 S e (%) I u S PSRR IN PSRR * (V 5)e (%) I CM CMRR IN CMRR * Ve (%) I OS OS I IN Ie (%) I TMCS1100 SBOS820 –SEPTEMBER 2019 www.ti.com Product Folder Links: TMCS1100 Submit Documentation Feedback Copyright © 2019, Texas Instruments Incorporated Application Information (continued)

10.1.1 Total Error Calculation Examples

Total error can be calculated for any arbitrary device condition and current level. Error sources considered should include input-referred offset current, power-supply rejection, input common-mode rejection, sensitivity error, nonlinearity, VREF to VOUT gain error, and the error caused by any external fields. Compare each of these error sources in percentage terms, as some are significant drivers of error and some have inconsequential impact to current error. Offset (Equation 15), CMRR (Equation 16), PSRR (Equation 17), VREF gain error (Equation 18), and external field error (Equation 19) are all referred to the input, and so, are divided by the actual input current IIN to arrive percentage errors. For calculations of sensitivity error and nonlinearity error, the percentage limits explicitly specified in the Electrical Characteristics table can be used. (15) (16) (17) (18) (19) When calculating error contributions across temperature, only the input offset current and sensitivity error contributions vary significantly. In both cases, specifications for both the maximum device temperature range and the parameter drift across temperature are provided. For determining actual performance limits across a narrower temperature range than the specified –40°C to +125°C, use Equation 20 and Equation 21 for offset error and sensitivity error, respectively. In both of these calculations, the maximum specified drift for the parameter can be multiplied by the desired temperature deviation from room temperature (ΔT). Use the smaller value of this drift calculation and the specified range over the full temperature range. The sensitivity drift (eS,drift) is specified in ppm/°C, and must be converted to percentage error. (20) (21) In order to accurately calculate the total expected error of the device, the contributions from each of the individual components above must be understood in reference to operating conditions. There are two separate ways to calculate total error for any particular system. In a worst case scenario, each error term would be at its absolute maximum with the same polarity. In such a case, the total system error would be a mathematical summation of each individual error source, as shown in Equation 22 for room temperature. For across temperature worst case error, the input referred offset and sensitivity error for the relevant range should be substituted in place of the room temperature values, as in Equation 23. (22) (23)

temperature and across the full temperature range with VS of 5 V. Figure 9. RSS Error vs Input Current

10.1.1.1 Room Temperature Error Calculations

ignored for total error calculations. Table 1. Total Error Calculation: Room Temperature Example

10.1.2 Safe Operating Area

leadframe. These mechanisms depend on pulse duration, amplitude, and device thermal states.

10.1.2.1 Continuous-Current Capability

based on the rms continuous-current level. adding heat sinking structures to the area of the device can all improve thermal performance. Figure 10. Maximum Continuous RMS Current vs Ambient Temperature

10.1.2.2 Short-Duration Current Capability

duration current capability and the rms continuous current levels for the duration of the subsequent pulse events. Figure 11. Single-Pulse Leadframe Capability

10.2 Typical Application

levels and the low-voltage control circuitry. Figure 12 illustrates the use of the TMCS1100 in such an application. Figure 12. Inline Motor Phase Current Sensing

10.2.1 Design Requirements

current measurement of ±20 A is required. Table 2. Example Application Design Requirements

10.2.2 Detailed Design Procedure

transimpedance with a variable offset set by VREF, defined by Equation 26. Table 3 along with the calculated output range. Table 3. Example Application Design Parameters Equation 29 for a unidirectional current (IU,MAX), and Equation 30 for a bidirectional current (IB,MAX).

SA<x> is the sensitivity of the relevant A1-A4 variant. (30) Table 4 shows such calculation for each gain variant of the TMCS1100 with the appropriate sensitivities.

Table 4. Maximum Full-Scale Current Ranges With 4.65-V Output Range the maximum-calculated ±23.2 A linear measurable range is sufficient for the desired ±20-A full-scale current.

within the linear measurement range, shown in Equation 31 and Equation 32. voltage ranges as in Equation 33 and Equation 34. as current flowing into the IN+ pin. Table 5. Example VREF Limits and Associated Current Ranges The transfer function of the TMCS1100 linear sensing range for these design parameters is shown in Figure 13. Figure 13. Application Example Design Transfer Curve

Resistor divider from the supply voltage
Resistor divider from an ADC full-scale reference
Dedicated or preexisting voltage reference IC
DAC or reference voltage from a system microcontroller Each of these options has benefits, and the error terms, noise, simplicity, and cost of each implementation must be weighed. In the current design example, any of these options are potentially available as a 2.5-V VREF is midrail of the power supply, a common IC reference voltage, and might already be available in the system. If the primary consideration for the current application design is to maximize precision while minimizing temperature drift and noise, a dedicated voltage reference must be chosen. For this case, the LM4030C-2.5 can be chosen for to optimize system accuracy without significant cost addition. Figure 14 depicts the current-sense system design as discussed.

Figure 14. TMCS1100 Example Current-Sense System Design

11 Power Supply Recommendations

12 Layout

12.1 Layout Guidelines

Use large copper planes for both input current path and isolated power planes and signals.
Use heavier copper PCB construction.
Place thermal via farms around the isolated current input.
Provide airflow across the surface of the PCB. The TMCS1100 senses external magnetic fields, so make sure to minimize adjacent high-current traces in close proximity to the device. The input current trace can contribute additional magnetic field to the sensor if the input current traces are routed parallel to the vertical axis of the package. Figure 15 illustrates the most optimal input current routing into the TMCS1100. As the angle that the current approaches the device deviates from 0° to the horizontal axis, the current trace contributes some additional magnetic field to the sensor, increasing the effective sensitivity of the device. If current must be routed parallel to the package vertical axis, move the routing away from the package to minimize the impact to the sensitivity of the device. Terminate the input current path directly underneath the package lead footprint, and use a merged copper input trace for both the IN+ and IN– inputs.

Figure 15. Magnetic Field Generated by Input Current Trace

overmold compound to meet system-level requirements. Figure 16. Layout for System Creepage Requirements

12.2 Layout Example

and magnetic characteristics of this layout, subject to change. Figure 17. Recommended Board Top (Left) and Bottom (Right) Plane Layout

13 Device and Documentation Support

13.1 Device Support

13.1.1 Development Support

For development tool support see the following:

TMCS1100EVM
TMCS1100 TI-TINA Model
TMCS1100 TINA-TI Reference Design

13.2 Documentation Support

13.2.1 Related Documentation

For related documentation see the following:

Texas Instruments, TMCS1100EVM users's guide
Texas Instruments, Enabling Precision Current Sensing Designs with Nonratiometric Magnetic Current Sensors
Texas Instruments, Low-Drift, Precision, In-Line Isolated Magnetic Motor Current Measurements
Texas Instruments, Isolation Glossary

13.3 Receiving Notification of Documentation Updates

To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper right corner, click on Alert me to register and receive a weekly digest of any product information that has changed. For change details, review the revision history included in any revised document.

13.4 Support Resources

TI E2E™ support forums are an engineer's go-to source for fast, verified answers and design help — straight from the experts. Search existing answers or ask your own question to get the quick design help you need. Linked content is provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use.

13.5 Trademarks

E2E is a trademark of Texas Instruments. All other trademarks are the property of their respective owners.

13.6 Electrostatic Discharge Caution

This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.

13.7 Glossary

SLYZ022 — TI Glossary. This glossary lists and explains terms, acronyms, and definitions.

14 Mechanical, Packaging, and Orderable Information

The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation.

www.ti.com 12-Sep-2019 Addendum-Page 1 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead/Ball Finish (6) MSL Peak Temp (3) Op Temp (°C) Device Marking (4/5) Samples PMCS1100A1QDR ACTIVE SOIC D 8 2500 TBD Call TI Call TI -40 to 125 PMCS1100A2QDR ACTIVE SOIC D 8 2500 TBD Call TI Call TI -40 to 125 PMCS1100A3QDR ACTIVE SOIC D 8 2500 TBD Call TI Call TI -40 to 125 PMCS1100A4QDR ACTIVE SOIC D 8 2500 TBD Call TI Call TI -40 to 125 (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.

www.ti.com 12-Sep-2019 Addendum-Page 2 In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

www.ti.com PACKAGE OUTLINE C .228-.244 TYP [5.80-6.19] .069 MAX [1.75] 6X .050 [1.27] 8X .012-.020 [0.31-0.51] .150 [3.81] .005-.010 TYP [0.13-0.25] 0 - 8 .004-.010 [0.11-0.25] .010 [0.25].016-.050 [0.41-1.27] 4X (0 -15 ) A .189-.197 [4.81-5.00] NOTE 3 B .150-.157 [3.81-3.98] NOTE 4 4X (0 -15 ) (.041) [1.04] SOIC - 1.75 mm max heightD0008A SMALL OUTLINE INTEGRATED CIRCUIT 4214825/C 02/2019 NOTES: 1. Linear dimensions are in inches [millimeters]. Dimensions in parenthesis are for reference only. Controlling dimensions are in inches. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed .006 [0.15] per side. 4. This dimension does not include interlead flash. 5. Reference JEDEC registration MS-012, variation AA. 1 8 .010 [0.25] C A B PIN 1 ID AREA SEATING PLANE .004 [0.1] C SEE DETAIL A DETAIL A TYPICAL SCALE 2.800

www.ti.com EXAMPLE BOARD LAYOUT .0028 MAX [0.07] ALL AROUND .0028 MIN [0.07] ALL AROUND (.213) [5.4] 6X (.050 ) [1.27] 8X (.061 ) [1.55] 8X (.024) [0.6] (R.002 ) TYP [0.05] SOIC - 1.75 mm max heightD0008A SMALL OUTLINE INTEGRATED CIRCUIT 4214825/C 02/2019 NOTES: (continued) 6. Publication IPC-7351 may have alternate designs. 7. Solder mask tolerances between and around signal pads can vary based on board fabrication site. METAL SOLDER MASK OPENING NON SOLDER MASK DEFINED SOLDER MASK DETAILS EXPOSED METAL OPENING SOLDER MASK METAL UNDER SOLDER MASK SOLDER MASK DEFINED EXPOSED METAL LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE:8X SYMM 4 5 SEE DETAILS SYMM

www.ti.com EXAMPLE STENCIL DESIGN 8X (.061 ) [1.55] 8X (.024) [0.6] 6X (.050 ) [1.27] (.213) [5.4] (R.002 ) TYP [0.05] SOIC - 1.75 mm max heightD0008A SMALL OUTLINE INTEGRATED CIRCUIT 4214825/C 02/2019 NOTES: (continued) 8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 9. Board assembly site may have different recommendations for stencil design. SOLDER PASTE EXAMPLE BASED ON .005 INCH [0.125 MM] THICK STENCIL SCALE:8X SYMM SYMM 4 5

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Summary

TMCS1100 High-Precision, Isolated Current Sensor With External Reference

Description