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Mixer and IF Vector Modulator PMB 2208 Version V1.2 Specification August 1999 preliminary
Edition 03.99 Published by Infineon Technologies AG i. Gr., SC, Balanstraße 73,
81541 München
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Product InfoWireless Components Confidential Specification, August 1999 Package PMB 2208 preliminary Product Info General Description The PMB 2208 contains a direct quadrature modulator and an up/down- conversion mixer with corresponding bias circuitry.
Features
■ Direct quadrature modulator and up/down-conversion mixer on one chip ■ Modulator: - LO input frequency range from 200MHz to 550MHz corresponds to an output frequency range from 100MHz to 275MHz - Generation of orthogonal carriers without external elements and with- out trimming - typ. 48dB carrier suppression with pp baseband level - typ. 49dB SSB suppression with 1Vpp baseband level - typ. 51dB rejection of third-order intermodulation products with 1Vpp baseband level - Low output noise floor ■ Mixer: - Double-balanced Gilbert cell - RF and IF frequency range from DC to 2.5GHz - typ 39dB carrier suppression - Low noise ■ Supply voltage range from 2.7 to 4.5V ■ Power-down mode ■ Temperature range -30 to 85°C Application ■ Vector-modulated digital mobile cellular systems, such as GSM, PDC-800, PDC-1.5, PHS, DAMPS, DCS1800, WLAN, etc. ■ Various modulation schemes, such as PM, PSK, FSK, QAM, QPSK, GMSK, etc. ■ Analog systems with FM and AM modulation ■ Space- and power-saving optimi- zations of existing discrete trans- mitter circuits
Ordering Information
Type Ordering Code Package PMB 2208 P-TSSOP-24
1 Table of Contents
2 Product Description
Specification, August 1999
2.1 Overview
The PMB 2208 contains a direct quadrature modulator and an up/down-conver- sion mixer with corresponding bias circuitry. The modulator splits the signal at the LO/LOX input into two orthogonal carri- ers. The frequency of these carriers is half of the LO/LOX input frequency. The carriers are multiplied with the baseband modulation signals at the A/AX and B/BX inputs. The outputs of the multipliers are added and amplified by a linear output stage. The modulated signal is available at the E/EX output. A reference voltage is available at the TREF output, which can be used to bias the base- band inputs. The mixer combines the signals at the RF/RFX and IF/IFX inputs; the resulting signal is available at the MO/MOX output. The IF/IFX input is suitable for the lower-frequency signal because of its linear transfer function to the output. The higher-frequency signal is applied to the RF/RFX input, which operates in switched mode. In a typical application, the output signal of the modulator is band-pass filtered and then fed to the IF/IFX input of the mixer. The modulator and mixer have separate power supplies, and can be powered down independently. The power-down concept enables the modulator to be used with or without the mixer.
2.2 Features
■ Direct quadrature modulator and up/down-conversion mixer on one chip ■ Modulator: - LO input frequency range from 200MHz to 550MHz corresponds to an out- put frequency range from 100MHz to 275MHz - Generation of orthogonal carriers without external elements and without trimming - typ. 48dB carrier suppression with 1Vpp baseband level - typ. 49dB SSB suppression with 1Vpp baseband level - typ. 51dB rejection of third-order intermodulation products with 1Vpp base- band level - Low output noise floor ■ Mixer: - Double-balanced Gilbert cell - RF and IF frequency range from DC to 2.5GHz - typ 39dB carrier suppression -L o w n o i s e
Specification, August 1999 ■ Supply voltage range from 2.7 to 4.5V ■ Power-down mode ■ P-TSSOP-24 package ■ Temperature range -30 to 85°C
2.3 Applications
■ Vector-modulated digital mobile cellular systems, such as GSM, PDC-800, PDC-1.5, PHS, DAMPS, DCS1800, WLAN, etc. ■ Various modulation schemes, such as PM, PSK, FSK, QAM, QPSK, GMSK, etc. ■ Analog systems with FM and AM modulation ■ Space- and power-saving optimizations of existing discrete transmitter cir- cuits
2.4 Package Outlines
3 Functional Description
Specification, August 1999
3.1 Pin Configuration
Pin_config.wmf Figure 3-1 Pin Configuration RFX GND IF IFX PD2 GND E EX VCC1 GND B BX RF VCC2 MOX MO GND GND LOX LO PD1 TREF A AX PMB 2208
Specification, August 1999
3.2 Pin Definition and Function
Table 3-1 Pin Definition and Function Pin No. Symbol Function
1 RF RF input (base)
2 VCC2 Mixer supply voltage
3 MOX Inverted mixer output (open collector)
4 MO Mixer output (open collector)
5 GND Ground
6 GND Ground
7 LOX Inverting modulator LO input
8 LO Modulator LO input
9 PD1 Modulator power-down
10 TREF Reference voltage output (DC bias for A, AX, B, BX)
11 A Modulation input A
12 AX Inverting modulation input A
13 BX Inverting modulation input B
14 B Modulation input B
15 GND Ground
16 VCC1 Modulator supply voltage
17 EX Inverted modulator output (open collector)
18 E Modulator output (open collector)
19 GND Ground
20 PD2 Mixer power-down
21 IFX Inverting IF input (emitter)
22 IF IF input (emitter)
23 GND Ground
24 RFX Inverting RF input (base)
Specification, August 1999
3.3 Internal Input/Output Circuits
A AX B BX GND VCC1 EX GND PD2 IFX IF GND RFX E RF GND GND PD1 bias2 2kΩ 2kΩ 800Ω 800Ω 200kΩ 200kΩ bias1200kΩ 200kΩ 7kΩ
Specification, August 1999
3.4 Functional Block Diagram
Funct_block.wmf Figure 3-2 Functional Block Diagram RF VCC2 MOX MO GND GND LOX LO PD1 TREF A AX RFX GND IF IFX PD2 GND E EX VCC1 GND B BX mixer mixer bias mixermixer ƒ÷ 2 modu- lator bias output stage input buffer frequency divider
Specification, August 1999
3.5 Circuit Description
The modulator performs a direct quadrature modulation. The LO signal is con- nected to an emitter-coupled transistor pair. The LO signal is split internally into two orthogonal carriers at half of the LO/LOX input frequency. The accuracy of the internal 90° phase shift requires a balanced input signal and depends on the accuracy of the 50% duty cycle of the LO/LOX signal. The modulator has two Gilbert cell mixers, in which the baseband modulation signals at the A/AX and B/BX inputs are multiplied with the orthogonal carriers. The outputs of the two Gilbert cells are added and amplified by a linear output stage. The modulated transmit signal is available at the high-impedance, open-collector output E/EX. It can be band-pass filtered and fed to the IF/IFX input of the mixer. At the TREF output, a reference voltage is available, which should be capaci- tively decoupled to ground. TREF can be used to set the DC bias of the base- band inputs using external resistors. Alternatively, the DC level can be set independently of TREF, provided it is within the specified operational range. The up/down-conversion mixer is a fully-balanced Gilbert cell. The transfer function from the low-impedance emitter input IF/IFX to the output is linear for input levels below the 1dB compression point. For improved intermodulation, the mixer current can be increased with external resistors to ground at IF/IFX. The high-impedance input RF/RFX is directly connected to the bases of the switching transistors. The input level should be high enough to ensure proper switching. The output signal of the mixer is available at the high-impedance, open-collector outputs MO/MOX. The modulator and the mixer have separate supply and power-down pins: VCC1, PD1 for the modulator and VCC2, PD2 for the mixer. Applying a logic LOW to PD1 or PD2 powers down the corresponding part of the chip, including its bias circuitry. Depending on the application, the power-down pins can be combined or separately fixed to supply rails.
4 Applications
Applications
Specification, August 1999
4.1 Circuits
Appl_circuit.eps Figure 4-1 Application Circuit
Specification, August 1999
4.2 Hints
5 Reference
Specification, August 1999
5.1 Electrical Data
5.1.1 Absolute Maximum Ratings
- The RF pins 3, 4, 17 and 18 are not protected against voltage stress > 300V (versus VS or GND). The high frequency performance prohibits the use of adequate protective structures. WARNING The maximum ratings may not be exceeded under any circumstances, not even momentarily and individually, as permanent damage to the IC will result. Table 5-1 Absolute Maximum Ratings Parameter Symbol Limit Values Unit Remarks min max Supply voltage 9CC -0.5 5.0 V Input voltage (except IF, IFX) 9I -0.5 9CC +0.5 5.0 V 9CC ≤ 4.5V 9CC > 4.5V Input voltage IF, IFX 9IF 2 V Input current IF, IFX ,IF 10 mA Differential input voltage 9I − 9IX -2 2 V Output voltage TREF 9TREF -0.5 9CC +0.5 5.0 V 9CC ≤ 4.5V 9CC > 4.5V Output voltage MO, MOX 9MO -0.5 9CC +1.0 5.5 V 9CC ≤ 4.5V 9CC > 4.5V Output voltage E, EX 9E 9CC −1.0 9CC +1.0 5.5 V 9CC ≤ 4.5V 9CC > 4.5V Junction temperature 7j 125 °C Storage temperature 7S -55 125 °C Thermal resistance (junction to lead) 5thJL 140 K/W ESD integrity * 9ESD -1000 1000 V according MIL-STD 883D, method 3015.7 and EOS/ESD assn. standard S5.1 - 1993
Specification, August 1999
5.1.2 Operating Range
3RZHUOHYHOVDUHUHIHUUHGWRDQLPSHGDQFHRI Ω Table 5-2 Operating Range, Supply voltage VCC =2.7V to 4.5 V, ambient temperature TA = -30 to 85°C Parameter Symbol Limit Values Unit Remarks Item min max Control inputs PD1, PD2 LOW input voltage 9IL 0 0.8 V 1 HIGH input voltage 9IH 2.1 9CC V 2 Mixer RF, RFX input frequency IRF DC 2.5 GHz 3 RF, RFX input level 3RF 0 dBm 4 IF, IFX input frequency IIF DC 2.5 GHz 5 IF, IFX input level 3IF 0 dBm 6 MO, MOX output frequency IMO DC 2.5 GHz 7 Minimum resistive load at IF, IFX to GND R 2, R3 in Test Circuit 1 33 Ω 8 Modulator LO, LOX input frequency ILO 200 550 MHz 9 LO, LOX input level 3LO -15 -10 dBm dBm f LO =200MHz fLO =550MHz Suppression of the even har- monics at the LO, LOX input DHn2 40 dB 11 A, AX, B, BX input frequency IA-AX IB-BX 0 10 MHz 12 A, AX, B, BX input level 9A9AX 9B9BX 1.4 9CC − 0.6 VD C 13 A-AX, B-BX differential input signal level 9A-AX 9B-BX
1 Vpp AC 14
Load current at TREF ITREF 1.0 mA 16
Specification, August 1999
5.1.3 AC/DC Characteristics
AC/DC characteristics involve the spread of values guaranteed within the spec- ified supply voltage and ambient temperature range. Typical characteristics are the median of the production. Table 5-3 AC/DC Characteristics with TA =+25 °C, VCC =2.7 to 4.5V Symbol Limit Values Unit Test Conditions LI t e m min typ max Supply Currents Supply current when all powered up ,VCC1 ,E+,EX ,VCC2 ,MO +,MOX 0.3 0.6 1.0 mA mA mA mA PD1,PD2=H Supply current when all powered down ,VCC1 ,E+,EX ,VCC2 ,MO +,MOX µA µA µA µA PD1,PD2=L Control inputs PD1, PD2 LOW input current ,IL 24 µA 9IL=0.8V 3 HIGH input current ,IH 91 8 µA 9IH=2.1V 4 Power-up settling time for modulator WPU 2) 2 µs 1nF at TREF *5 Mixer input IF/IFX Internal DC voltage 9IF 3) 0.3 V 6 Mixer input RF/RFX Internal DC voltage 9RF 2.0 V 7 Mixer output MO/MOX: Output power 3MO -12 -9 -6 dBm P RFIN = -5dBm fRFIN = 1.4GHz PIFIN = -5dBm fIFIN = 400MHz Gain with power matching *MO 4) +3 dB Application Circuit ■ 9 1dB compression point 3IF1dB 4) -7 dBm PRFIN > -4dBm Application Circuit ■ 10 Noise figure 1IF 4) 8 dB DSB noise, I =1GHz Application Circuit ■ 11 Carrier suppression DC 25 39 dB P RFIN = -5dBm fRFIN = 1.4GHz PIFIN = -5dBm fIFIN = 400MHz
Specification, August 1999 Table 5-3 AC/DC Characteristics with TA =+25 °C, VCC =2.7 to 4.5V (continued) Symbol Limit Values Unit Test Conditions LI t e m min typ max Modulator inputs A/AX and B/BX: 9A =9AX =9B =9BX = 1.75V Differential input Resistance5A-AX 5B-BX 250 kΩ I=100kHz ■ 13 Differential input Capacitance&A-AX &B-BX 1 pF I=100kHz ■ 14 Input DC current ,A,AX ,B,BX 2.5 5.0 10 µA Differential input voltage = 0V Differential input offset current ,OSA ,OSB -1 1 µA 16 Modulator inputs LO/LOX: Differential input Resistance5LO-LOX 4 kΩ I/c47/c50 =350MHz ■ 17 Differential input Capacitance&LO-LOX 0.4 pF I/c47/c50 =350MHz ■ 18 Reference voltage output TREF for A/AX and B/BX inputs: Output voltage 9TREF 1.65 1.75 1.85 V 19 Modulator output E/EX: 3LO = -10dBm, IA-AX =IB-BX = 455kHz, 9A-AX = 9B-BX = 1Vpp, 90° phase shift Output power 3E -7 -4 -1 dBm 20 Output power with power matching 4) 0 dBm Application circuit ■ 21 Carrier suppression DC 6) 33 48 dB 22 Single sideband supression DSSB 35 49 dB 23 Suppression of third order intermodulation products DIM3 7) 45 51 dB 24 Output noise floor 3N 5) -144 dBc/ Hz 20MHz from carrier Application circuit ■ 25 Differential output resistance5E-EX 20 kΩ I/c40 =175MHz ■ 26 Differential output capaci- tance &E-EX 0.4 pF I/c40 =175MHz ■ 27 RMS phase error of output signal φe 0.4 1.0 Degree 28 ■ This value is only measured in lab. * guaranteed by design
Specification, August 1999 1) The mixer current decreases when no external resistors to ground are connected at IF and IFX. In this case the typical value of /c44 MO +/c44 MOX is 1mA. 2) Design hint. The settling time is determined by the time required to charge the external capacitors. 3) Note: There are external resistors (82 Ohms) at IF and IFX to ground. 4) Application hint 5) Design hint 6) The carrier suppression can be optimized for a particular application using offset voltages at the baseband inputs A/AX and B/BX. The optimum values can be found iteratively by adjusting the A/AX and B/BX offsets alternately until the carrier disappears into the noise floor. If the actual offset voltages differ from their optimum values by Δ9 /c50/c54/c36 and Δ9/c50/c54/c37 , the carrier suppression in dB is given by where 9/c80 is the peak value of the signal voltage at A/AX and B/BX. 7) /c68 IM3 can be increased by reducing the amplitude of the modulator inputs VA-AX and VB-BX . ac 20 log10 V m V OSAΔ() 2 V OSBΔ() 2+
Specification, August 1999
5.2 S-Parameters and Input/Output Impedances
The S-parameters provided in this section are based on measurements at the supply voltage of VCC = 3.6V. Via the internal bias tees of the NWA the capacitive coupling is done and the open collector pins are connected to VCC. The S-parameters have to be considered as application hints. The input/output impedances are calculated from these parameters. The impedances are given as equivalent circuit with lumped elements for differential and single ended in-/outputs. As equivalent circuit for these in-/outputs a resistor Rp parallel to a capacitance Cp is derived: S_Parameter.wmf The IF-Input impedance is given as a equivalent circuit of a resistor Rs serial to a inductivity Ls: S_Parameter_2.wmf Table 5-4 Test Frequency [MHz] Port 1 Port 2 Output levels RF-Input impedance 50 - 2500 RF RFX -5 dBm IF-Input impedance 50 - 2500 IF IFX -30 dBm MO-Output impedance 50 - 2500 MO MOX -30 dBm single ended Rps Cps differential Rpd Cpd single ended Rss Lss differential Rsd Lsd
Specification, August 1999
5.2.1 Mixer Input RX/RFX
Circuit for measurement: Mixer Input RF/RFX S-Parameters: Mixer Input RX/RFX Impedances: /c44/c41 /c44/c41 /c59 /c48/c50 /c48/c50/c59 /c53/c41 /c53/c41 /c59 1:$ Ω S S Ω /c57 /c38/c38/c21 /c51/c39/c21 6XSSO\\ Ω ’87 Ω f S11 S21 S12 S22 MHz mag ang mag ang mag ang mag ang 2500 0.586 /c19 /c24/c19/c19 /c20/c19/c19/c19 /c20/c24/c19/c19 /c21/c19/c19/c19 /c21/c24/c19/c19 /c73/c3/c76/c81 /c3/c48 /c43 /c93 /c19 /c19/c17/c24 /c20 /c20/c17/c24 /c21 /c21/c17/c24 /c22 /c53/c3/c76 /c81/c3/c78/c50/c75/c80 /c53/c83/c71 /c53/c83/c86 /c19 /c24/c19/c19 /c20/c19/c19/c19 /c20/c24/c19/c19 /c21/c19/c19/c19 /c21/c24/c19/c19 /c73/c3/c76/c81 /c3/c48 /c43 /c93 /c19/c17/c23 /c19/c17/c25 /c19/c17/c27 /c20 /c20/c17/c21 /c20/c17/c23 /c20/c17/c25 /c20/c17/c27 /c38/c3/c76 /c81/c3/c83/c41 /c38/c83/c71 /c38/c83/c86
Specification, August 1999
5.2.2 Mixer Input IF/IFX
Circuit for measurement: Mixer Input IF/IFX S-Parameters: Mixer Input IF/IFX Impedances: 1:$ /c44/c41 /c44/c41 /c59 /c48/c50 /c48/c50/c59 /c53/c41 /c53/c41 /c59 Ω Ω Ω Ω /c20/c81 /c41/c20/c81 /c41 /c57/c38/c38/c21 /c51/c39/c21 ’87 6XSSO\\ Ω /c37/c76/c68 /c86/c3/c55 /c72/c72 /c37/c76/c68/c86 /c3/c55/c72 /c72 /c44/c81 /c87/c72 /c85 /c81 /c68/c79 /c37/c76/c68 /c86/c3/c55 /c72/c72 /c86 f S11 S21 S12 S22 MHz mag ang mag ang mag ang mag ang /c19 /c24/c19/c19 /c20/c19/c19/c19 /c20/c24/c19/c19 /c21/c19/c19/c19 /c21/c24/c19/c19 /c73/c3/c76/c81 /c3/c48 /c43 /c93 /c20/c24 /c21/c19 /c21/c24 /c22/c19 /c22/c24 /c23/c19 /c53/c3/c76 /c81/c3/c50/c75/c80 /c53/c86/c71 /c53/c86/c86 /c19 /c24/c19/c19 /c20/c19/c19/c19 /c20/c24/c19/c19 /c21/c19/c19/c19 /c21/c24/c19/c19 /c73/c3/c76/c81/c3/c48/c43/c93 /c20/c17/c24 /c21 /c21/c17/c24 /c22 /c22/c17/c24 /c23 /c23/c17/c24 /c24 /c24/c17/c24 /c47/c3/c76 /c81/c3/c81/c43 /c47/c86/c71 /c47/c86/c86
Specification, August 1999
5.2.3 Mixer Output MO/MOX
Circuit for measurement: Mixer Output MO/MOX S-Parameters: Mixer Output MO/MOX Impedances: /c44/c41 /c44/c41 /c59 /c48/c50 /c48/c50 /c59 /c53/c41 /c53/c41/c59 ’87 Ω Ω Ω Ω 1:$ 3RZHU 6XSSO\\ /c57/c38/c38/c21 /c51/c39 /c21 /c20/c81 /c41/c20/c81 /c41 /c44/c81/c87 /c72/c85/c81/c68 /c79 /c37/c76/c68/c86 /c3/c55/c72 /c72/c86 Ω /c37/c76 /c68/c86/c3 /c55/c72/c72 /c37/c76 /c68/c86/c3/c55 /c72/c72 f S11 S21 S12 S22 MHz mag angle mag angle mag angle mag angle /c19 /c24/c19/c19 /c20/c19/c19/c19 /c20/c24/c19/c19 /c21/c19/c19/c19 /c21/c24/c19/c19 /c73/c3/c76/c81 /c3/c48 /c43 /c93 /c19 /c24 /c20/c19 /c20/c24 /c21/c19 /c21/c24 /c53/c3/c76 /c81/c3/c78/c50/c75/c80 /c53/c83/c71 /c53/c83/c86 /c19 /c24/c19/c19 /c20/c19/c19/c19 /c20/c24/c19/c19 /c21/c19/c19/c19 /c21/c24/c19/c19 /c73/c3/c76/c81 /c3/c48 /c43 /c93 /c19/c17/c22 /c19/c17/c23 /c19/c17/c24 /c19/c17/c25 /c19/c17/c26 /c19/c17/c27 /c19/c17/c28 /c20 /c20/c17/c20 /c38/c3/c76 /c81/c3/c83/c41 /c38/c83/c71 /c38/c83/c86
Specification, August 1999
5.3 Test Circuit
B /c53/c41 /c59 /c42/c49/c39 /c44/c41 /c44/c41 /c59 /c51/c39/c21 /c42/c49 /c39 /c40 /c40/c59 /c57/c38/c38/c20 /c42/c49 /c39 /c37 /c37/c59/c36/c59 /c36 /c55/c53 /c40 /c41 /c51/c39 /c20 /c47/c50 /c47/c50 /c59 /c42/c49/c39 /c42/c49 /c39 /c48/c50 /c48/c50/c59 /c57/c38/c38/c21 /c53/c41 C23 C26 C24 1nF RFIN IFIN PD2 EOUT PD1 LOIN 1nF C10 1nFMOUT 1nF VCC2 1nF TR1 1nF TR2 C15 1nF C13 C14 1nF 1nF C16 1nFC18 C19 AIN 22nF C17 220Ω 22nF 22nF 27Ω TR4 C20 1nF C21 TR5 1nF 1nF C25 1nF C28 C29 C27 22nF 220Ω 22nF 22nF A AX TR3 TR7 TR6 VCC1 BX BIN 27Ω C22 1nF 82Ω 82Ω 100Ω 100Ω 2.2kΩ 2.2kΩ R10 2.2kΩ R12 R11 2.2kΩ TREF