PM15CMA060 IRF | Alldatasheet

Document overview

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Technical content

Features

  • 3 phase IGBT bridge with drive and protection circuit. eli * 2kW output power at 300VDC, 8kHz, To = 85°C F ! - "UltraFast"™ IGBT and "HEXFRED"™ Uitratast, Soft Recovery Nt | | “ + Over current short circuit, earth fault, under voltage and over wr ae temperature protection. - Fault feedback. - Carrier frequencies up to 25kHz PM

Description

The PM15CMA060 is a 3 phase intelligent IGBT bridge with gate drive and protection circuit. It contains IR "UltraFast"™ series IGBTs and"HEXFRED"™ Ultrafast, soft recovery diodes, rendering itSuitable for5to 25 kHz switching frequencies. Built-in driver and protection circuit makes itthe idea! building block for AC Motor Speed Controllers, Brushless Servo Drives, UPS and other inverter systems. . Absolute Maximum Ratings: Power Circuit a Units He @ Ye= 25°C | Coniruous Colecor Curent each ISBT, oneIGBTincanducton | i ——— A He@ To= 05°C | Continuous Cotector Curent, each GBT, one IGBT in conduction [797 —-—— Ncz__| ConrwousGoletorto-EmiterVatage a9. y co | Supply Voltage Between Pa} 7. —— $0-@ Te= 85°C | Power Dissipaton, One IGBTin Conduction | 3 1 ______ [Operating Junction Temperature Range perating kmeton TemperatureRange | Bw 180 Driver and Protection Circuit a ee ye] ire Sepp Vatinge Wi | Losi Input Voie Between input Pin and GND} 335553 — v | joo | Open Collector Faut Guput votage | aso vows — je____| AverapeinputSupply Curent ee Ho _ | Feut up Curent OO Total System - Parameter a Unit: Veo, _| RIMS lation Vtage, Ay Terrinalto Case, 1 Minute | > ——— Revenon 4

Electrical Characteristics @ T, = 25°C {unless otherwise specified): Power Circuit | | __ Parameter [in [Fyp. [Max [Unie Conditions : Vce(on) _| Collector to Emittar Saturation Vottage_|— | 27 |— Ye | DedeFawerdVatage t= t8] ¥ [Starter ee Hoss __| Zero Gate Voliage Collector Gurrent_ "| — |" 250] uA] Vee = 600V, Vee = OV Driver and Protection Circuit ———_|_Parameter Twin. typ. a] Unt] Gonanions our __I UnderVotageSettevel | —f—Tes} | Ve___| Logie“0"inputVottage(OUT=LO) [22 [—T—} Hos __1 Average SupplyCurent | Tan | 16 | ma | a ee He __ PWM Caner Frequency | — | —T 25 [ee | Hor__| Dead Time 5 TT ps | euro __| Input FiterTime (Al Sicinputs) | —Tst0 | —| ne | Va =ovav fin _| LogicinputPulkup Resistor | —T 0 |—| a | los 1 omrcuneetTeptevet re De f=] * [|}———— ee_| EarthFautDelayTime | P20 [Pps | or__| Over Temperature TipLovel atGase | — | 100 — | 6 | tocr____| Fauit Detect. to Power Stage Shut Down Delay] ——] 2.0 | ——) _ r™t™~‘“.CO {o1 — | tons Sudo Fst Opi ow Da — [15° ==] 8 | Hanon | FauttOuputPise wie | — 120 | —[ mes | texzicum | Fault Clear Time, LINU,V.W, Kept High | cum) _| Fault Clear Time, LIN U,V.W, Kept Hic SS RS Cy ee |to2__| Fault Gear Recognition to Faut Reset Delay | ——| 3.0} | rtC—i“‘CONWOWWWOOS ‘tum | OpenCollectorFeutCurent | — | —T 25 | ma | Thermal Resistance: es Tacs (MODULE) | Case-to-Sik.fat.greasedsuriace | 08 J > — me _ [Weight of odie a Fh Notes: © Vp = 13.5 to 16.5V, Ty = 125°C at Start

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Application Information

Output of power stage is out of phase with input signal. Internal 50 kQ2 pull-up resistorto V> from alll 6 inputs ensure thatall transistors ‘oC are off if the inputs are open circuited. A 300 ns filter at input eo prevents Spurious triggering due to noise. Input logic provides | py, ¢ 3° deadtime when nearly coincidenttransitions take place atLINand 2K Sow HIN pins of same channel and prevents shoot-through conditions. uNuver 0.25K When driving the module inputs with open collector, extemal pull | wy 6 up resistor to Vp should be higher than 1 kQ. pv. 7 I rm GND O Figure 8: Input Stage Bootstrap The floating power supplies - PU, PV and PW are connectedio resistive loads andthe driveis generated through bootstrap technique. Each high side device has 2.2 iF bootstrap capacitor, fed through individual bootstrap diode andcommon 22Q charging resistorto V,. Atstart-up orafteran interruption in switching greater than 2s, itis necessary to switch on all three low side transistors for at least 200s before switching the high side transistors. Maximum on time for high side transistors is 200 ms. Temperature Monitoring Temperature is sensed inclose proximity of the junction, minimizing errors caused by the module base plate thermal capacitance. Thermal protection is effective for symmetrical three phase loads. Fault Logic Short circuit, earth fault, overcurrent, overtemperature and Vp undervoltage conditions cause trips and are latched. Open collector FAULT output goes low for at least 2 ms when fault latch is Set. itcan be reset by holding all three LIN high for 121s or cycling V_ through undervoitage condition. Bootstrap supply of high side switches is individually monitored for undervoltage and has cycle bycycle shutdown for the particular switch and is not latched. Active low open collector FAULT Pin can be connected to logic circuit, fault indicator LED or optocoupler for feedback to controller.

RT a ae s' few) OME (2) ew | ae CTS eS ra ee Tv H+ batt ESL Stee @t) | }Mo] Fic al... concur [_S me | a A Pa GCMADED Fig. 9 - Typical Application Scheme "ec eA Vg : "bs , " FUTCLA toe Fig. 10 - Timing Diagram L IT@R) Rectifier WORLD HEADQUARTERS: 233 Kansas St., El Segundo, Califomia 90245, Tel: (310) 322 3531 EUROPEAN HEADQUARTERS: Hurst Green, Oxted, Surray RH8 9BB, UK Tel: (44) 0883 713215 IR CANADA: 7321 Victoria Park Ave., Suite 201, Markham, Ontario L3R 3L1, Tel: (905) 475 1897 | IR GERMANY: Saalburgstrasse 157, 61350 Bad Homburg Tel: 6172 37066 IR ITALY: Via Liguria 49, 10071 Borgaro, Torino Tei: (39) 1145 10111 IR FAR EAST: K&H Bldg., 2F, 3-30-4 Nishi-lkaburo 3-Chome, Toshima-Ki, Tokyo 171 Tel: (03)3983 0641 IR SOUTHEAST ASIA: 315 Outram Road, #10-02 Tan Boon Liat Building, 0316 Tar 65 221 8371 — = Data and . Specifications Ss subject OBC: fo change LANGE without “4 notice.