PLV1805QDBVRQ1

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TLV1805-Q1 TI1 | Alldatasheet

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ADVANCE□INFORMATION System Power VBAT SD S D Q1 Q2 D S P-Channel MOSFETsiBAT TLV1805 N-Channel MOSFET System Power VBAT Charge Pump SD iBAT TLV1805 Clock Source Product Folder Order Now T echnical Documents Tools & Software Support & Community Reference Design An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. ADVANCE INFORMATION for pre-production products; subject to change without notice. TLV1805-Q1 SNOSD52 – AUGUST 2018 TLV1805-Q140V,microPower,Push-PullAutomotiveHighVoltageComparatorwith Shutdown

1 Features

1• AEC-Q100 Qualified with the following results: – Device Temperature Grade 1: –40°C to +125°C Ambient Operating Temperature – Device HBM ESD Classification Level 2 – Device CDM ESD Classification Level C4A

3.3 V to 40 V Supply Range
Low Quiescent Current: 150 µA per Comparator
Input Common-Mode Range Beyond Both Rails
Phase Reversal Protection
Push-Pull Output
250ns Propagation Delay
Low Input Offset Voltage: 500 µV
Shutdown Pin
Packaging: – Single: SOT-23-6

2 Applications

Reverse Current Protection Smart Diode Controller
Overvoltage, Undervoltage, and Overcurrent Detection
OR-ing MOSFET Controller
MOSFET Gate Driver
System Monitoring for: – Automotive Infotainment & Cluster – HEV/EV & Powertrain – PLC's – Servers – Motor Protection & Control

3 Description

The TLV1805-Q1 high voltage comparator offers the unique combination of wide supply range, push-pull output, rail-to-rail inputs, low quiescent current, shutdown and fast output response. All these features make this comparator well-suited for applications that require sensing at the positive or negative voltage rails such as reverse current protection for a smart diode controller, overcurrent sensing, and overvoltage protection circuits where the push-pull output stage is used to drive the gate of an p-channel or n-channel MOSFET switch. The high peak current push-pull output stage which is unique for high-voltage comparators, offers the advantage of allowing the output to actively drive the load to either supply rail with a fast edge rate. This is especially valuable in applications where a MOSFET switch needs to be driven high or low in order to connect or disconnect a host from an unexpected high voltage supply. Additional features such as low input offset voltage, low input bias currents and High- Z shutdown make the TLV1805-Q1 flexible enough to handle almost any application, from simple voltage detection to driving a single relay. The TLV1805-Q1 is AEC-Q100 qualified in a 6-pin SOT-23 package and is specified for operation across the temperature range of –40°C to +125°C. Device Information(1) PART NUMBER PACKAGE BODY SIZE (NOM) TLV1805-Q1 SOT-23 (6) 1.60 mm × 2.90 mm (1) For all available packages, see the package option addendum at the end of the datasheet. Reverse Current Protection Using an N-Channel MOSFET Reverse Current & Overvoltage Protection Using P-Channel MOSFETs

11.2 Receiving Notification of Documentation Updates 19

12 Mechanical, Packaging, and Orderable

4 Revision History

NOTE: Page numbers for previous revisions may differ from page numbers in the current version. DATE REVISION NOTES August 2018 * Initial APL release.

5 Pin Configuration and Functions

Note the reversed positions of the input pins. This differs from a similar popular pinout. Pin Functions PIN TYPE DESCRIPTION NAME NO. IN+ 4 I Noninverting input IN– 3 I Inverting input OUT 1 O Output SHDN 5 I Shutdown (active high) V+ 6 P Positive (highest) power supply V– 2 P Negative (lowest) power supply

ADVANCE□INFORMATION TLV1805-Q1 SNOSD52 – AUGUST 2018 www.ti.com Product Folder Links: TLV1805-Q1 Submit Documentation Feedback Copyright © 2018, Texas Instruments Incorporated (1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. (2) Input terminals are diode-clamped to the power-supply rails. Input signals that can swing more than 0.3 V beyond the supply rails must be current-limited to 10 mA or less. (3) Shutdown pin is diode-clamped to (V–). Input to SHDN that can swing more than 0.3 V below (V–) must be current-limited to 10 mA or less. (4) Short-circuit to (V–) or (V+).

6 Specifications

6.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)(1) MIN MAX UNIT Supply voltage: VS = (V+) – (V–) -0.3 42 V Input pins (IN+, IN–)(2) (V–) – 0.3 (V+) + 0.3 V Shutdown pin (SHDN)(3) (V–) – 0.3 (V–) + 5.5 V Current into Input pins (IN+, IN–, SHDN)(2) ±10 mA Output (OUT) (V–) – 0.3 (V+) + 0.3 V Output short-circuit duration(4) TBD s Operating temperature –55 150 °C Junction temperature, TJ 150 °C Storage temperature, Tstg –65 150 °C (1) AEC Q100-002 indicates that HBM stressing shall be in accordance with the ANSI/ESDA/JEDEC JS-001 specification.

6.2 ESD Ratings

V(ESD) Electrostatic discharge Human-body model (HBM), per AEC Q100-002(1) ±2000 V Charged-device model (CDM), per AEC Q100-011 ±750

6.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted) MIN MAX UNIT Supply voltage: VS = (V+) – (V–) 3.3 40 V Ambient temperature, TA –40 125 °C (1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report.

6.4 Thermal Information

THERMAL METRIC(1) TLV1805-Q1 UNITDBV (SOT23)

6 PINS

RθJA Junction-to-ambient thermal resistance 166.9 °C/W RθJC(top) Junction-to-case (top) thermal resistance 104.2 °C/W RθJB Junction-to-board thermal resistance 46.8 °C/W ψJT Junction-to-top characterization parameter 31.3 °C/W ψJB Junction-to-board characterization parameter 46.6 °C/W

ADVANCE□INFORMATION TLV1805-Q1 www.ti.com SNOSD52 – AUGUST 2018 Product Folder Links: TLV1805-Q1 Submit Documentation FeedbackCopyright © 2018, Texas Instruments Incorporated (1) The recommended voltage range if VSD is independent of VS.

6.5 Electrical Characteristics

VS = 3.3 V to 40 V, VCM = VS / 2; TA = 25°C (unless otherwise noted). Typical values are at VS = 12 V and TA = 25°C,VCM = VS / 2 PARAMETER TEST CONDITIONS MIN TYP MAX UNIT VIO Input offset voltage -4.5 ±0.5 4.5 mV dVIO/dT Input offset voltage drift TA = –40°C to +125°C ±5 μV/°C VHYS Input hysteresis voltage 15 mV VCM Common-mode voltage range TA = -40℃ to +125℃ (V–) – 0.2 (V+) + 0.2 V IB Input bias current 500 pA IOS Input offset current 25 pA PSRR Power-supply rejection ratio VCM=0 70 dB CMRR Common-mode rejection ratio (V–) < VCM < (V+) 60 dB VOL Voltage output swing from (V–) ISINK ≤ 5mA, input overdrive = –100 mV, VS = 5V to 40V V, TA = –40°C to +125°C 300 mV VOH Voltage output swing from (V+) ISOURCE ≤ 5mA, input overdrive = +100 mV, VS = 5V to 40V, TA = –40°C to +125°C 300 mV Isc_source Peak charging current(sourcing) with output shorted to gnd Vs=5V to 40V 85 mA Isc_sink Peak dis-charging current(sinking) with output shorted to supply Vs=5V to 40V 85 mA IQ Quiescent current VS = 12 V, no load, VID = –0.1 V (output low), Ts=25°C 150 µA VS = 3.3V to 40V no load, VID = –0.1 V (output low), TA = –40°C to +125°C 400 µA tOFF Time to enter shutdown CL = 15 pF 900 ns tON Time to exit shutdown CL = 15 pF 2.3 µs VSD Shutdown input: voltage range (1) Vs=3.3 to 40V, TA=-40 to 125 °C 0 5.5 V VSD_VIH SHDN pin input high level VS=3.3 V to 40V, TA=-40 to 125 °C 1.8 5.5 V VSD_VIL SHDN pin input low level VS=3.3 V to 40V, TA=-40 to 125 °C 0.45 V IB-SDH SHDN bias current VS = VSD = 5.5 V 100 nA VS = 5 V, VSD = 0 V 100 nA IQ-SD Quiescent current (Shutdown) VS=12V; Ts=25°C; VSD>VSD_VIH Min 10 12 µA (1) High-to-low and low-to-high refers to the transition at the input.

6.6 Switching Characteristics

Typical values are at TA = 25°C, VCC = 12 V, VCM = 6V; Input overdrive = 100 mV (unless otherwise noted). PARAMETER TEST CONDITIONS MIN TYP MAX UNIT tPHL Propagation delay time, high- to-low (1) Input overdrive = 100 mV, CL = 15 pF, delay from midpoint of input to midpoint of output 250 ns tPLH Propagation delay time, low-to- high (1) Input overdrive = 100 mV, CL = 15 pF, Midpoint of input to midpoint of output 250 ns Input overdrive = 100 mV, CL = 4 nF, Midpoint of input to midpoint of output 1 µs tR Rise time 20% to 80%, CL = 15 pF 40 ns 20% to 80%, CL = 4 nF 1 µs tF Fall time 20% to 80%, CL = 15 pF 40 ns 20% to 80%, CL = 4 nF 1 µs

ADVANCE□INFORMATION Bias Power-on-reset IN+ IN- OUT VCC GND SHDN TLV1805-Q1 www.ti.com SNOSD52 – AUGUST 2018 Product Folder Links: TLV1805-Q1 Submit Documentation FeedbackCopyright © 2018, Texas Instruments Incorporated

7 Detailed Description

7.1 Overview

The TLV1805-Q1 comparator features a rail-to-rail inputs with a push-pull output stage that operates at supply voltages as high as 40 V or ±20 V. The rail-to-rail input stage enables detection of signals close to the supply and ground while the push-pull output stage creates fast transition edges to either supply rail. A low supply current of 150 μA per channel with small, space-saving packages, makes these comparators versatile for use in a wide range of applications, from portable to industrial.

7.2 Functional Block Diagram

7.3 Feature Description

7.3.1 Rail to Rail Inputs

The TLV1805-Q1 comparator features a CMOS input with a common-mode range that includes both supply rails. The TLV1805-Q1 is designed to prevent phase inversion when the input pins exceed the supply voltage.

7.3.2 Push-Pull Output

The push-pull output stage which is unique for high-voltage comparators, offers the advantage of allowing the output to actively drive the load to either supply rail with a fast edge rate. A high output sink and source peak current of 85mA allows quickly driving capacitive loads such as cables and MOSFET gates. Caution must be taken to ensure that the package power dissipation is not exceeded when switching at these high supply voltages.

7.3.3 Shutdown Function

The TLV1805-Q1 has a logic level SHDN input. When the shutdown SHDN input is 1.8V above V-, the TLV1805- Q1 is disabled. When disabled, the output becomes high impedance (Hi-Z), and the supply current drops to 10µA. The input bias current remains unchanged. Voltages may still be applied to the comparator inputs as long as V+ power is till applied and the applied input voltages are still within the specified input voltage range. CAUTION The maximum voltage on the shutdown pin is +5.5V, regardless of supply voltage. Connect the SHDN pin to V- if shutdown is not used. Do not float the SHDN pin.

states when the output is in High-Z mode. Channel Reverse Current Protection With Overvotlage Protection circuit.

7.3.4 Power On Reset

inputs. This feature prevents output false-triggers during power-up.

7.3.5 Internal Hysteresis

The TLV1805-Q1 contains 15mV of internal hysteresis.

VTH is the actual set voltage or threshold trip voltage.
VOS is the internal offset voltage between VIN+ and VIN–. This voltage is added to VTH to form the actual trip point at which the comparator must respond to change output states.
VHYST is the internal hysteresis (or trip window) that is designed to reduce comparator sensitivity to noise (15 mV for the TLV1805-Q1).

Figure 3. Hysteresis Transfer Curve

7.4 Device Functional Modes

7.4.1 External Hysteresis

External Hysteresis may be added to further improve response to noisy or slow-moving input signals.

1 M/c87R2

1 M/c87

7.4.1.1 Inverting Comparator With Hysteresis

Figure 4. TLV1805-Q1 in an Inverting Configuration With Hysteresis || R3 in series with R2. Equation 1 defines the high-to-low trip voltage (VA1). Equation 3 defines the total hysteresis provided by the network.

7.4.1.2 Noninverting Comparator With Hysteresis

Figure 5. TLV1805-Q1 in a Noninverting Configuration With Hysteresis to high, VIN must rise to VIN1. Use Equation 4 to calculate VIN1. such that VA is equal to VREF. Use Equation 5 to calculate VIN2. The hysteresis of this circuit is the difference between VIN1 and VIN2, as shown in Equation 6.

8 Application and Implementation

validate and test their design implementation to confirm system functionality.

8.1 Application Information

8.2 Typical Applications

hysteresis thresholds to eliminate the multiple transitions caused by noise. Figure 6. Comparator Schematic with Hysteresis

8.2.1 Design Requirements

Supply voltage: 5 V
Input: 0 V to 5 V
Lower threshold (VL) = 2.3 V ±0.1 V
Upper threshold (VH) = 2.7 V ±0.1 V
VH – VL = 2.4 V ±0.1 V
Low-power consumption

8.2.2 Detailed Design Procedure

upper threshold (VH) to transition low, or below the lower threshold (VL) to transition high. Figure 6 illustrates hysteresis on a comparator. Resistor Rh sets the hysteresis level.

cause the output to transition to logic low (0 V). transition to logic high (5 V).

8.2.3 Application Curve

threshold is 2.34 V, both of which are close to the design target. Figure 7. TLV1805-Q1 Upper and Lower Threshold with Hysteresis

8.2.4 Reverse Current Protection Using MOSFET and TLV1805-Q1

Source and Drain terminals (monitoring VDS). The described circuits also protect against reverse voltage. Figure 8. Simplified Operational Theory flowing through the low loss RDS(ON) path. voltage higher than the battery voltage to provide the necessary positive gate drive voltage.

8.2.4.1 Minimum Reverse Current

voltage must be dropped across the MOSFET (VMEAS). MOSFET body diode. Response to this large voltage will be immediate. comparator offset voltage plus half of the hysteresis.

8.2.4.2 N-Channel Reverse Current Protection Circuit

Figure 9. N-Channel Reverse Current Schematic with Oscillator needed higher voltage to drive the MOSFET and power the comparator. input, the oscillator may be ground referenced. MOSFET during an overvotlage event. R1 must be sized to dissapate any expected overvoltage. D4 and R2 clamp the input should VBATT drop below VLOAD (as in a supply reversal). negative leakage to turn the MOSFET off.

8.2.4.2.1 N-Channel Oscillator Circuit

resistors and small capacitors).

10 N D3

Module Users Guide (SNOU158).

8.2.5 P-Channel Reverse Current Protection Circuit

to set the output low during forward current. Figure 10. P-Channel Reverse Current Schematic R4. D3 provides the clamping during an overvoltage event. overvoltage events. R4 will see the battery voltage minus the D3 Zener voltage during an overvoltage event. dissipated by R4 and the VDS(MAX) of the MOSFET. goes high-Z during power-off to ensure the gate is pulled to zero volts to turn off the MOSFET. ground down towards the negative potential, providing power to the comparator during reverse voltage. negative leakage to turn the MOSFET off.

ground end of R4 and ground. The MOSFET will be in body diode mode when the comparator is disabled.

8.2.6 P-Channel Reverse Current Protection With Overvotlage Protection

and resistor, as shown in Figure 11. Figure 11. Adding Overvoltage Protection Using SHDN Pin comparator output goes Hi-Z and RPU pulls the gate and source together to turn off the MOSFET (VGS = 0 V). voltage and starts conducting, it will pull RPD up to a voltage calculated to place >1.8 V on the shutdown pin. differences in actual Zener diode threshold voltages. desired. A second resistor in series with the Zener or reference can extend the breakdown voltage.

8.2.7 ORing MOSFET Controller

P-Channel or N-Channel topologies. system voltage is available to provide the higher votlage. Figure 12. N-Channel OR'ing MOSFET Controller

9 Power Supply Recommendations

operating voltage or temperature are presented in the Typical Characteristics section. Recommended Operating Conditions section.

10 Layout

10.1 Layout Guidelines

Use a printed circuit board (PCB) with a good, unbroken low-inductance ground plane. Proper grounding (use of ground plane) helps maintain specified performance of the TLV1805-Q1 family of devices.
To minimize supply noise, place a decoupling capacitor (0.1-μF ceramic, surface-mount capacitor) as close as possible to VS as shown in Figure 13.
On the inputs and the output, keep lead lengths as short as possible to avoid unwanted parasitic feedback around the comparator. Keep inputs away from the output.
Solder the device directly to the PCB rather than using a socket.
Run the ground pin ground trace under the device up to the bypass capacitor, shielding the inputs from the outputs.

10.2 Layout Example

Figure 13. Oscillator Circuit Layout Example

11 Device and Documentation Support

11.1 Documentation Support

11.1.1 Related Documentation

Precision Design, Comparator with Hysteresis Reference Design— TIDU020 Reference Design, Window Comparator Reference Design— TIPD178 EVM Users Guide, TLV1805-Q1 Reverse Current Evaluation Module Users Guide— SNOU158

11.2 Receiving Notification of Documentation Updates

To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper right corner, click on Alert me to register and receive a weekly digest of any product information that has changed. For change details, review the revision history included in any revised document.

11.3 Community Resources

The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use. TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help solve problems with fellow engineers. Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and contact information for technical support.

11.4 Trademarks

E2E is a trademark of Texas Instruments.

11.5 Electrostatic Discharge Caution

This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.

11.6 Glossary

SLYZ022 — TI Glossary. This glossary lists and explains terms, acronyms, and definitions.

12 Mechanical, Packaging, and Orderable Information

The following pages include mechanical packaging and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation.

www.ti.com 7-Sep-2018 Addendum-Page 1 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead/Ball Finish (6) MSL Peak Temp (3) Op Temp (°C) Device Marking (4/5) Samples PLV1805QDBVRQ1 ACTIVE SOT-23 DBV 6 3000 TBD Call TI Call TI -40 to 125 TLV1805QDBVRQ1 PREVIEW SOT-23 DBV 6 3000 TBD Call TI Call TI -40 to 125 (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

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Product Information

PLV1805QDBVRQ1 specifications and overview.

Summary

40V, microPower, Push-Pull Automotive High Voltage Comparator with Shutdown

Description