PLS1600-12-080XA BEL | Alldatasheet
Document overview
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Technical content
The P LS1600-12-080xA is a 1600 Watt AC to DC, power -factor- corrected (PFC) power supply that converts standard AC power into a main output of +12 VDC for powering intermediate bus architectures (IBA) in high performance and reliability servers, routers, and network switches. The PLS1600-12-080xA utilizes full digital control architecture for greater efficiency, control, and functionality. This power supply meets international safety standards and displays the CE-Mark for the European Low Voltage Directive (LVD).
- High Efficiency, meet 80 plus “Platinum” efficiency requirement
- Universal input voltage range: 90-264 VAC
- AC input with active power factor correction
- High voltage DC input: 180-300 VDC
- 1600 W continuous output power capability for both low line and high line
- Always-on 12 VSB / 3 A standby output
- Hot-plug capable
- Parallel operation with active current sharing
- Full digital controls for improved performance
- High power density design: 42 W/in3
- Small form factor: 80(W) x 40(H) x 195(L) mm
- Power Management Bus communication interface for control, programming, and monitoring
- Status LED with fault signaling
- Networking Switches
- Servers & Routers
- Telecommunications
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resonance-soft-switching technology to reduce component stresses, providing increased system reliability and very high efficiency. and other high availability applications. The supply is fan cooled and ideally suited for integration with a matching airflow path. management controllers. It is protected with an active OR-ing device for maximum reliability. the actual power demand and supply temperature and can be overridden through the I2C bus. Figure 1. PLS1600-12-080xA Block Diagram
cause permanent damage to the supply. General Condition: TA = 0… 55 °C, unless otherwise specified. Table 1. Input conditions
4.1 INPUT FUSE
against severe defects. The fuse is not accessible from the outside and is therefore not a serviceable part.
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Figure 3. Power Factor vs. Output Power
4.2 INRUSH CURRENT
is connected to the mains. The internal bulk capacitor will be charged through a NTC which will limit the inrush current. Figure 2. Inrush current, Vin = 264Vac, 90°, CH3: Iin (10A/div), CH4: Vin (530V/div)
4.3 INPUT UNDER-VOLTAGE
voltage returns within the normal operating range, the supply will return to normal operation again.
4.4 POWER FACTOR CORRECTION
show a trapezoidal waveform.
General condition: TA = 0…55 °C unless otherwise specified.
4.5 EFFICIENCY
temperature regardless of the ambient temperature and load conditions. Figure 4. Efficiency vs. Output Power
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Table 2. Output spec Figure 5. Turn-On AC Line 230VAC, full load (400ms/div) Figure 6. Turn-On AC Line 230VAC, no load (40ms/div) Figure 7. Turn-On AC Line 230VAC, full load (40ms/div) Figure 8. Turn-Off AC Line 230VAC, full load (40ms/div)
Figure 9. Turn-Off AC Line 230VAC, half load (40ms/div) Figure 10. Load transient V1, VSB .0 to 50% full load (4ms/div) Figure 11. Short circuit on V1 (1ms/Div) Figure 12. Load transient V1, VSB .50 to 100% full load
5.1 OUTPUT GROUND / CHASSIS CONNECTION
planes should be connected together at the power supplies ground pins.
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Figure 13. Common Low Impedance Ground Plane Figure 14. Separated Power and Signal Ground
5.2 CLOSED LOOP STABILITY
The power supply shall be unconditionally stable under all line/load/transient load conditions including capacitive load ranges. be ensured at 20%, 50% and 100% loads as applicable, 0% load is just for reference.
5.3 RESIDUAL VOLTAGE IMMUNITY IN STANDBY MODE
and the PSON_L signal is de-asserted.
5.4 COMMON MODE NOISE
The common mode noise on any output shall not exceed 350mV pk-pk over the frequency band of 10Hz to 20MHz.
5.5 SOFT STARTING
or any power supply components at any specified AC line or load conditions.
5.6 ZERO LOAD STABILITY REQUIREMENTS
it must begin to regulate and source current without fault.
5.7 HOT SWAP REQUIREMENTS
Hot swapping a power supply is the process of inserting and extracting a power supply from an operating power system.
5.8 FORCED LOAD SHARING
disconnect its ISHARE pin from the share bus. This will prevent dragging the output down (or up) in such cases. increasing their output voltage. The voltage increase is limited to +250 mV. The output will share within 10% at full load. system so that a failure or hot swap of a redundant power supply does not cause outputs to go out of regulation in the system.
5.9 RIPPLE / NOISE
Figure 15. Differential Noise Test Setup
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IV1 OC OC Limit V1 Over Current Limitation, Vi min HL to Vi max HL. Table 3. Protections Table 4. Peak Power
6.1 PROTECTION CIRCUITS
be able to reset the power supply.
6.2 OVER TEMPERATURE PROTECTION (OTP)
be at least 5°C higher than over temperature warning threshold level. See section 10 and Table 12 for OTP trip temperature.
6.3 OVER VOLTAGE PROTECTION
will be auto recovered after removing OVP limit.
6.4 UNDER VOLTAGE DETECTION
an AC power recycled or by toggling the PSON_L input (or remote on/off).
6.5 OVER CURRENT LIMIT & OVER-POWER PROTECTION (OCP & OPP)
power recycled or by toggling the PSON_L input (or remote on/off). hiccup mode and during that time 12V main output shall be turned off.
6.6 PEAK POWER
Table 5. Input, Output, Temperature Power Management Bus accuracy
8.1 ELECTRICAL CHARACTERISTICS
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Table 6. Signals
8.1 PSON_L INPUT
either controlled by an open collector device or by a voltage source. Figure 16. PSON_L/ PSKILL connection
8.2 PSKILL INPUT
8.3 PWOK_H (DCOK_H) OUTPUT
a LOW state. The start of the PWOK_H delay time shall inhibit as long as any power supply output is in current limit.
Figure 17. PWOK_H connection
8.4 SMB_ALERT_L (INTERRUPT_L) OUTPUT
The SMB_ALERT_L signal indicates that the power supply is experiencing a problem that the system agent should investigate. Figure 18. SMB_ALERT_L ( INTERRUPT_L) Connection
8.5 VIN_OK_H (ACOK_H) OUTPUT
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Figure 19. VIN_OK_H (ACOK_H) Connection
8.6 PRESENT_L OUTPUT
that there is a power supply present in this system slot. An external pull -up resistor has to be added within the application. Current into PRESENT_L should not exceed 5mA to guarantee a low level voltage if power supply is seated. Figure 20. PRESENT_L Connection
8.7 SENSE INPUTS
path. The maximum allowed voltage drop is 200 mV on the positive rail and 50 mV on the GND rail. the power supply will shut down.
8.8 TIMING REQUIREMENTS
limits (Tvout_rise) within 1 to 20ms. For 12VSB, The rise time is allowed to from 5ms to 20ms. All outputs must rise monotonically.
Table 7. Timing Requirements Figure 21. Turn On/Off Timing
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Table 8. LED Characteristics Table 9. LED Status
8.9 LED INDICATOR
input and output power presence, and warning or fault conditions. Table 9 lists the different LED status.
- The SDA/SCL IOs use 3.3V logic levels
- External pull-up resistors on SDA/SCL required for correct signal edges
- Full SMBus clock speed of 100 kbps
- Clock stretching limited to 1 ms
- SCL low time-out of >25 ms with recovery
- within 10 ms
- Recognizes any time Start/Stop bus conditions 3.3/5V Rpull-up TX RX SDA/SCL 3.3V 10kΩ DSP or EEPROM TX_EN
Figure 22. Physical layer of communication interface
Table 10. I2C / SMBus Specification Figure 23. I2C / SMBus Timing offset exists between the Controller and the EEPROM. Table 11. Address and Protocol Encoding
9.1 CONTROLLER AND EEPROM ACCESS
under different addresses, see Table 11. The SDA/SCL lines are connected directly to the controller and EEPROM which are supplied by internal 3.3V. The EEPROM provides 256 bytes of user memory. None of the bytes are used for the operation of the power supply.
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tech.support@psbel.com Figure 24 - I2C Bus to DSP and EEPROM DSP EEPROM SDA SCL Protection Address Selection
9.2 EEPROM PROTOCOL
The EEPROM follows the industry communication protocols used for this type of device. Even though page write / read commands are defined, it is recommended to use the single byte write / read commands. WRITE The write command follows the SMBus 1.1 Write Byte protocol. After the device address with the write bit cleared a first byte with the data address to write to is sent followed by the data byte and the STOP condition. A new START condition on the bus should only occur after 5ms of the last STOP condition to allow the EEPROM to write the data into its memory. READ The read command follows the SMBus 1.1 Read Byte protocol. After the device address with the write bit cleared the data address byte is sent followed by a repeated start, the device address and the read bit set. The EEPROM will respond with the data byte at the specified location.
9.3 POWER MANAGEMENT BUS COOMUNICATION PROTOCOL
The Power Management Bus communication protocol is an open standard protocol that defines means of communicating with power conversion and other devices. For more information, please see the System Management Interface Forum web site at: www.powerSIG.org. Power Management Bus communication protocol command codes are not register addresses. They describe a specific command to be executed. The PLS1600-12-080xA supply supports the following basic command structures:
- Clock stretching limited to 1 ms
- SCL low time-out of >25 ms with recovery within 10 ms
- Recognized any time Start/Stop bus conditions WRITE The write protocol is the SMBus 1.1 Write Byte/Word protocol. Note that the write protocol may end after the command byte or after the first data byte (Byte command) or then after sending 2 data bytes (Word command). In addition, Block write commands are supported with a total maximum length of 255 bytes. S Address W A Data Address A Data A P Data nA P S Address W A Data Address A S Address R A S Address W A Command A Data Low Byte1) A Data High Byte1) A P 1) Optional
+86 755 298 85888 Europe, Middle East +353 61 225 977 North America +1 408 785 5200 © 2021 Bel Power Solutions BCD.20079_A-0 READ The read protocol is the SMBus 1.1 Read Byte/Word protocol. Note that the read protocol may request a single byte or word. In addition, Block read commands are supported with a total maximum length of 255 bytes.
9.4 POWER SUPPLY DIAGNOSTIC “EVENT RECORDER”
The power supply shall save the latest data and other pertinent data into nonvolatile memory when a critical event shuts down the power supply. This data shall be accessible via the Power Management Bus communication interface with an external source providing power to the 12Vstby output. Critical Events to trigger an update to the Event Recorder includes:
- Output OVP
- Output OCP
- Input OV/UV Fault
- Fan fault
- OTP
- Other faults to cause output shutdown. Refer to BCA.20007, the Power Management Bus Communication Application Note for further information about the Power Management Bus Communication commands to support this function.
9.5 FIRMWARE UPDATE
The power supply shall have the capability to update its firmware via the Power Management Bus communication interface while it is in standby mode. This FW can be updated when in the system and in standby mode and outside the system with power applied to the 12VSB pins. BPS standard GUI supports the firmware update function. 12VSB output remains on during and after firmware update period. Green LED should be blinking with 2 Hz frequency during firmware update period.
9.6 GRAPHICAL USER INTERFACE
Bel Power Solutions provide with its “I2C Utility” a Windows® XP/Vista/Win7/Win10 compatible graphical user interface allowing the programming and monitoring of the PLS1600-12-080xA Front-End. The utility can be downloaded on: belfuse.com/power-solutions and supports both the PSMI and Power Management Bus communication protocols. The GUI allows automatic discovery of the units connected to the communication bus and will show them in the navigation tree. In the monitoring view the power supply can be controlled and monitored. If the GUI is used in conjunction with the YTM.G2W01.0 Evaluation Board. It is also possible to control the PSON_L pin(s) of the power supply. S Address W A Command A Byte 1 A Byte N A P Byte Count A S Address W A Command A Data (Low) Byte AS Address R A Data High Byte1) nA P 1) Optional S Address W A Command A Byte 1 A S Address R A Byte N nA PByte Count A
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Table 12. Temperature Sensor Location and Thresholds Figure 25. Monitoring dialog of the I2C Utility cooling and is a function of output power and the inlet temperature. Figure 26. Airflow Direction
Figure 27. Fan Speed vs. Main Output Load & Inlet Temperature Comment: The fan minimum speed is set to 6000RPM.
11.1 IMMUNITY
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A The apparatus shall continue to operate as intended. No degradation of performance. B The apparatus shall continue to operate as intended. No degradation of performance beyond spec limits. Table 13. Performance Criteria Table 14. Emission Table 15. Safety and Approvals
11.2 EMISSION
from electric strength field tests.
Table 16. Requirements for Non-Redundant Power Supply Configuration (High System Ambient) temperature specifications and lifetime requirements. exception to the air exhaust side must be classified as “Handle, knobs, grips, etc. held for short periods of time only”.
13.1 HUMIDITY
NOTE: 95% relative humidity is achieved with a dry bulb temperature of 55°C and a wet bulb temperature of 54°C.
13.2 ALTITUDE
13.3 SHOCK AND VIBRATION
13.3.1 RANDOM VIBRATION – OPERATING
Sample Size: For all product classes and categories, the minimum number of samples shall be 3 devices.
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Figure 28. Class ll PCDs Operating Vibration Test: Acceleration vs Frequency Table 17. Operation Vibration Profile Charts Pass Criteria: Each power and signal output of each unit under test shall be monitored continuously during the test.
13.3.2 RANDOM VIBRATION - NON-OPERATING
packaged in their fully populated, bulk shipping package or individual packages of product. The total acceleration for Class II PCDs is approximately 3.8g rms (See Table 18).
Comment: All components de-rating follow IPC9592B latest revision. Table 18. Non-Operating Vibration Profile Charts allowed. All units shall also pass a functional test. There are no requirements on the condition of the shipping package.
13.3.3 SHOCK – OPERATING
Sample Size: For all product types and product classes, the minimum number of samples shall be three devices. amplitude of each shock shall be no less than 30 g with a half sine wave shape and a duration of 11mS. Pass Criteria: Each power and signal output of each unit under test shall be monitored continuously during the test.
13.3.4 THERMAL SHOCK (SHIPPING)
extremes for each half cycle shall be 30 minutes.
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Figure 29. Front, top and side view
Figure 30. Output gold finger in PSU Table 19. Output connector pin assignment
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tech.support@psbel.com ITEM DESCRIPTION ORDERING PART NUMBER SOURCE I2C Utility Windows® XP/Vista/Win7/Win10 compatible GUI to program, control and monitor Front-End power supplies (and other I2C units) N/A belfuse.com/power-solutions Evaluation Board Connector board to operate PLS1600-12-080xA. Includes an on- board USB to I2C converter (use I2C Utility as desktop software). YTM.G2W01.0 belfuse.com/power-solutions NUCLEAR AND MEDICAL APPLICATIONS - Products are not designed or intended for use as critical components in life support systems, equipment used in hazardous environments, or nuclear control systems. TECHNICAL REVISIONS - The appearance of products, including safety agency certifications pictured on labels, may change depending on the date manufactured. Specifications are subject to change without notice. REVISION DESCRIPTION OF CHANGES DATE ORIGINATOR A-0 Release to A-0 revision 2021-06-02 Gang Wang