PLRXPL-SC-S43-21-N

PLRXPL-SC-S43-21-N JDSU | Alldatasheet

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1 0 G S F P + 8 5 0 n m L i m i t i n g T r a n s c e i v e r , 1 0 G i g a b i t E t h e r n e t C o m p l i a n t P L R X P L - S C - S 4 3 - 2 1 - N S e r i e s K e y F e a t u r e s • Compliant to industrywide, 10 G link specifi cations

• Uses a highly reliable, 850 nm oxide VCSEL
• Lead-free and RoHS 6/6-compliant
• 0 – 70°C case operating temperature
• Single 3.3 V power supply
• Low power consumption (typically 450 mW)
• Bit error rate < 1 x 10 -12
• Hot pluggable The lead-free and RoHS-compliant small form factor pluggable (SFP+) transceiver from JDSU improves the performance for 10 Gigabit Ethernet (10 G) applications, and is ideal for high-speed, local area network applications. This transceiver features a highly reliable, 850 nm, oxide, vertical-cavity surface-emitting laser (VCSEL) coupled to an LC optical connector. The transceiver is fully compliant to 10GBASE-SR and 10GBASE-SW specifi cations, with internal AC coupling on both transmit and receive data signals. The all-metal housing design provides low EMI emissions in demanding 10 G applications and conforms to IPF specifi cations. An enhanced digital diagnostic feature set allows for real-time monitoring of transceiver performance and system stability, and the serial ID allows for customer and vendor system information to be stored in the transceiver. Transmit disable, loss-of-signal, and transmitter fault functions are also provided. The small size of the transceiver allows for high-density board designs that, in turn, enable greater total bandwidth. A p p l i c a t i o n s
• High-speed local area networks - Switches and routers - Network interface cards
• Computer cluster crossconnect systems
• Custom high-bandwidth data pipes C o m p l i a n c e
• SFF 8431 Revision 2.2
• IEEE 802.3 Clause 52 10GBASE-SR and 10GBASE-SW
• SFF 8432 Revision 5.0
• SFF 8472 Revision 10.3
• CDRH and IEC60825-1 Class 1 Laser Eye Safety
• FCC Class B
• ESD Class 2 per MIL-STD 883 Method 3015
• UL 94, V0
• Reliability tested per T elcordia GR-468 N O R T H A M E R I C A : 8 0 0 4 9 8 - J D S U ( 5 3 7 8 ) W O R L D W I D E : + 8 0 0 5 3 7 8 - J D S U W E B S I T E : w w w . j d s u . c o m C O M M U N I C A T I O N S M O D U L E S & S U B S Y S T E M S

1 0 G S F P + 8 5 0 N M L I M I T I N G T R A N S C E I V E R , 1 0 G I G A B I T E T H E R N E T C O M P L I A N T The PLRXPL-SC-S43-21-N 10 G SFP+ 850 nm optical transceiver is designed to transmit and receive 64B/66B scrambled 10 G serial optical data over 50/125 µm or 62.5/125 µm multimode optical fi ber. T r a n s m i t t e r The transmitter converts 64B/66B scrambled serial PECL or CML electrical data into serial optical data compliant with the 10GBASE-SR and 10GBASE-SW stan- dard. Transmit data lines (TD+ and TD-) are internally AC coupled, with 100 Ω differential termination. Transmitter rate select (RS1) pin 9 is assigned to control the SFP+ module trans- mitter rate. It is connected internally to a 30 kΩ pull-down resistor. A data signal on this pin does not affect the operation of the transmitter. An open collector-compatible transmit disable (Tx_Disable) is provided. This pin is internally terminated with a 10 kΩ resistor to V cc,T. A logic “1, ” or no connec- tion, on this pin will disable the laser from transmitting. A logic “0” on this pin provides normal operation. The transmitter has an internal PIN monitor diode that ensures constant optical power output, independent of supply voltage. It is also used to control the laser output power over temperature to ensure reliability at high temperatures. An open collector-compatible transmit fault (Tx_Fault) is provided. The Tx_ Fault signal must be pulled high on the host board for proper operation. A logic “1” output from this pin indicates that a transmitter fault has occurred or that the part is not fully seated and the transmitter is disabled. A logic “0” on this pin indicates normal operation. R e c e i v e r The receiver converts 64B/66B scrambled serial optical data into serial PECL/CML electrical data. Receive data lines (RD+ and RD-) are internally AC coupled with 100 Ω differential source impedance, and must be terminated with a 100 Ω dif- ferential load. Receiver Rate Select (RS0) pin 7 is assigned to control the SFP+ module receiver rate. It is connected internally to a 30 kΩ pull-down resistor. A data signal on this pin has no affect on the operation of the receiver. An open collector compatible loss of signal (LOS) is provided. The LOS must be pulled high on the host board for proper operation. A logic “0” indicates that light has been detected at the input to the receiver (see Optical characteristics, Loss of Signal Assert/Deassert Time). A logic “1” output indicates that insuffi cient light has been detected for proper operation. S e c t i o n 1 F u n c t i o n a l D e s c r i p t i o n

1 0 G S F P + 8 5 0 N M L I M I T I N G T R A N S C E I V E R , 1 0 G I G A B I T E T H E R N E T C O M P L I A N T Laser DriverTOSA ROSA Management Processor EEPROM Receiver 50 Ω 50 Ω 10 kΩ 100 Ω TX_GND TX_FAU LT VCC_TX TX_DI S SCL SDA TD+ TD - RD - RD + RX_GND VCC_RX VCC_RX RX_GND 30 kΩ LOS

16 Transmitter

3 Transmitter

18 Transmitter

19 Transmitter

2 Transmitter

1, 17, 20 Transmitter Signal Ground

5 SCL

4 SDA

6 MOD_ABS

15 Receiver

12 Receiver

13 Receiver

8 Loss of Signal Out

7 RS0 RX Rate Select

-N modules 10, 11, 14 Receiver Signal Ground 30 kΩ

9 RS1 TX Rate Select

-N modules F i g u r e 1 S F P + o p t i c a l t r a n s c e i v e r f u n c t i o n a l b l o c k d i a g r a m

1 0 G S F P + 8 5 0 N M L I M I T I N G T R A N S C E I V E R , 1 0 G I G A B I T E T H E R N E T C O M P L I A N T F i g u r e 2 R e c o m m e n d e d a p p l i c a t i o n s c h e m a t i c f o r t h e 1 0 G S F P + o p t i c a l t r a n s c e i v e r Notes  Power supply fi ltering components should be placed as close to the Vcc pins of the host connector as possible for optimal performance.  PECL driver and receiver components will require biasing networks. Please consult application notes from suppliers of these components. CML I/O on the PHY are sup- ported. Good impedance matching for the driver and receiver is required.  SDA and SCL should be bi-directional open collector connections in order to implement serial ID in JDSU SFP+ transceiver modules.  R1/R2 and R3/R4 are normally included in the output and input of the PHY. Please check the application notes for the IC in use. * Transmission lines should be 100 Ω differential traces. Vias and other transmission line discontinuities should be avoided. In order to meet the host TP1 output jitter and TP4 jitter tolerance requirements it is recommended that the PHY has both transmitter pre-emphasis to equalize the transmitter traces and receiver equalization to equalize the receiver traces. With appropriate transmitter pre-emphasis and receiver equalization, up to 8 dB of loss at 5 GHz can be tolerated. R5 and R6 are required when an Open Collector driver is used in place of CMOS or TTL drivers. 5 kΩ value is appropriate. * The value of R p and Rq depend on the capacitive loading of these lines and the two wire interface clock frequency. See SFF-8431. A value of 10 kΩ is appropriate for 80 pF capacitive loading at 100 kHz clock frequency. Power supply filter component values are provided on page 7. Receiver (Tx Fault) Vcc 10 kΩ CMOS, TTL, or Open Collector Driver (Tx Disable) Open Collector Bidirectional SDA Vcc Rp* Vcc Open Collector Bidirectional SCL Rq * Mod_ABS 10 kΩ Vcc

1 VeeT

2 Tx Fault

3 Tx Disable

7 RS0

8 LOS

9 RS1

10 VeeR

10 kΩ Vcc Receiver (LOS) R1* 50 Ω R2* 50 Ω Z* = 100 Ω PECL Driver (TX DATA) C1C2 C5C4 CMOS or TTL Driver (RS0 Rx Rate Select) CMOS or TTL Driver (RS1 Tx Rate Select) Vcc R6 ∗∗ R5 ∗∗ Vcc Vcc +3.3V Input R3* 50 Ω R4* 50 Ω PECL Receiver (RX DATA) Z* = 100 Ω Power Supply Filter Ry Rx S e c t i o n 2 A p p l i c a t i o n S c h e m a t i c

1 0 G S F P + 8 5 0 N M L I M I T I N G T R A N S C E I V E R , 1 0 G I G A B I T E T H E R N E T C O M P L I A N T C o m p o n e n t O p t i o n A O p t i o n B U n i t s L1, L2 1.0 4.7 µH Rx, Ry 0.5* 0.5* Ω C1, C5 10 22 µF C2, C3, C4 0.1 0.1 µF C6 Not required 22 µF Notes: Option A is recommended for use in applications with space constraints with power supply noise less than 33 mVp-p. Option B is used in the module compliance board in SFF-8431. *If the total series resistance of L1+C6 and L2+C5 exceeds the values of Rx and Ry in the table, then Rx and Ry can be omitted. P o w e r S u p p l y F i l t e r C o m p o n e n t V a l u e s Power supply fi ltering is recommended for both the transmitter and receiver. Fil- tering should be placed on the host assembly as close to the Vcc pins as possible for optimal performance. V cc,R and Vcc,T should have separate fi lters. Power supply fi lter component values from Figure 2 are shown in the table below for two different implementations.

1 0 G S F P + 8 5 0 N M L I M I T I N G T R A N S C E I VE R , 1 0 G I G A B I T E T H E R N E T C O M P L I A N T T echnical specifi cations related to the SFP+ optical transceiver include:

• Section 3.1 Pin Function Defi nitions
• Section 3.2 Absolute Maximum Ratings
• Section 3.3 Operating Conditions
• Section 3.4 Electrical Characteristics
• Section 3.5 Optical Characteristics
• Section 3.6 Link Length
• Section 3.7 Regulatory Compliance
• Section 3.8 PCB Layout
• Section 3.9 Front Panel Opening
• Section 3.10 Module Outline
• Section 3.11 Transceiver Belly-to-belly Mounting 3 . 1 P i n F u n c t i o n D e fi n i t i o n s F i g u r e 3 H o s t P C B S F P + P a d a s s i g n m e n t t o p v i e w S e c t i o n 3 S p e c i fi c a t i o n s November 2007 21114472 R2 JDSU PLRXPL -Vx-SH4-21xN | p. 7 of 20

2.2 PIN FUNCTION D EFINITIONS

The transceiver pin descriptions as defined in SFF-8431 are shown in Figure 3 below. Table 2 on page 8 has a complete description of all the pins. Figure 3 Host PCB SFP+ Pad Assignment Top View TOWARD HOST WITH DIRECTION TOWARD BEZEL TX_DISABLE SDA SCL RS0 RX_LOS RS1 VEER TX_FAULT TD- VEET VEET TD+ VEET VCCT VCCR RD+ RD- VEER MOD_ABSVEER OF MODULE INSERTION

1 0 G S F P + 8 5 0 N M L I M I T I N G T R A N S C E I VE R , 1 0 G I G A B I T E T H E R N E T C O M P L I A N T P i n N u m b e r S y m b o l N a m e D e s c r i p t i o n Receiver

8 LOS Loss of Signal Out (OC) Suffi cient optical signal for potential BER < 1x10 -12 = Logic “0”

Insuffi cient optical signal for potential BER < 1x10-12 = Logic “1” This pin is open collector compatible, and should be pulled up to Host Vcc with a 10 kΩ resistor. 10, 11, 14 V eeR Receiver Signal Ground These pins should be connected to signal ground on the host board.

12 RD- Receiver Negative Light on = Logic “0” Output

DATA Out (PECL) Receiver DATA output is internally AC coupled and series terminated with a 50 Ω resistor.

13 RD+ Receiver Positive Light on = Logic “1” Output

DATA Out (PECL) Receiver DATA output is internally AC coupled and series terminated with a 50 Ω resistor. 15 VccR Receiver Power Supply This pin should be connected to a fi ltered +3.3 V power supply on the host board. See Application schematics on page 4 for fi ltering suggestions. 7 RS0 RX Rate Select (LVTTL) This pin has an internal 30 kΩ pull-down to ground. A signal on this pin will not affect module performance. Transmitter

3 TX_Disable Transmitter Disable In (LVTTL) Logic “1” Input (or no connection) = Laser off

Logic “0” Input = Laser on This pin is internally pulled up to V ccT with a 10 kΩ resistor. 1, 17, 20 V eeT Transmitter Signal Ground These pins should be connected to signal ground on the host board.

2 TX_Fault Transmitter Fault Out (OC) Logic “1” Output = Laser Fault (Laser off before t_fault)

Logic “0” Output = Normal Operation This pin is open collector compatible, and should be pulled up to Host Vcc with a 10 kΩ resistor. 16 VccT Transmitter Power Supply This pin should be connected to a fi ltered +3.3 V power supply on the host board. See Application schematics on page 4 for fi ltering suggestions.

18 TD+ Transmitter Positive Logic “1” Input = Light on

DATA In (PECL) Transmitter DATA inputs are internally AC coupled and terminated with a differential 100 Ω resistor.

19 TD- Transmitter Negative Logic “0” Input = Light on

DATA In (PECL) Transmitter DATA inputs are internally AC coupled and terminated with a differential 100 Ω resistor. 9 RS1 TX Rate Select (LVTTL) This pin has an internal 30 k Ω pulldown to ground. A signal on this pin will not affect module performance. Module Defi nition 4 SDA Two-wire Serial Data Serial ID with SFF 8472 Diagnostics. Module defi nition pins should be pulled up to Host Vcc with appropriate resistors for the speed and capacitive loading of the bus. See SFF8431. 5 SCL Two-wire Serial Clock Serial ID with SFF 8472 Diagnostics. Module defi nition pins should be pulled up to Host Vcc with appropriate resistors for the speed and capacitive loading of the bus. See SFF8431.

6 MOD_ABS Module Absent Pin should be pulled up to Host V

cc with 10 kΩ resistor. MOD_ABS is asserted “high” when the SFP+ module is physically absent from the host slot. S F P + O p t i c a l T r a n s c e i v e r P i n D e s c r i p t i o n s

1 0 G S F P + 8 5 0 N M L I M I T I N G T R A N S C E I VE R , 1 0 G I G A B I T E T H E R N E T C O M P L I A N T P a r a m e t e r S y m b o l R a t i n g s U n i t Storage temperature TST -40 to +95 ˚C Case temperature TC -40 to +90 ˚C Relative humidity RH 5 – 95 (noncondensing) % Transmitter differential input voltage VD 2.5 V Power supply voltage VCC 0 to +4.0 VP-P Note: Absolute maximum ratings represent the damage threshold of the device. Damage may occur if the device is subjected to conditions beyond the limits stated here. 3 . 2 A b s o l u t e M a x i m u m R a t i n g s P a r t N u m b e r T e m p e r a t u r e R a t i n g U n i t PLRXPL-SC-S43-21-N 0 – 70 ˚C Note: Performance is not guaranteed and reliability is not implied for operation at any condition outside these limits. 3 . 3 O p e r a t i n g C o n d i t i o n s

1 0 G S F P + 8 5 0 N M L I M I T I N G T R A N S C E I VE R , 1 0 G I G A B I T E T H E R N E T C O M P L I A N T P a r a m e t e r S y m b o l M i n . T y p i c a l M a x . U n i t N o t e s Supply voltage Vcc 3.14 3.3 3.47 V All electrical and optical specifi cations valid within this range Power consumption Pdiss 480 1000 mW Data rate 10.3125 10.4 Gbps BER < 1x10 -12 Transmitter Supply current IccT 100 mA Common mode voltage tolerance ∆V 15 mV rms Data dependent input jitter DDJ 0.10 UI ±K28.5 pattern, TP1, at 10.3 Gbps (Note 1) Uncorrelated jitter Uj 0.023 UI Data input total jitter TJ 0.28 UI 2 31-1 pattern, TP1, BER < 1x10-12, at 10.3 Gbps (Notes 1, 8) Input data dependent pulse DDPWS 0.055 UI Reference SFF-8431 Revision 2.2 width shrinkage Eye mask X1 0.14 UI Reference SFF-8431 Revision 2.2, X2 0.35 UI Figure 19 Y1 90 mV Y2 350 mV Transmit disable voltage level V IH 2.0 V cc + 0.3 V Laser output disabled after T TD if V IL -0.3 0.8 V input level is V IH; Laser output enabled after T TEN if input level is VIL Transmit disable/enable assert time T TD 10 µs Laser output disabled after T TD if T TEN 2 ms input level is V IH; Laser output enabled after T TEN if input level is VIL Transmit fault output voltage level V OH V cc - 0.4 V cc V Transmit fault level is V OH and Laser V OL -0.3 0.4 V output disabled T Fault after laser fault. V OL is measured at 0.7 mA. Transmit fault assert and reset times T Fault 100 µs Transmitter fault is V OL and Laser T Reset 10 µs output restored T INI after transmitter disable is asserted for T Reset, then disabled. Initialization time TINI 300 ms After hot plug or V cc ≥ 2.97 V Receiver Supply current I CCR 120 mA Data output rise/fall time tr/tf 28 ps 20% – 80%, differential Output common mode voltage 7.5 mV rms R LOAD = 25 Ω, differential Deterministic jitter DJ 0.42 UI ±K28.5 pattern, TP4, at 10.3 Gbps (Notes 1, 4) T otal jitter TJ 0.70 UI 2 31-1 pattern, TP4 , BER < 1x10-12, at 10.3 Gbps (Notes 1, 4, 8) Eye mask X1 0.35 UI Reference SFF-8431 Revision 2.2, Y1 200 mV Figure 20 Y2 425 mV Loss of signal voltage level V OH V cc -0.5 V cc +0.3 V LOS output level V OL TLOSD after light input > LOSD (Note 2) V OL -0.3 0.4 V LOS output level V OH TLOSA after light input < LOSA (Note 2) Loss of signal assert/deassert time T LOSA 100 µs LOS output level V OL TLOSD after light input > LOSD (Note 2) T LOSD 100 µs LOS output level V OH TLOSA after light input < LOSA (Note 2) 3 . 4 E l e c t r i c a l C h a r a c t e r i s t i c s

1 0 G S F P + 8 5 0 N M L I M I T I N G T R A N S C E I VE R , 1 0 G I G A B I T E T H E R N E T C O M P L I A N T P a r a m e t e r S y m b o l M i n . T y p i c a l M a x . U n i t N o t e s Transmitter Wavelength λp 840 850 860 nm RMS spectral width 0.45 nm Transmitter dispersion penalty TDP 3.9 dB (Note 3) Average optical power PAVG -7.3 Note 6 dBm Optical modulation amplitude OMA * µW Relative intensity noise RIN12OMA -128 dB/Hz 12 dB refl ection Receiver Wavelength λ 840 850 860 nm Maximum input power P max -1 dBm Sensitivity (OMA) S 77.6 µW P-P (Note 7) Stressed sensitivity (OMA) ISI = 3.5 dB 180 µW P-P (Note 4) Loss of signal assert/deassert level LOSD -11 dBm Chatter-free operation; LOSD is LOSA -30 dBm OMA, LOSA is average power Low frequency cutoff F C 0.3 MHz -3 dB, P<-16 dBm Note: * Tradeoffs between center wavelength, spectral width, and minimum OMA are used. Refer to the table on Minimum Optical Modulation Amplitude in dBm for details. 3 . 5 O p t i c a l C h a r a c t e r i s t i c s C e n t e r W a v e l e n g t h R M S S p e c t r a l W i d t h ( n m ) Note: * Tradeoffs between center wavelength, spectral width, and minimum OMA are used. M i n i m u m O p t i c a l M o d u l a t i o n A m p l i t u d e i n d B m ( f r o m I E E E 8 0 2 . 3 C l a u s e 5 2 )

1 0 G S F P + 8 5 0 N M L I M I T I N G T R A N S C E I VE R , 1 0 G I G A B I T E T H E R N E T C O M P L I A N T D a t a R a t e S t a n d a r d F i b e r T y p e M o d a l B a n d w i d t h a t 8 5 0 n m ( M H z * km ) D i s t a n c e R a n g e ( m ) N o t e s 10.3 GBd 62.5/125 µm MMF 200 2 – 33 5 50/125 µm MMF 500 2 – 82 5 50/125 µm MMF 900 2 – 150 5 50/125 µm MMF 1500 2 – 240 5 50/125 µm MMF 2000 2 – 300 5 3 . 6 L i n k L e n g t h S p e c i fi c a t i o n N o t e s 1. UI (unit interval): one UI is equal to one bit period. For example, 10.3125 Gbps corresponds to a UI of 96.97 ps. 2. For LOSA and LOSD defi nitions, see Loss of Signal Assert/Deassert Level in Op- tical Characteristics. 3. Transmitter dispersion penalty is measured using the methods specifi ed in the IEEE standard 802.3-2005 Clause 52. 4. Measured with stressed eye pattern as per IEEE standard 802.3-2005, Clause 52. 5. Distances, shown in the “Link Length” table, are calculated for worst-case fi ber and transceiver characteristics based on the optical and electrical specifi cations shown in this document using techniques specifi ed in IEEE 802.3. These dis- tances are consistent with those specifi ed for 10GBASE-SR and 10GBASE-SW. In the nominal case, longer distances are achievable. 6. The maximum transmitter output power is the lesser of the Class 1 laser eye safety limit and the maximum receiver input power limit. 7. Sensitivity is for informational purposes only. 8. The data pattern for the total jitter measurement is one of IEEE 802.3 CL52.9 Pattern 1, Pattern 3, or valid 64B/66B data traffi c.

1 0 G S F P + 8 5 0 N M L I M I T I N G T R A N S C E I VE R , 1 0 G I G A B I T E T H E R N E T C O M P L I A N T F e a t u r e T e s t M e t h o d P e r f o r m a n c e Component safety UL 60950 UL File E209897 UL 94, V0 IEC 60950 TUV Report/Certifi cate (CB scheme) RoHS-compliant Directive 2002/95/EC Compliant per the Directive 2002/95/EC of the European Parliament and of the Council of 27 January 2003 on the restriction of the use of certain hazardous substances in electrical and electronic equipment. Laser eye safety1 EN 60825 TUV Certifi cate U. S. 21CFR 1040.10 CDRH compliant and Class 1 laser eye safe Electromagnetic Compatibility Electromagnetic emissions EMC Directive 89/336/EEC Noise frequency range: 30 MHz to 40 GHz. FCC CFR47 Part 15 Good system EMI design practice required IEC/CISPR 22 to achieve Class B margins. AS/NZS CISPR22 EN 55022 ICES-003, Issue 4 VCCI-03 Electromagnetic immunity EMC Directive 89/336/EEC IEC/CISPR/24 EN 55024 ESD immunity EN 61000-4-2 Exceeds requirements. Withstand discharges of 4 kV contact and 8 kV air discharge to Criterion A, and 8 kV contact and 25 kV air discharge to Criterion B. Radiated immunity EN 61000-4-3 Exceeds requirements. Field strength of 10 V/m RMS, from 10 MHz to 1 GHz. No effect on transmitter/receiver performance is detectable between these limits. 1. For further details, see Eye Safety R e g u l a t o r y C o m p l i a n c e 3 . 7 R e g u l a t o r y C o m p l i a n c e The PLRXPL-SC-S43-21-N optical transceiver complies with international Elec- tromagnetic Compatibility (EMC) and international safety requirements and standards. EMC performance is dependent on the overall system design. Informa- tion included herein is intended as a fi gure of merit for designers to use as a basis for design decisions. The PLRXPL-SC-S43-21-N optical transceiver is lead-free and RoHS-compliant per Directive 2002/95/EC of the European Parliament and of the Council of 27 January 2003 on the restriction of the use of certain hazardous substances in elec- trical and electronic equipment.

1 0 G S F P + 8 5 0 N M L I M I T I N G T R A N S C E I VE R , 1 0 G I G A B I T E T H E R N E T C O M P L I A N T 3 . 8 P C B L a y o u t F i g u r e 4 B o a r d l a y o u t F i g u r e 5 D e t a i l l a y o u t A L L D I M E N S I O N S A R E I N M I L L I M E T E R S

1 0 G S F P + 8 5 0 N M L I M I T I N G T R A N S C E I VE R , 1 0 G I G A B I T E T H E R N E T C O M P L I A N T 3 . 9 F r o n t P a n e l O p e n i n g F i g u r e 6 3 . 1 0 M o d u l e O u t l i n e F i g u r e 7 A L L D I M E N S I O N S A R E I N M I L L I M E T E R S

1 0 G S F P + 8 5 0 N M L I M I T I N G T R A N S C E I VE R , 1 0 G I G A B I T E T H E R N E T C O M P L I A N T 3 . 1 1 T r a n s c e i v e r B e l l y - t o - b e l l y M o u n t i n g F i g u r e 8

1 0 G S F P + 8 5 0 N M L I M I T I N G T R A N S C E I VE R , 1 0 G I G A B I T E T H E R N E T C O M P L I A N T Other information related to the SFP+ optical transceiver includes:

• Section 4.1 Digital diagnostic monitoring and serial ID operation
• Section 4.2 Package and handling instructions
• Section 4.3 ESD discharge (ESD)
• Section 4.4 Eye safety 4 . 1 D i g i t a l D i a g n o s t i c M o n i t o r i n g a n d S e r i a l I D O p e r a t i o n The PLRXPL-SC-S43-21-N optical transceiver is equipped with a two-wire serial EEPROM that is used to store specifi c information about the type and identi- fi cation of the transceiver as well as real-time digitized information relating to the transceiver’s performance. See the Small Form Factor Committee document number SFF-8472 Revision 10.3, dated December 1, 2007 for memory/address organization of the identifi cation data and digital diagnostic data. The enhanced digital diagnostics feature monitors fi ve key transceiver parameters which are in- ternally calibrated and should be read as absolute values and interpreted as fol- lows: T r a n s c e i v e r T e m p e r a t u r e i n d e g r e e s C e l s i u s : Internally measured. Represented as a 16 bit signed two’s complement value in increments of 1/256°C from -40 to +70°C with LSB equal to 1/256°C. Accuracy is ± 3°C over the specifi ed operating temperature and voltage range. V c c / S u p p l y V o l t a g e i n V o l t s : Internally measured. Represented as a 16-bit unsigned integer with the voltage defi ned as the full 16-bit value(0 – 65535) with LSB equal to 100 uV with a measurement range of 0 to +6.55 V . Accuracy is ± three percent of nominal value over the specifi ed operating temperature and voltage ranges. T X B i a s C u r r e n t i n m A : Represented as a 16-bit unsigned integer with current de- fi ned as the full 16-bit value (0 – 65535) with LSB equal to 2 uA with a measure- ment range of 0 – 131 mA. Accuracy is ± 10 percent of nominal value over the specifi ed operating temperature and voltage ranges. T X O u t p u t P o w e r i n m W : Represented as a 16-bit unsigned integer with the power defi ned as the full 16-bit value (0 – 65535) with LSB equal to 0.1 uW. Accuracy is ± 2 dB over the specifi ed temperature and voltage ranges over the range of -7 dBm to -1 dBm. Data is not valid when transmitter is disabled. R X R e c e i v e d O p t i c a l P o w e r i n m W : Represented as average power as a 16-bit un- signed integer with the power defi ned as the full 16-bit value (0 – 65535) with LSB equal to 0.1 uW. Accuracy is ± 3 dB over the specifi ed temperature and voltage ranges over the power range of -12 dBm to 0 dBm. S e c t i o n 4 R e l a t e d I n f o r m a t i o n

1 0 G S F P + 8 5 0 N M L I M I T I N G T R A N S C E I VE R , 1 0 G I G A B I T E T H E R N E T C O M P L I A N T D a t a F i e l d D e s c r i p t i o n s R e a d i n g t h e d a t a The information is accessed through the SCL and SDA connector pins of the mod- ule. The SFF-8431 Revision 2.2 specifi cation contains all the timing and address- ing information required for accessing the data in the EEPROM. The device address used to read the Serial ID data is 1010000X(A0h), and the ad- dress to read the diagnostic data is 1010001X(A2h). Any other device addresses will be ignored. MOD_ABS, pin 6 on the transceiver, is connected to Logic 0 (Ground) on the transceiver. SCL, pin 5 on the transceiver, is connected to the SCL pin of the EEPROM. SDA, pin 4 on the transceiver, is connected to the SDA pin of the EEPROM. The EEPROM Write Protect pin is internally tied to ground with no external ac- cess, allowing write access to the customer-writable fi eld (bytes 128 – 247 of ad- dress 1010001X). Note: address bytes 0 – 127 are not write protected and may cause diagnostic malfunctions if written over. D e c o d i n g t h e d a t a The information stored in the EEPROM, including the organization and the digi- tal diagnostic information, is defi ned in the Small Form Factor Committee docu- ment SFF-8472 Revision 10.3, dated December 1, 2007. 127 255 127 255 119 247 Serial ID Information; Defined by SFP MSA Reserved for SFP MSA Alarm and Warning Limits Reserved for External Calibration Constants Real Time Diagnostic Information Nonvolatile, customer- writeable, field-writeable area Address( 1010000X)(A0h) Address( 1010001X)(A2h) JDSU-Specific Information JDSU-Specific Information JDSU-Specific Information

1 0 G S F P + 8 5 0 N M L I M I T I N G T R A N S C E I VE R , 1 0 G I G A B I T E T H E R N E T C O M P L I A N T M e m o r y A d d r e s s V a l u e C o m m e n t s 0 03 SFP Transceiver 1 04 SFP with Serial ID 2 07 LC Connector 3-10 1000000000000000 11 06 64B/66B 12 67 Nominal Bit rate of 10.3 Gbps 13 00 Rate Identifi er (for Rate-selectable modules) 14 00 Single-mode fi ber not supported 15 00 Single-mode fi ber not supported 16 08 82 meters of OM2 50/125 µm multimode fi ber 17 03 33 meters of OM1 62.5/125 µm multimode fi ber 18 00 Copper not supported 19 1E 300 meters of OM3 50/125 µm multimode fi ber 20-35 JDSU V endor Name (ASCII) 36 00 Reserved 37-39 00019C IEEE Company ID (ASCII) 40-55 PLRXPLSCS43xxN Part Number (ASCII), x = part number variable 60-61 0352 Wavelength of laser in nm; 850

62 Unallocated

63 CC_BASE Check Code; Lower 8 bits of sum from byte 0 through 62

64 00 Conventional uncooled laser, Class 1 power level, Conventional limiting receiver output 65 1A Tx_Disable, Tx Fault, Loss of Signal implemented 66 00 67 00 68-83 Serial Number (ASCII) 84-91 Date Code (ASCII) 92 68 Diagnostic monitoring implemented, internally calibrated, Receiver Power Measurement type is Average Power

93 F0 Alarms and Warnings, TX_Fault and Rx_LOS monitoring

implemented, TX_Disable Control and Monitoring.

95 CC_EXT Check Code; Lower 8 bits of sum from byte 64 through 94

96-127 JDSU-specifi c EEPROM 128-255 Reserved for SFF-8079 S e r i a l I D D a t a a n d M a p

1 0 G S F P + 8 5 0 N M L I M I T I N G T R A N S C E I VE R , 1 0 G I G A B I T E T H E R N E T C O M P L I A N T M e m o r y A d d r e s s V a l u e C o m m e n t s 00-01 T emp High Alarm MSB at low address 02-03 T emp Low Alarm MSB at low address 04-05 T emp High Warning MSB at low address 06-07 T emp Low Warning MSB at low address 08-09 Voltage High Alarm MSB at low address 10-11 Voltage Low Alarm MSB at low address 12-13 Voltage High Warning MSB at low address 14-15 Voltage Low Warning MSB at low address 16-17 Bias High Alarm MSB at low address 18-19 Bias Low Alarm MSB at low address 20-21 Bias High Warning MSB at low address 22-23 Bias Low Warning MSB at low address 24-25 TX Power High Alarm MSB at low address 26-27 TX Power Low Alarm MSB at low address 28-29 TX Power High Warning MSB at low address 30-31 TX Power Low Warning MSB at low address 32-33 RX Power High Alarm MSB at low address 34-35 RX Power Low Alarm MSB at low address 36-37 RX Power High Warning MSB at low address 38-39 RX Power Low Warning MSB at low address 40-55 Reserved For future monitoring quantities 56-59 RP4 External Calibration Constant 60-63 RP3 External Calibration Constant 64-67 RP2 External Calibration Constant 68-71 RP1 External Calibration Constant 72-75 RP0 External Calibration Constant 76-77 Islope External Calibration Constant 78-79 Ioffset External Calibration Constant 80-81 TPslope External Calibration Constant 82-83 TPoffset External Calibration Constant 84-85 Tslope External Calibration Constant 86-87 T offset External Calibration Constant 88-89 Vslope External Calibration Constant 90-91 Voffset External Calibration Constant 92-94 Reserved Reserved

95 Checksum Low order 8 bits of sum from 0 – 94

96 T emperature MSB Internal temperature AD values

97 T emperature LSB

98 Vcc MSB Internally measured supply voltage AD values

99 Vcc LSB

100 TX Bias MSB (Note 1) TX Bias Current AD values

D i a g n o s t i c s D a t a M a p

1 0 G S F P + 8 5 0 N M L I M I T I N G T R A N S C E I VE R , 1 0 G I G A B I T E T H E R N E T C O M P L I A N T M e m o r y A d d r e s s V a l u e C o m m e n t s

101 TX Bias LSB (Note 1)

102 TX Power MSB (Note 1) Measured TX output power AD values

103 TX Power LSB (Note 1)

104 RX Power MSB Measured RX input power AD values

105 RX Power LSB

106 Reserved MSB For 1st future defi nition of digitized analog input

107 Reserved LSB

108 Reserved MSB For 2nd future defi nition of digitized analog input

109 Reserved LSB

110-7 Tx Disable State Digital State of Tx Disable Pin 110-6 Soft Tx Disable Control Writing “1” OR pulling the Tx_Disable pin will disable the laser 110-5 Reserved 110-4 Rate Select State Digital State of Rate Select Pin 110-3 Soft Rate Select Control Writing to this bit has no effect 110-2 Tx Fault State Digital State 110-1 LOS State Digital State 110-0 Data Ready State Digital State; “1” until transceiver is ready

111 Reserved Reserved

112-119 Optional alarm & warning fl ag bits (Note 2) Refer to SFF-8472 Revision 10.3 120-127 V endor specifi c JDSU specifi c 128-247 User/Customer EEPROM Field writeable EEPROM 248-255 V endor specifi c V endor specifi c control Note : 1. During Tx disable, Tx bias and Tx power will not be monitored. 2. Alarm and warning are latched. The fl ag registers are cleared when the system Reads AND the alarm/warning condition no longer exists. D i a g n o s t i c s D a t a M a p (continued)

1 0 G S F P + 8 5 0 N M L I M I T I N G T R A N S C E I VE R , 1 0 G I G A B I T E T H E R N E T C O M P L I A N T 4 . 2 P a c k a g e a n d H a n d l i n g I n s t r u c t i o n s This product is not compatible with any aqueous wash process. P r o c e s s p l u g The PLRXPL-SC-S43-21-N optical transceiver is supplied with a process plug. This plug protects the transceiver’s optics during standard manufacturing pro- cesses by preventing contamination from air borne particles. Note: It is recommended that the dust cover remain in the transceiver whenever an optical fi ber connector is not inserted. R e c o m m e n d e d c l e a n i n g a n d d e - g r e a s i n g c h e m i c a l s JDSU recommends the use of methyl, isopropyl and isobutyl alcohols for cleaning. Do not use halogenated hydrocarbons (trichloroethane, ketones such as acetone, chloroform, ethyl acetate, MEK, methylene chloride, methylene dichloride, phenol, N-methylpyrolldone). F l a m m a b i l i t y The housing is made of cast zinc and sheet metal. 4 . 3 E l e c t r o s t a t i c D i s c h a r g e ( E S D ) H a n d l i n g Normal ESD precautions are required during the handling of this module. This transceiver is shipped in ESD protective packaging. It should be removed from the packaging and handled only in an ESD protected environment utilizing standard grounded benches, fl oor mats, and wrist straps. T e s t a n d o p e r a t i o n In most applications, the optical connector will protrude through the system chas- sis and be subjected to the same ESD environment as the system. Once properly installed in the system, this transceiver should meet and exceed common ESD testing practices and fulfi ll system ESD requirements. Typical of optical transceivers, this module’s receiver contains a highly sensitive optical detector and amplifi er which may become temporarily saturated during an ESD strike. This could result in a short burst of bit errors. Such an event would call for the application to reacquire synchronization at the higher layers (serializer/ deserializer chip).

N O R T H A M E R I C A : 8 0 0 4 9 8 - J D S U ( 5 3 7 8 ) W O R L D W I D E : + 8 0 0 5 3 7 8 - J D S U W E B S I T E : w w w . j d s u . c o m Product specifi cations and descriptions in this document subject to change without notice. © 2008 JDS Uniphase Corporation 30149335 501 1008 PLRXPL-SX-S43-XX-N.DS.CMS.AE October 2008 O r d e r i n g I n f o r m a t i o n For more information on this or other products and their availability, please contact your local JDSU account manager or JDSU directly at 1-800-498-JDSU (5378) in North America and +800-5378-JDSU worldwide, or via e-mail at customer.service@jdsu.com. S a m p l e : P L R X P L - S C - S 4 3 - 2 1 - N P a r t N u m b e r P r o d u c t D e s c r i p t i o n PLRXPL-SC-S43-21-N 10 G SFP+ SR compliant, limiting electrical interface, 0 – 70˚C, ± 5% Vcc, no rate select, generic, fi rst generation 1 0 G S F P + 8 5 0 N M L I M I T I N G T R A N S C E I VE R , 1 0 G I G A B I T E T H E R N E T C O M P L I A N T 4 . 4 E y e S a f e t y The PLRXPL-SC-S43-21-N optical transceiver is a CLASS 1 LASER PRODUCT as defi ned by the international standard IEC 60825-1 Second Edition 2007-03 and by Laser emissions from Class 1 laser products are not considered hazardous when operated according to product specifi cations. Operating the product with a power supply voltage exceeding 4.0 volts may compromise the reliability of the product, and could result in laser emissions exceeding Class 1 limits. C a u t i o n Tampering with this laser based product or operating this product outside the limits of this specifi cation may be considered an act of “manufacturing, ” and will require, under law, recertifi cation of the modifi ed product with the U.S. Food and Drug Administration (21 CFR 1040). The use of optical instruments with this product will increase eye hazard.