Power Management

PLM111750QKVURQ1.A

Texas Instruments

LM1117-Q1 18V, 1A, Automotive, Fixed-Output Linear Voltage Regulator REVISED JUNE 2025

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LM1117-Q1 18V, 1A, Automotive, Fixed-Output Linear Voltage Regulator

1 Features

AEC-Q100 qualified for automotive applications: – Temperature grade 1: –40°C to +125°C, TA – Junction temperature: –40°C to +150°C, TJ
Input voltage range VIN: – Absolute maximum: 20V – Operating range: 2.5V to 18V
Output voltage range VOUT: – 1.2V, 3.3V, 5V, 12V fixed – 0.8V to 13.0V (fixed, 100mV steps) available upon request
Output current: Up to 1A
Low quiescent current IQ: 65μA (typical)
±1% output accuracy
High PSRR: – 60dB at 1kHz – 40dB at 1MHz
Internal soft-start time: 500µs (typical)
Foldback current limiting and thermal protection
Stable with 1µF ceramic output capacitors
Packages: – SOT-223 (DCY), RθJA= 95.4°C/W – TO-252 (KVU), RθJA= 67.2°C/W

2 Applications

Onboard chargers
Traction inverters
2-wheeler and 3-wheeler traction drives
DC/DC converter systems

3 Description

The LM1117-Q1 is an AEC-Q100 qualified linear voltage regulator for automotive applications. The device provides improved performance compared to traditional x1117 regulators, with tighter output accuracy and low quiescent current (I Q) to minimize standby power consumption. The LM1117-Q1 input voltage range is from 2.5V to 18V (20V absolute maximum). The device is available in 1.2V, 3.3V, 5V, and 12V fixed output voltages. The wide bandwidth PSRR performance of the LM1117-Q1 is typically greater than 60dB at 1kHz and 40dB at 1MHz, which attenuates the switching frequency of an upstream DC/DC converter. Additionally, the LM1117-Q1 has an internal soft-start feature to reduce inrush current during start-up, which helps save space and cost in a design by minimizing the need for input capacitance. The LM1117-Q1 features a foldback current limit that reduces the power dissipation of the device during high-load current faults or shorting events.

Package Information

PART NUMBER PACKAGE(1) PACKAGE SIZE(2) LM1117-Q1 DCY (SOT-223, 4) 6.5mm × 7mm KVU (TO-252, 3) 6.6mm × 10.11mm (1) For more information, see the Mechanical, Packaging, and Orderable Information. (2) The package size (length × width) is a nominal value and includes pins, where applicable. T i m e ( m s ) Voltage (V) Current (A) - 1 - 1 . 7 5 0 - 1 . 5 1 - 1 . 2 5 2 - 1 3 - 0 . 7 5 4 - 0 . 5 5 - 0 . 2 5 6 0 7 0 . 2 5 8 0 . 5 9 0 . 7 5 V I N I I N V O U T Start-Up and Inrush Current With 22µF at COUT IN OUT GNDC IN 1µF C O U T 2.2µF V IN V O U T LM1117-Q1 Typical Application Circuit LM1117-Q1 SBVS468A – DECEMBER 2024 – REVISED JUNE 2025 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA.

10 Mechanical, Packaging, and Orderable

SBVS468A – DECEMBER 2024 – REVISED JUNE 2025 www.ti.com

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4 Pin Configuration and Functions

Figure 4-1. DCY Package, 4-Pin SOT-223 (Top View) 3 IN OUT GND OUT Figure 4-2. KVU Package, 3-Pin TO-252 (Top View) Table 4-1. Pin Functions PIN

DESCRIPTION

GND 1 1 — Ground pin OUT 2, Tab 2, Tab O Output pin. Use the recommended capacitor value as listed in the Recommended Operating Conditions table. Place the output capacitor as close to the OUT and GND pins of the device as possible. IN 3 3 I Input pin. Use the recommended capacitor value as listed in the Recommended Operating Conditions table. Place the input capacitor as close to the IN and GND pins of the device as possible. www.ti.com LM1117-Q1 SBVS468A – DECEMBER 2024 – REVISED JUNE 2025 Copyright © 2025 Texas Instruments Incorporated Submit Document Feedback 3 Product Folder Links: LM1117-Q1

5 Specifications

5.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)(1) MIN MAX UNIT Voltage (2) VIN –0.3 20 V VOUT (3) –0.3 VIN + 0.3 Current Maximum output current Internally limited A Power Power dissipation Package limited (4) W Temperature Operating junction (Tj) –50 150 Storage (Tstg) –65 150 (1) Operation outside the Absolute Maximum Ratings may cause permanent device damage. Absolute Maximum Ratings do not imply functional operation of the device at these or any other conditions beyond those listed under Recommended Operating Conditions. If used outside the Recommended Operating Conditions but within the Absolute Maximum Ratings, the device may not be fully functional, and this may affect device reliability, functionality, performance, and shorten the device lifetime. (2) All voltages with respect to GND. (3) VIN + 0.3V or 20V (whichever is smaller). (4) See Thermal Information table for further details.

5.2 ESD Ratings

V(ESD) Electrostatic discharge Human body model (HBM), per AEC Q100-002, all pins(1) ±3000 VCharged device model (CDM), per AEC Q100-011 Corner pins (1 and 3) ±1000 Other pins ±1000 (1) AEC Q100-002 indicates that HBM stressing shall be in accordance with the ANSI/ESDA/JEDEC JS-001 specification.

5.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted) MIN NOM MAX UNIT VIN Input voltage 2.5 18 V VOUT Output voltage 0.8 13.0 IOUT Output current (2.5V ≤ VIN < 3V) 0 0.8 A IOUT Output current (VIN ≥ 3V) 0 1 COUT ESR Output capacitor ESR 2 500 mΩ COUT Output capacitor(1) 1 2.2 220 µF CIN Input capacitor(2) 1 TJ Junction temperature –40 150 °C (1) Effective output capacitance of 0.47µF minimum required for stability. (2) An input capacitor is not required for LDO stability. However, an input capacitor with an effective value of 0.47μF minimum is recommended to counteract the effect of source resistance and inductance, which may in some cases cause symptoms of system level instability such as ringing or oscillation, especially in the presence of load transients. LM1117-Q1 SBVS468A – DECEMBER 2024 – REVISED JUNE 2025 www.ti.com

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5.4 Thermal Information

THERMAL METRIC(1) LM1117-Q1 UNITDCY (SOT–223) KVU (TO–252)

4 PINS 4 PINS

RθJA Junction-to-ambient thermal resistance 95.4 67.2 °C/W RθJC(top) Junction-to-case (top) thermal resistance 55.6 71.8 °C/W RθJB Junction-to-board thermal resistance 33.7 45.5 °C/W ΨJT Junction-to-top characterization parameter 13.9 31.6 °C/W ΨJB Junction-to-board characterization parameter 33.4 45.4 °C/W RθJC(bot) Junction-to-case (bottom) thermal resistance N/A 40.5 °C/W (1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application note.

5.5 Electrical Characteristics

specified at TJ = –40°C to 150°C, VIN = VOUT(nom) + 1.5V or VIN = 2.5V (whichever is greater), IOUT = 10mA, CIN = 1.0µF and COUT = 1.0µF (unless otherwise noted); typical values are at TJ= 25°C. PARAMETER TEST CONDITIONS MIN TYP MAX UNIT VOUT Nominal output accuracy TJ = 25°C –1 1 % VOUT Output accuracy over temperature VIN ≥ 3.0V, VOUT(NOM) ≤ 9.0V, 1mA ≤ IOUT ≤ 1A –1.75 1.75 VOUT(NOM) > 9.0V, 1mA ≤ IOUT ≤ 1A –1.75 1.75 ΔVOUT(ΔVIN) Line regulation(1) VOUT(NOM) ≤ 9.0V, VOUT(NOM) + 1.5V ≤ VIN ≤ 18V, IOUT = 10mA 0.02 %/V VOUT(NOM) > 9.0V, VOUT(NOM) + 1.5V ≤ VIN ≤ 18V, IOUT = 10mA 13.5 mV ΔVOUT(ΔIOUT) Load regulation 1mA ≤ IOUT ≤ 1A, VIN ≥ 3.0V 0.1 0.75 %/A VDO Dropout voltage(2) VIN ≥ 3.0V, IOUT = 1A 0.9 1.7 V ICL Output current limit VOUT = 0.9 x VOUT(NOM) , VIN = VOUT(nom) + 1.5V or VIN = 4.3V (whichever is greater) 1.1 1.6 A ISC Short-circuit current limit VOUT = 0V 150 250 350 mA IQ Quiescent current IOUT = 0mA 65 110 µA IPULLDOWN Output pulldown current(3) VIN = 1.8V, VOUT = 2.5V 0.7 1.1 mA PSRR Power-supply rejection ratio VIN = 3.3V, VOUT = 1.8V, IOUT = 300mA, f = 120Hz 70 dB Vn Output noise voltage BW = 10Hz to 100kHz, VIN = 3.3V, VOUT = 0.8V, IOUT = 100mA 60 µVRMS VUVLO+ UVLO threshold rising VIN rising 2.2 2.4 V VUVLO(HYS) UVLO hysteresis 130 mV VUVLO- UVLO threshold falling VIN falling 1.9 V TSD(shutdown) Thermal shutdown temperature Temperature increasing 180 °C TSD(reset) Thermal shutdown reset temperature Temperature falling 160 °C (1) Line regulation is measured with VIN = VOUT(NOM) + 1.5V or 2.5V (whichever is greater). (2) VDO is measured with VIN = 95% x VOUT(nom) for fixed output devices. VDO is not measured for fixed output devices when VOUT < 2.5V. (3) IPULLDOWN is measured with VIN = 1.8V (lower than UVLO falling threshold, with LDO in disabled state) and 2.5V applied on VOUT externally. www.ti.com LM1117-Q1 SBVS468A – DECEMBER 2024 – REVISED JUNE 2025 Copyright © 2025 Texas Instruments Incorporated Submit Document Feedback 5 Product Folder Links: LM1117-Q1

5.6 Typical Characteristics

at operating temperature TJ = 25°C, VIN = VOUT(NOM) + 1.5V or 2.5V (whichever is greater), IOUT = 10mA, CIN = 1.0µF, and COUT = 1.0µF (unless otherwise noted) Output Current (A) Output Voltage Accuracy ( VOUT) -0.4 -0.3 -0.2 -0.1 0.1 0.2 TJ -50°C -40°C 0°C 25°C 85°C 125°C 150°C VIN ≥ 3.0V Figure 5-1. VOUT Accuracy vs IOUT Input Voltage (V) Output Voltage Accuracy ( VOUT) -0.4 -0.3 -0.2 -0.1 0.1 0.2 TJ -50°C -40°C 0°C 25°C 85°C 125°C 150°C IOUT = 10mA Figure 5-2. VOUT Accuracy vs VIN Temperature (°C) Quiescent Current (PA) -50 -25 0 25 50 75 100 125 150 VOUT 0.8 V 1.8 V 2.8 V 3.3 V 5.0 V IOUT = 0mA Figure 5-3. IQ vs Temperature Input Voltage (V) Quiescent Current (PA) 0 0.5 1 1.5 2 2.5 3 -10 110 130 150 TJ -50°C -40°C 0°C 25°C 85°C 125°C 150°C IOUT = 0mA Figure 5-4. IQ Increase Below Minimum VIN Output Current (A) Ground Current (mA) 0.5 1.5 2.5 TJ -50°C -40°C -0°C 25°C 85°C 125°C 150°C VIN ≥ 3.0V Figure 5-5. IGND vs IOUT Time (µs) Output Current (mA) AC-Coupled Output Voltage (mV) 0 100 200 300 400 500 600 700 800 900 1000 -900 -500 -800 -400 -700 -300 -600 -200 -500 -100 -400 0 -300 100 -200 200 -100 300 0 400 100 500 200 600 300 700 D021 IOUT VOUT VIN = 5V, VOUT = 3.3V, ramp rate = 0.4A/µs Figure 5-6. IOUT Transient From 0mA to 100mA LM1117-Q1 SBVS468A – DECEMBER 2024 – REVISED JUNE 2025 www.ti.com

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5.6 Typical Characteristics (continued)

at operating temperature TJ = 25°C, VIN = VOUT(NOM) + 1.5V or 2.5V (whichever is greater), IOUT = 10mA, CIN = 1.0µF, and COUT = 1.0µF (unless otherwise noted) Time (µs) Output Current (mA) AC-Coupled Output Voltage (mV) 0 50 100 150 200 250 300 350 400 450 500 -4500 -500 -4000 -400 -3500 -300 -3000 -200 -2500 -100 -2000 0 -1500 100 -1000 200 -500 300 0 400 500 500 1000 600 1500 700 D034 IOUT VOUT VIN = 5V, VOUT = 3.3V, ramp rate = 0.5A/µs Figure 5-7. IOUT Transient From 1mA to 1A Time (µs) Output Current (mA) AC-Coupled Output Voltage (mV) 0 20 40 60 80 100 120 140 160 180 200 -2000 -500 -1750 -400 -1500 -300 -1250 -200 -1000 -100 -750 0 -500 100 -250 200 0 300 250 400 500 500 750 600 1000 700 D035 IOUT VOUT VIN = 5V, VOUT = 3.3V, ramp rate = 0.8A/µs Figure 5-8. IOUT Transient From 250mA to 850mA Time (µs) AC-Coupled Output Voltage (mV) Input Voltage (V) 0 100 200 300 400 500 600 700 800 900 1000 -800 0 -600 5 -400 10 -200 15 0 20 200 25 400 30 600 35 800 40 D037 VOUT VIN VIN = 5V, VOUT = 3.3V, IOUT = 1A, VIN ramp rate = 0.6V/µs Figure 5-9. VIN Transient in Dropout From 4V to 13V Time (µs) AC-Coupled Output Voltage (mV) Input Voltage (V) 0 100 200 300 400 500 600 700 800 900 1000 -50 0 -40 5 -30 10 -20 15 -10 20 0 25 10 30 20 35 30 40 D038 VOUT VIN VOUT = 3.3V, IOUT = 33µA, VIN ramp rate = 1.6V/µs Figure 5-10. VIN Transient From 5V to 16V Input Voltage (V) Dropout Voltage (V) 3 4.5 6 7.5 9 10.5 12 13.5 15 16 0.5 0.6 0.7 0.8 0.9 1.1 1.2 1.3 1.4 TJ -50°C -40°C 0°C 25°C 85°C 125°C 150°C IOUT = 1.0A Figure 5-11. VDO vs VIN Input Voltage (V) Dropout Voltage (V) 0.5 0.6 0.7 0.8 0.9 1.1 1.2 1.3 1.4 TJ -50°C -40°C 0°C 25°C 85°C 125°C 150°C IOUT = 0.8A Figure 5-12. VDO vs VIN www.ti.com LM1117-Q1 SBVS468A – DECEMBER 2024 – REVISED JUNE 2025 Copyright © 2025 Texas Instruments Incorporated Submit Document Feedback 7 Product Folder Links: LM1117-Q1

at operating temperature TJ = 25°C, VIN = VOUT(NOM) + 1.5V or 2.5V (whichever is greater), IOUT = 10mA, CIN = 1.0µF, and COUT = 1.0µF (unless otherwise noted) Temperature (qC) Input Voltage (V) -50 -25 0 25 50 75 100 125 150 2.05 2.1 2.15 2.2 2.25 2.3 VUVLO+ (VIN rising) VUVLO- (VIN falling) Figure 5-13. UVLO Thresholds vs Temperature Output Current (A) Dropout Voltage (V) 0.2 0.4 0.6 0.8 1.2 1.4 TJ -50°C -40°C 0°C 25°C 85°C 125°C 150°C VIN ≥ 3.0V Figure 5-14. VDO vs IOUT Output Current (A) Output Voltage (%) 100 125 150 TJ -50°C -40°C 0°C 25°C 85°C 125°C 150°C VIN ≥ 3.0V Figure 5-15. Foldback Current Limit vs Temperature Output Current (A) Output Voltage (%) 100 125 150 TJ -50°C -40°C 0°C 25°C 85°C 125°C 150°C Figure 5-16. Foldback Current Limit vs Temperature Frequency (Hz) Power Supply Rejection Ratio (dB) 100 10 100 1k 10k 100k 1M 10M IOUT 60 mA 300 mA 550 mA 1.0 A VOUT = 1.8V, VIN = 3.3V Figure 5-17. PSRR vs IOUT Frequency (Hz) Power Supply Rejection Ratio (dB) 100 10 100 1k 10k 100k 1M 10M D001 VIN 2.8 V 3.0 V 3.3 V 3.5 V 3.8 V 4.0 V 4.3 V VOUT = 1.8V, IOUT = 0.55A Figure 5-18. PSRR vs VIN LM1117-Q1 SBVS468A – DECEMBER 2024 – REVISED JUNE 2025 www.ti.com

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at operating temperature TJ = 25°C, VIN = VOUT(NOM) + 1.5V or 2.5V (whichever is greater), IOUT = 10mA, CIN = 1.0µF, and COUT = 1.0µF (unless otherwise noted) Frequency (Hz) Output Voltage Noise (PVHz) 0.005 0.01 0.02 0.05 0.1 0.2 0.5 20 20 10 100 1k 10k 100k 1M 10M VOUT 0.8 V, RMS Noise = 66.4 PVRMS 3.3 V, RMS Noise = 216.5 PVRMS IOUT = 0.1A, RMS noise BW = 10Hz to 100kHz Figure 5-19. Output Noise (Vn) vs VOUT T i m e ( m s ) Voltage (V) Current (A) - 1 - 1 . 7 5 0 - 1 . 5 1 - 1 . 2 5 2 - 1 3 - 0 . 7 5 4 - 0 . 5 5 - 0 . 2 5 6 0 7 0 . 2 5 8 0 . 5 9 0 . 7 5 V I N I I N V O U T IOUT = 0.1A, COUT = 22µF Figure 5-20. Inrush Current With 22µF at COUT www.ti.com LM1117-Q1 SBVS468A – DECEMBER 2024 – REVISED JUNE 2025 Copyright © 2025 Texas Instruments Incorporated Submit Document Feedback 9 Product Folder Links: LM1117-Q1

6 Detailed Description

6.1 Overview

The LM1117-Q1 is a AEC-Q100 qualified, low quiescent current, high PSRR linear regulator capable of sourcing load current up to 1A. This device is designed for high current automotive applications in HEV/EV and power train systems where there are increasingly stringent requirements for standby and active power consumption. This device features integrated foldback current limit, thermal shutdown, internal output pulldown, and undervoltage lockout (UVLO). This device delivers excellent line and load transient performance. The LM1117- Q1 is low noise and exhibits very good PSRR. The operating ambient temperature range of the device is –40°C to +125°C.

6.2 Functional Block Diagram

VREF = 0.8 V VIN VOUT GND Internal Controller UVLO Current Limit Thermal Shutdown R1R2 GND Output Pull-down GND GND

6.3 Feature Description

6.3.1 Dropout Voltage

Dropout voltage (V DO) is defined as the input voltage minus the output voltage (V IN – V OUT) at the rated output current (I RATED), where the pass transistor is fully turned on. I RATED is the maximum I OUT listed in the Recommended Operating Conditions table. The pass transistor is in the ohmic or triode region of operation, and acts as a switch. The dropout voltage indirectly specifies a minimum input voltage greater than the nominal programmed output voltage at which the output voltage is expected to stay in regulation. If the input voltage falls to less than the nominal output regulation, then the output voltage falls as well. For a CMOS regulator, the dropout voltage is determined by the drain-source on-state resistance (RDS(ON)) of the pass transistor. Therefore, if the linear regulator operates at less than the rated current, the dropout voltage for that current scales accordingly. Use the following equation to calculate the RDS(ON) of the device. R =DS(ON) VDO IRA TED (1) LM1117-Q1 SBVS468A – DECEMBER 2024 – REVISED JUNE 2025 www.ti.com

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6.3.2 Foldback Current Limit

The device has an internal current limit circuit that protects the regulator during transient high-load current faults or shorting events. The current limit is a hybrid brick-wall-foldback scheme. The current limit transitions from a brick-wall scheme to a foldback scheme at the foldback voltage (V FOLDBACK). In a high-load current fault with the output voltage above V FOLDBACK, the brick-wall scheme limits the output current to the current limit (I CL). When the voltage drops below V FOLDBACK, a foldback current limit activates that scales back the current as the output voltage approaches GND. When the output is shorted, the device supplies a typical current called the short-circuit current limit (ISC). ICL and ISC are listed in the Electrical Characteristics table. For this device, VFOLDBACK = 50% × VOUT(nom). The output voltage is not regulated when the device is in current limit. When a current limit event occurs, the device begins to heat up because of the increase in power dissipation. When the device is in brick-wall current limit, the pass transistor dissipates power [(V IN – VOUT) × ICL]. When the device output is shorted and the output is below V FOLDBACK, the pass transistor dissipates power [(V IN – V OUT) × I SC]. If thermal shutdown is triggered, the device turns off. After the device cools down, the internal thermal shutdown circuit turns the device back on. If the output current fault condition continues, the device cycles between current limit and thermal shutdown. For more information on current limits, see the Know Your Limits application note. Figure 6-1 shows a diagram of the foldback current limit. VOUT(NOM) 0 V 0 mA VOUT VFOLDBACK ICLISC IRATED IOUT Brickwall Foldback Figure 6-1. Foldback Current Limit

6.3.3 Undervoltage Lockout (UVLO)

The device has an independent undervoltage lockout (UVLO) circuit that monitors the input voltage, allowing a controlled and consistent turn-on and turn-off of the output voltage. To prevent the device from turning off if the input drops during turn-on, the UVLO has hysteresis as specified in the Electrical Characteristics table.

6.3.4 Output Pulldown

The device has an output pulldown circuit. V OUT pulldown sink to ground capability is listed in the Electrical Characteristics table. The output pulldown activates under the following conditions:

Device disabled
1.0V < VIN < VUVLO www.ti.com LM1117-Q1 SBVS468A – DECEMBER 2024 – REVISED JUNE 2025 Copyright © 2025 Texas Instruments Incorporated Submit Document Feedback 11 Product Folder Links: LM1117-Q1

The output pulldown current for this device is 0.9mA typical. Do not rely on the output pulldown circuit for discharging a large amount of output capacitance after the input supply collapses. When the input supply collapses, reverse current flows from the output to the input, and this reverse current causes damage to the device. See the Reverse Current section for more details.

6.3.5 Thermal Shutdown

The device contains a thermal shutdown protection circuit to disable the device when the junction temperature (TJ) of the pass transistor rises to T SD(shutdown) (typical). Thermal shutdown hysteresis makes sure the device resets (turns on) when the temperature falls to TSD(reset) (typical). The thermal time-constant of the semiconductor die is fairly short. Thus the device cycles on and off when thermal shutdown is reached until power dissipation is reduced. Power dissipation during start-up is high from large VIN – VOUT voltage drops across the device or from high inrush currents charging large output capacitors. Under some conditions, the thermal shutdown protection disables the device before start-up completes. For reliable operation, limit the junction temperature to the maximum listed in the Recommended Operating Conditions table. Operation above this maximum temperature causes the device to exceed operational specifications. Although the device internal protection circuitry is designed to protect against thermal overall conditions, this circuitry is not intended to replace proper heat sinking. Continuously running the device into thermal shutdown or above the maximum recommended junction temperature reduces long-term reliability. LM1117-Q1 SBVS468A – DECEMBER 2024 – REVISED JUNE 2025 www.ti.com

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6.4 Device Functional Modes

Table 6-1 shows the conditions that lead to the different modes of operation. See the Electrical Characteristics table for parameter values. Table 6-1. Device Functional Mode Comparison OPERATING MODE PARAMETER VIN IOUT TJ Normal operation VIN > VOUT(nom) + VDO and VIN > VIN(min) IOUT < IOUT(max) TJ < TSD(shutdown) Dropout operation VIN(min) < VIN < VOUT(nom) + VDO IOUT < IOUT(max) TJ < TSD(shutdown) Disabled (any true condition disables the device) VIN < VUVLO Not applicable TJ > TSD(shutdown)

6.4.1 Normal Operation

The device regulates to the nominal output voltage when the following conditions are met:

The input voltage is greater than the nominal output voltage plus the dropout voltage (VOUT(nom) + VDO)
The output current is less than the current limit (IOUT < ICL)
The device junction temperature is less than the thermal shutdown temperature (TJ < TSD)

6.4.2 Dropout Operation

If the input voltage is lower than the nominal output voltage plus the specified dropout voltage, but all other conditions are met for normal operation, the device operates in dropout mode. In this mode, the output voltage tracks the input voltage. During this mode, the transient performance of the device becomes significantly degraded because the pass transistor is in the ohmic or triode region, and acts as a switch. Line or load transients in dropout result in large output-voltage deviations. When the device is in a steady dropout state (defined as when the device is in dropout, V IN < VOUT(NOM) + VDO, directly after being in a normal regulation state, but not during start-up), the pass transistor is driven into the ohmic or triode region. When the input voltage returns to a value greater than or equal to the nominal output voltage plus the dropout voltage (V OUT(NOM) + V DO), the output voltage overshoots for a short period of time while the device pulls the pass transistor back into the linear region.

6.4.3 Disabled

The device output is disabled if V IN is less than the UVLO voltage, or if the device junction temperature exceeds the thermal shutdown threshold. See the Electrical Characteristics table for more details regarding the UVLO voltage thresholds and thermal shutdown. When disabled, the pass transistor turns off and internal circuits shut down. The output voltage is also actively discharged to ground by an internal discharge circuit from the output to ground. www.ti.com LM1117-Q1 SBVS468A – DECEMBER 2024 – REVISED JUNE 2025 Copyright © 2025 Texas Instruments Incorporated Submit Document Feedback 13 Product Folder Links: LM1117-Q1

7 Application and Implementation

Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes, as well as validating and testing their design implementation to confirm system functionality.

7.1 Application Information

7.1.1 Recommended Capacitor Types

The device is designed to be stable using low equivalent series resistance (ESR) ceramic capacitors at the input and output. Multilayer ceramic capacitors have become the industry standard for these types of applications and are recommended, but use good judgment. Ceramic capacitors that employ X7R-, X5R-, and C0G-rated dielectric materials provide relatively good capacitive stability across temperature. Whereas using Y5V-rated capacitors is discouraged because of large variations in capacitance. Regardless of the ceramic capacitor type selected, the effective capacitance varies with operating voltage and temperature. Generally, expect the effective capacitance to decrease by as much as 50%. The input and output capacitors recommended in the Recommended Operating Conditions table account for an effective capacitance of approximately 50% of the nominal value.

7.1.2 Input and Output Capacitor Requirements

Although an input capacitor is not required for stability, good analog design practice is to connect a capacitor from IN to GND. This capacitor counteracts reactive input sources and improves transient response, input ripple, and PSRR. An input capacitor is recommended if the source impedance is more than 0.5 Ω. A higher value capacitor is necessary if large, fast rise-time load or line transients are anticipated or if the device is located several inches from the input power source. Dynamic performance of the device is improved with the use of an output capacitor. Use an output capacitor within the range specified in the Recommended Operating Conditions table for stability.

7.1.3 Reverse Current

Excessive reverse current damages this device. Reverse current flows through the intrinsic body diode of the pass transistor instead of the normal conducting channel. At high magnitudes, this current flow degrades the long-term reliability of the device. Conditions where reverse current occurs are outlined in this section, all of which exceed the absolute maximum rating of VOUT ≤ VIN + 0.3V.

If the device has a large COUT and the input supply collapses with little or no load current
The output is biased when the input supply is not established
The output is biased above the input supply If reverse current flow is expected in the application, external protection is recommended to protect the device. Reverse current is not limited in the device, so external limiting is required if extended reverse voltage operation is anticipated. LM1117-Q1 SBVS468A – DECEMBER 2024 – REVISED JUNE 2025 www.ti.com

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Figure 7-1 shows one approach for protecting the device. Device IN OUT GND COUT CIN Schottky Diode Internal Body Diode Figure 7-1. Example Circuit for Reverse Current Protection Using a Schottky Diode

7.1.4 Power Dissipation (PD)

Circuit reliability requires consideration of the device power dissipation, location of the circuit on the printed circuit board (PCB), and correct sizing of the thermal plane. Make sure the PCB area around the regulator has few or no other heat-generating devices that cause added thermal stress. To first-order approximation, power dissipation in the regulator depends on the input-to-output voltage difference and load conditions. Use the following equation to calculate the power dissipation (PD). PD = (VIN – VOUT) × IOUT (2) Note Power dissipation is minimized, and therefore greater efficiency achieved, by correct selection of the system voltage rails. For the lowest power dissipation, use the minimum input voltage required for correct output regulation. For devices with a thermal pad, the primary heat conduction path for the device package is through the thermal pad to the PCB. Solder the thermal pad to a copper pad area under the device. Make sure this pad area contains an array of plated vias that conduct heat to additional copper planes for increased heat dissipation. The maximum power dissipation determines the maximum allowable ambient temperature (T A) for the device. According to the following equation, power dissipation and junction temperature are most often related by the junction-to-ambient thermal resistance (R θJA) of the combined PCB and device package and the temperature of the ambient air (TA). TJ = TA + (RθJA × PD) (3) Thermal resistance (R θJA) is highly dependent on the heat-spreading capability built into the particular PCB design, and therefore varies according to the total copper area, copper weight, and location of the planes. The junction-to-ambient thermal resistance listed in the Thermal Shutdown table is determined by the JEDEC standard PCB and copper-spreading area, and is used as a relative measure of package thermal performance. This thermal resistance is used as a relative measure of package thermal performance. R θJA is improved by 35% to 55% compared to the Thermal Shutdown table value with the PCB board layout optimization. See the An empirical analysis of the impact of board layout on LDO thermal performance application note for further details www.ti.com LM1117-Q1 SBVS468A – DECEMBER 2024 – REVISED JUNE 2025 Copyright © 2025 Texas Instruments Incorporated Submit Document Feedback 15 Product Folder Links: LM1117-Q1

7.1.5 Estimating Junction Temperature

The JEDEC standard now recommends the use of psi ( Ψ) thermal metrics to estimate the junction temperatures of the linear regulator when in-circuit on a typical printed circuit board application. These metrics are not thermal resistance parameters and instead offer a practical and relative way to estimate junction temperature. These psi metrics are determined to be significantly independent of the copper area available for heat-spreading. The Thermal Shutdown table lists the primary thermal metrics, which are the junction-to-top characterization parameter (ψJT) and junction-to-board characterization parameter (ψJB). These parameters provide two methods for calculating the junction temperature (T J). As described in the following equations, use the junction-to-top characterization parameter ( ψJT) with the temperature at the center-top of device package (T T) to calculate the junction temperature. Use the junction-to-board characterization parameter ( ψJB) with the PCB surface temperature 1mm from the device package (TB) to calculate the junction temperature. TJ = TT + ψJT × PD (4) where:

PD is the dissipated power
TT is the temperature at the center-top of the device package TJ = TB + ψJB × PD (5) where:
TB is the PCB surface temperature measured 1mm from the device package and centered on the package edge For detailed information on the thermal metrics and how to use them, see the Semiconductor and IC Package Thermal Metrics application note.

7.2 Typical Application

The LM1117-Q1 is an AEC-Q100 qualified, low quiescent current linear regulator designed for high-current automotive applications. Unlike most typical high-current linear regulators, the LM1117-Q1 consumes significantly less quiescent current. This device delivers excellent line and load transient performance. The device is low noise and exhibits a very good PSRR. As a result, the LM1117-Q1 is designed for high-current automotive applications that require very sensitive power-supply rails. This regulator offers both current limit and thermal protection. The operating ambient temperature range of the device is –40°C to +125°C. Figure 7-2 shows a typical application circuit for this device. IN OUT GNDCIN 1µF COUT 2.2µF VIN VOUT LM1117-Q1 Figure 7-2. Typical Application Circuit LM1117-Q1 SBVS468A – DECEMBER 2024 – REVISED JUNE 2025 www.ti.com

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Product Folder Links: LM1117-Q1

7.2.1 Design Requirements

For this design example, use the parameters listed in Table 7-1 as the input parameters. Table 7-1. Design Parameters PARAMETER DESIGN REQUIREMENT Input voltage 12V Output voltage 3.3V Output current 100mA

7.2.2 Detailed Design Procedure

For this design example, the 3.3V, fixed-version LM111733QxxxRQ1 is selected and is powered by a standard 12V input supply. The dropout voltage (V DO) is kept within the LM1117-Q1 dropout voltage specification for the 3.3V output voltage option to keep the device in regulation under all load and temperature conditions for this design. A 1.0µF output capacitor is recommended for excellent load transient response. The input capacitor is optional and is used to reduce the input impedance of the circuit and improve the transient response. As with any regulator, increasing the size of the output capacitor reduces overshoot and undershoot magnitude.

7.2.3 Application Curves

at operating temperature T J = 25°C, V IN = VOUT(NOM) + 1.5V or 2.5V (whichever is greater), I OUT = 10mA, C IN = 1.0µF, and COUT = 1.0µF (unless otherwise noted). T i m e ( m s ) Voltage (V) Current (A) - 1 - 1 . 7 5 0 - 1 . 5 1 - 1 . 2 5 2 - 1 3 - 0 . 7 5 4 - 0 . 5 5 - 0 . 2 5 6 0 7 0 . 2 5 8 0 . 5 9 0 . 7 5 V I N I I N V O U T IOUT = 0.1A, COUT = 22µF Figure 7-3. Start-up and Inrush Current With 22µF at COUT VIN = 5V, VOUT = 3.3V, ramp rate = 0.4A/µs Figure 7-4. IOUT Transient From 0mA to 100mA VIN = 5V, VOUT = 3.3V, ramp rate = 0.5A/µs Figure 7-5. IOUT Transient From 1mA to 1A VIN = 5V, VOUT = 3.3V, ramp rate = 0.8A/µs Figure 7-6. IOUT Transient From 250mA to 850mA www.ti.com LM1117-Q1 SBVS468A – DECEMBER 2024 – REVISED JUNE 2025 Copyright © 2025 Texas Instruments Incorporated Submit Document Feedback 17 Product Folder Links: LM1117-Q1

VIN = 5V, VOUT = 3.3V, IOUT = 1A, VIN ramp rate = 0.6V/µs Figure 7-7. VIN Transient in Dropout From 4V to 13V VOUT = 3.3V, IOUT = 33µA, VIN ramp rate = 1.6V/µs Figure 7-8. VIN Transient From 5V to 16V

7.3 Best Design Practices

Place input and output capacitors as close to the device as possible. Use a ceramic output capacitor. Do not exceed the device absolute maximum ratings.

7.4 Power Supply Recommendations

Connect a low output impedance power supply directly to the input pin of the device. Inductive impedances between the input supply and the input pin creates significant voltage excursions at the input pin during start-up or load transient events. LM1117-Q1 SBVS468A – DECEMBER 2024 – REVISED JUNE 2025 www.ti.com

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Product Folder Links: LM1117-Q1

7.5 Layout

7.5.1 Layout Guidelines

Place input and output capacitors as close to the device pins as possible. To improve characteristic AC performance such as PSRR, output noise, and transient response, design the board with separate ground planes for VIN and VOUT, with the ground plane connected only at the GND pin of the device. In addition, connect the ground connection for the output capacitor directly to the device GND pin. Higher value ESR capacitors degrade PSRR performance.

7.5.2 Layout Examples

Figure 7-9. Layout Example for DCY (SOT-223) Package INGND OUT 1 3 GND COUT CIN OUT Figure 7-10. Layout Example for KVU (TO-252) Package www.ti.com LM1117-Q1 SBVS468A – DECEMBER 2024 – REVISED JUNE 2025 Copyright © 2025 Texas Instruments Incorporated Submit Document Feedback 19 Product Folder Links: LM1117-Q1

8 Device and Documentation Support

8.1 Device Support

8.1.1 Device Nomenclature

Table 8-1. Available Options PRODUCT(1) (2) DESCRIPTION LM1117 xxQyyyz Q1 xx is the nominal output voltage. For example: 12 for 1.2V, 33 for 3.3V, 50 for 5.0V, and 12V0 for 12.0V. Q indicates that this device is a grade-1 device in accordance with the AEC-Q100 standard. yyy is the package designator. For example: DCY for SOT-223, KVU for TO-252. z is the package quantity. R is for reel. Q1 indicates that this device is an automotive grade (AEC-Q100) device. (1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or visit the device product folder at www.ti.com. (2) The device is available in factory-programmable fixed output voltage increments of 100mV upon request.

8.2 Documentation Support

8.2.1 Related Documentation

For related documentation see the following:

Texas Instruments, TLV767-Q1 Automotive Adjustable- and Fixed-Output 1A Linear Voltage Regulator data sheet
Texas Instruments, TLV766-Q1 Automotive Adjustable- and Fixed-Output 500mA Linear Voltage Regulator data sheet
Texas Instruments, LM1117 800mA Low-Dropout Linear Regulator data sheet
Texas Instruments, Know Your Limits application note
Texas Instruments, An empirical analysis of the impact of board layout on LDO thermal performance application note

8.3 Receiving Notification of Documentation Updates

To receive notification of documentation updates, navigate to the device product folder on ti.com. Click on Notifications to register and receive a weekly digest of any product information that has changed. For change details, review the revision history included in any revised document.

8.4 Support Resources

TI E2E™ support forums are an engineer's go-to source for fast, verified answers and design help — straight from the experts. Search existing answers or ask your own question to get the quick design help you need. Linked content is provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use.

8.5 Trademarks

TI E2E™ is a trademark of Texas Instruments. All trademarks are the property of their respective owners.

8.6 Electrostatic Discharge Caution

This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.

8.7 Glossary

TI Glossary This glossary lists and explains terms, acronyms, and definitions. LM1117-Q1 SBVS468A – DECEMBER 2024 – REVISED JUNE 2025 www.ti.com

Product Folder Links: LM1117-Q1

9 Revision History

NOTE: Page numbers for previous revisions may differ from page numbers in the current version. Changes from Revision * (December 2024) to Revision A (June 2025) Page

10 Mechanical, Packaging, and Orderable Information

The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation. www.ti.com LM1117-Q1 SBVS468A – DECEMBER 2024 – REVISED JUNE 2025 Copyright © 2025 Texas Instruments Incorporated Submit Document Feedback 21 Product Folder Links: LM1117-Q1

www.ti.com 21-Nov-2025 PACKAGING INFORMATION Orderable part number Status (1) Material type (2) Package | Pins Package qty | Carrier RoHS (3) Lead finish/ Ball material (4) MSL rating/ Peak reflow (5) Op temp (°C) Part marking (6) LM111712QKVURQ1 Active Production TO-252 (KVU) | 3 2500 | LARGE T&R Yes SN Level-3-260C-168 HR -40 to 125 LM111712 LM111712V0QKVURQ1 Active Production TO-252 (KVU) | 3 2500 | LARGE T&R Yes SN Level-3-260C-168 HR -40 to 125 M1117120 LM111733QKVURQ1 Active Production TO-252 (KVU) | 3 2500 | LARGE T&R Yes SN Level-3-260C-168 HR -40 to 125 LM111733 LM111750QKVURQ1 Active Production TO-252 (KVU) | 3 2500 | LARGE T&R Yes SN Level-3-260C-168 HR -40 to 125 LM111750 PLM1117120QDCYRQ1 Active Preproduction SOT-223 (DCY) | 4 2500 | LARGE T&R - Call TI Call TI -40 to 125 PLM1117120QDCYRQ1.A Active Preproduction SOT-223 (DCY) | 4 2500 | LARGE T&R - Call TI Call TI -40 to 125 PLM1117120QKVURQ1.A Active Preproduction TO-252 (KVU) | 3 2500 | LARGE T&R - Call TI Call TI -40 to 125 PLM111733QDCYRQ1 Active Preproduction SOT-223 (DCY) | 4 2500 | LARGE T&R - Call TI Call TI -40 to 125 PLM111733QDCYRQ1.A Active Preproduction SOT-223 (DCY) | 4 2500 | LARGE T&R - Call TI Call TI -40 to 125 PLM111733QKVURQ1.A Active Preproduction TO-252 (KVU) | 3 2500 | LARGE T&R - Call TI Call TI -40 to 125 PLM111750QDCYRQ1 Active Preproduction SOT-223 (DCY) | 4 2500 | LARGE T&R - Call TI Call TI -40 to 125 PLM111750QDCYRQ1.A Active Preproduction SOT-223 (DCY) | 4 2500 | LARGE T&R - Call TI Call TI -40 to 125 PLM111750QKVURQ1.A Active Preproduction TO-252 (KVU) | 3 2500 | LARGE T&R - Call TI Call TI -40 to 125 (1) Status: For more details on status, see our product life cycle. (2) Material type: When designated, preproduction parts are prototypes/experimental devices, and are not yet approved or released for full production. Testing and final process, including without limitation quality assurance, reliability performance testing, and/or process qualification, may not yet be complete, and this item is subject to further changes or possible discontinuation. If available for ordering, purchases will be subject to an additional waiver at checkout, and are intended for early internal evaluation purposes only. These items are sold without warranties of any kind. (3) RoHS values: Yes, No, RoHS Exempt. See the TI RoHS Statement for additional information and value definition. (4) Lead finish/Ball material: Parts may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two lines if the finish value exceeds the maximum column width. (5) MSL rating/Peak reflow: The moisture sensitivity level ratings and peak solder (reflow) temperatures. In the event that a part has multiple moisture sensitivity ratings, only the lowest level per JEDEC standards is shown. Refer to the shipping label for the actual reflow temperature that will be used to mount the part to the printed circuit board. (6) Part marking: There may be an additional marking, which relates to the logo, the lot trace code information, or the environmental category of the part. Addendum-Page 1

www.ti.com 21-Nov-2025 Multiple part markings will be inside parentheses. Only one part marking contained in parentheses and separated by a "~" will appear on a part. If a line is indented then it is a continuation of the previous line and the two combined represent the entire part marking for that device. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. OTHER QUALIFIED VERSIONS OF LM1117-Q1 :

Catalog : LM1117 NOTE: Qualified Version Definitions:
Catalog - TI's standard catalog product Addendum-Page 2

PACKAGE MATERIALS INFORMATION www.ti.com 21-Nov-2025 TAPE AND REEL INFORMATION Reel Width (W1) REEL DIMENSIONS A0B0K0WDimension designed to accommodate the component lengthDimension designed to accommodate the component thicknessOverall width of the carrier tapePitch between successive cavity centersDimension designed to accommodate the component width TAPE DIMENSIONSK0 P1B0WA0Cavity QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE Pocket QuadrantsSprocket HolesQ1Q1Q2Q2Q3Q3Q4Q4User Direction of Feed P1ReelDiameter *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Reel Diameter (mm) Reel Width W1 (mm) (mm) (mm) (mm) (mm) W (mm) Pin1 Quadrant Pack Materials-Page 1

PACKAGE MATERIALS INFORMATION www.ti.com 21-Nov-2025 TAPE AND REEL BOX DIMENSIONS Width (mm) W LH *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) LM111712QKVURQ1 TO-252 KVU 3 2500 340.0 340.0 38.0 LM111712V0QKVURQ1 TO-252 KVU 3 2500 340.0 340.0 38.0 LM111733QKVURQ1 TO-252 KVU 3 2500 340.0 340.0 38.0 LM111750QKVURQ1 TO-252 KVU 3 2500 340.0 340.0 38.0 Pack Materials-Page 2

www.ti.com PACKAGE OUTLINE C 5.460 4.953 10.41 9.40 2.29 4.58 3X 0.890 0.635 1.02 0.61 1.27 0.89

2.52 MAX

0.61 0.46 4.32 MIN

5.21 MIN

-80 0.13 0.00 1.78 1.40 0.61 0.46 A 6.70 6.35 B 6.22 5.97 0.51 GAGE PLANE TO-252 - 2.52 mm max heightKVU0003A TO-252 4218915/A 02/2017 NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. Shape may vary per different assembly sites. 4. Reference JEDEC registration TO-252.

0.25 C A B

SCALE 1.500 SEE DETAIL A EXPOSED THERMAL PAD NOTE 3 A 7.000 DETAIL A TYPICAL

www.ti.com EXAMPLE BOARD LAYOUT

0.07 MAX

ALL AROUND 0.07 MIN ALL AROUND (6.15) (5.55)(4.58) 2X (1) 2X (2.75) TO-252 - 2.52 mm max heightKVU0003A TO-252 4218915/A 02/2017 LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE:6X PKG SYMM NOTES: (continued) 5. This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments literature numbers 6. Vias are optional depending on application, refer to device data sheet. It is recommended that vias under paste be filled, plugged or tented. SOLDER MASK OPENING METAL EXPOSED METAL SOLDER MASK DETAILS NOT TO SCALE NON SOLDER MASK DEFINED METAL UNDER SOLDER MASK SOLDER MASK OPENING EXPOSED METAL SOLDER MASK DEFINED

www.ti.com EXAMPLE STENCIL DESIGN (R0.05) 2X (2.75) 2X (1) (4.58) (1.33) TYP (1.18) TYP (0.14) (4.2) TO-252 - 2.52 mm max heightKVU0003A TO-252 4218915/A 02/2017 PKG NOTES: (continued) 7. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 8. Board assembly site may have different recommendations for stencil design. SOLDER PASTE EXAMPLE BASED ON 0.125 mm THICK STENCIL EXPOSED PAD 65% PRINTED SOLDER COVERAGE BY AREA SCALE:8X SYMM

MPDS094A – APRIL 2001 – REVISED JUNE 2002 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 DCY (R-PDSO-G4) PLASTIC SMALL-OUTLINE 4202506/B 06/2002 6,30 (0.248) 6,70 (0.264) 2,90 (0.114) 3,10 (0.122) 6,70 (0.264) 3,30 (0.130) 0,02 (0.0008) 0,10 (0.0040) 1,50 (0.059) 1,70 (0.067) 0,23 (0.009) 0,35 (0.014) 1 2 3 0,66 (0.026) 0,84 (0.033) 1,80 (0.071) MAX Seating Plane 0°–10° Gauge Plane 0,75 (0.030) MIN 0,25 (0.010) 0,08 (0.003) 0,10 (0.004) M 2,30 (0.091) NOTES: A. All linear dimensions are in millimeters (inches). B. This drawing is subject to change without notice. C. Body dimensions do not include mold flash or protrusion. D. Falls within JEDEC TO-261 Variation AA.

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