PLL200 NPC | Alldatasheet
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NIPPON PRECISION CIRCUTS LTD. SERIAL INPUT PLL FREQUENCY SYNTHESIZER sR WEL DTN IE SILE I ™ General Description The PLL2001 is a CMOS LSI for PLL Frequency Synthesizer. 16bit programmable divide-by-—R counter and divide- by —N counter are set by serial data. @ Features + 200MHz input capability (5V,typ,Fin) aD . + 20MHz input capability (5V,typ,XIn) Pin Asignment + +R range = 5 to 65535 TOP VIEW + +N range = 272 to 65535 ssizaaiy + Lock Detect signal (21 (21 (=) (11 1 (21 fet + Both Active and Passive filter can be use D mpc 0000 . . PLL2001 + FV and FR signal output terminals SENET} + Package 16PIN Dual — Inline — Plastic Bft23342 16PIN Smal 1 — Outline — Plastic m Package Dimension (Uait:mm) Be = tnogers rape eeee snes | a =I . . aaaatal — oe Lod —— 1.54 8 aug. { {\\ * > ose ™ Block Diagre 1 —_— . Xin ee 16-BIT-R COUNTER ; —— Xorr COOP eer oleae LETTE TTT TTT TTY pata —10__ ae CHARGE |. cLK —— As 17-BIT SHIFT REGISTER | PUMP [> LTT TTTTTTT iti ty Frys 21 So] 16-BIT-N COUNTER 7 Rance ——
MPC PLL200" NIPPON PRECISION CIRCUITS LTO. eee eee @ PIN Description (1 of 2) Function Xn (1) These pins are connected to terminals of an external Xout (2) pallarel resonant crystal. XIN may also serve as input for an externaly-generated reference signal. It has feed back resistor, so that can use capacitance coupling. XOUT can be use for external circuit. FV (3) There are buffered outputs from compare-divider (FV) Dop (5) There are terminals for low pass filter. Doa (12) | Dop and Doa are tri-state outputs. OV (15) These four outputs can be selected as follows. OP (16) Dop : Passive filter Doa : Active filter OV,OR : Differential filter SO | rot Fn (8) Fin is a input for compare-divider. RANGE (14) It has feed back resistor, so that can use capacitance coupling. A input frequency range can be selected as follows, 1. RANGE is high A input range is 5MHz to 250MHz (typ @ 5. 0V) 1.0V p-p sine wave. 2. RANGE is low A input range is DC to 22MHz (typ @ 5. 0V) 1.5V p-p sine wave.
NIPPON PRECISION CIRCUS LTD. L 2001 $$$ SSS @ PIN Description (2 of 2) [PIN name [ Function DATA (10) | There are a data and a clock inputs to a sift register. CLK (9) A serial data sifts when CLK changes low to high. The structure of sift register and input data format refer to Fig 1. LE (11) This is a write signal to latch. When LE is held high, write mode is active. The sift register is cleared at the falling edge of LE. LD (7) This is a unlock detect terminal. When PLL is unlocked, LD becomes to be low. Divide ratio of Compare — Divider and Reference — Divider iS fal) S } sift direction nyalidl valid data (RANGE = tow! valid data J (RANGE = High) This is a selecting bit for latch of divide ratio CONTROL = High — set a Reference — Divider CONTROL = Low — set a Compare — Divider When the all bits of N—latch (Compare-Divider) is cleared, stops count, thus current consumption decreases. When the all bits of R—Jlatch (Reference - Divider) is cleared, the oscllator stops. The result of clear all bits of both N and R latch, a current consumption is within 10 WA. Fig] —3-
NIPPON PRECISION CIRCUITS LTD. PLL200 ] @ Setting a Divide Ratio data LiXZ CD GD GD GD GED GHD GND GND GHD GHD GND (=) GD GND GD CD SS) LE $n +A serial data must be input from MSB. +A serial data is latched at the rising edge of CLK, thus data must change at falling edge of CLK. + LE must be low while data are written to sift register. Data is trans — fer from sift register to Reference — Divider or Compare — Divider, when LE is held high. -A sift register is cleared at the falling edge of LE. It is applicable to save a current consumption. (all bits are 0) (see fig2) LE 0) ®@ ol @ @Set CONTROL = High @Clear sift register Set another bits = Low @Set all bits of Reference @Set all bits of Compare Divider = Low Divider = Low Fig2 @ Phase Comparator = Low Pass Filter timing chart Yeo H 1 ‘ Ri 1 Duo Fv Ly int 1 Dor YO hee veo Bt ele i oF oo tf _ ee | Passive filter Active filter Differential filter | |
@ Fin Maximum Operating Frequency's @ Fyn Frequency-Input Sensitivity's Specification Specification (MHz )| RANGE =H | /1 Cave Pl y= 45v 300) Fyn: 1Vp-p 7 to #1 / | sine wave m | sine wave, 1000 “200 YA y W 5 Lt | fee | : we 7 | f/\\_| i 100) a | Flt E a g a | | *1:Divide by 2120 g | 0 1 2. 3 4 5 (V) o 100 200 (MHz) @X1n Maximum Operating Frequency's @ Supply Voltage(Vdd)- Current Consumption's Specification Specification . Xin: 1Vp_p (ma) / Fin: 180MHz 1Vp-p\\ , ait, *2 Xin: 10MH2 1Vp-p} | | sol sine wave <n Z| { ro\\sine wave XN Raawsd top ree TLE 30) v, Z\\_ +20 a/4n VA (=e4nn 10) *2:Divide by 4100 0 1 2 3 4 5 (Vv) 0 1 2 3 4 5(V) Vpp —— —— Yop ®Fyy Input Frequency-Current Consumption © Xin Input Frequéncy- Current Consumption's Specification Specification Vpp = 5.5V \\ (ma) | Vpp =5.5V AS CO) ery: Vee | Xin =1Vp-r | sine wave / { sine wave Ipp Ipp. 5| 5 ° 100 200 (MHz) 0 2 4 6 8 10(MHz) Fin—— Xin——
mw Electrical Characteristics Ves=0V T,=—30~+80% [vpW [in typ Tmax | eevee eff faqs Curreat Tol | 27~2.3| FIN-Olliz, IVP-P sine wave commen [| (atm ice | =| [8 | ma | en ee a oar [aves ftitancs et [fee | Maximum Operating [fmaxl| 27~3.3[ FIN-IVP-P sine wave [60 [ 140] =| MHz | Frequency FIN pases sama fi P| — fnax2| 2.7~3.3| FINGL5YP-P sine wave | 10 | 14 | - | ME | Frequency XIN | fmax3 XIN-1VP-P sine wave [a1 | a4 | - | mex | Hgecd all il ld SR Frequency | FIN-IVP-P sine wave RANGE-LOW| - [- | DC | MHz | Input Voltage Vin [2.7~5.5 [XIN and FINGeance-uia | 1.o[ = | wo] Vv | me rics [| fanaa Pest —bos Y = ee Range CLE, DATA, LE passsp CC C«*S OT ee ed a Input Current XIN [itm [27~3.3| view | = (| = [to] HA | ee EC fa [zrasften [Tea essasMiw CE CT TT AT rar oar eT ee ae [as~s.s[vii-wo OT - C - ft0 | wa | mi [27~a3[wiew = = oo ea | obese ——— Fishes ee Cheese Fv, DOP, LD, Dok [E555 [VOW aT aT Fe, ov, o8 [2r~ss[vo-osy = | mA Se oe forte | 3oo[ - | - | as | srs TE nomen en EET
NIPPON PRECISION CIRCUITS LTD. PLL20o ] gw Absolute Maximum Ratings Parameter tits Power Suplly vop | -0.3~0.7 v Trput Voltage VIN D-0.3~VDDO.3 | Vv Vor “as |e Soldering Temperature 2605 c Soldering Time 10.5£0.5 c DATA on ta CLK tsuz LE Fig3 NIPPON PRECISION CIRCUITS LTD. SHUWASARURABASHT BLD. 5-4, HATCHOBOR! « CHOME, CHUORY, TOKYO, JAPAN 104 TEL OB-SS5-S21(f0) FAX 03-555-7528 -7-