PLA133-47 MICROCHIP | Alldatasheet
Document overview
- Manufacturer or author: Provided By alldatasheet.com(free datasheet download site)
- PDF pages: 20
Technical content
Features
- Automotive AEC-Q100 Qualified
- 1:4 LVCMOS Output Fanout Buffer from DC to160 MHz
- Low Additive Phase Jitter of 60 fs RMS
- 8 mA Output Drive Strength
- Low Power Consumption for Portable
Applications
- Automotive Applications Grade Compliant
- Low Input-Output Delay
- Output-Output Skew <250 ps
- 2.5V to 3.3V, ±10% Operation
- 1.8V +10%/–5% Operation up to 67 MHz
- Wide Temperature Range: –40°C to +125°C
- Available in 8-Pin SOIC Package
- Automotive Applications: - ADAS Vision System - Infotainment and Dashboard General Description The PLA133-47 is an advanced fanout buffer designed for automotive applications and other high performance, low-power, small form factor applications. The PLA133-47 accepts a reference clock input from DC to 160 MHz and provides four outputs of the same frequency with ultra-low additive jitter. The device is AEC-Q100 qualified. The PLA133-47 is available in a SOIC-8L package. Functional Block Diagram REF CLK0 CLK1 CLK2 CLK3 Low-Power DC to 160 MHz 1:4 Fanout Buffer IC for Automotive
DS20006357D-page 2 2020-2021 Microchip Technology Inc.
1.0 ELECTRICAL CHARACTERISTICS
Absolute Maximum Ratings † Static Discharge Voltage Operating Ratings † † Notice: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operational sections of this s pecification is not intended. Exposure to maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
Parameter Symbol Min. Typ. Max. Units Conditions Input Low Voltage V IL —— 0 . 3 x V DD V Note 1 Input High Voltage V IH 0.7xVDD ——V Note 1 Input Low Current I IL — — 50 µA V IN = 0V Input High Current I IH —— 1 0 0 µ A V IN = VDD Supply Current I DD — — 32 mA 66.67 MHz with unloaded outputs Output Low Voltage V OL —— 0 . 5 V IO = 8 mA, VDD = 3.3V —— 0 . 5 I O = 6 mA, VDD = 2.5V —— 0 . 5 I O = 4 mA, VDD = 1.8V Output High Voltage V OH VDD - 0.5 — — V IO = –8 mA, VDD = 3.3V VDD - 0.5 — — I O = –6 mA, VDD = 2.5V VDD - 0.5 — — I O = –4 mA, VDD = 1.8V Load Capacitance C L —— 3 0 pF Load Capacitance, below 100 MHz, VDD > 2.25V —— 1 0 Load Capacitance between 100 MHz and 134 MHz, VDD > 2.25V ——5 Load Capacitance, above 134 MHz, VDD > 2.25V —— 1 5 Load Capacitance, below 67 MHz, 1.71V < VDD < 2.25V Input Capacitance C IN ——7 p F — Power-Up Time t PU 0.05 — 50 ms Power-up time for all VDD to reach minimum specified voltage (power ramps must be monotonic) Note 1: REF input has a threshold voltage of VDD/2.
2020-2021 Microchip Technology Inc. DS20006357D-page 3 PLA133-47 SWITCHING CHARACTERISTICS Note 2 Parameter Symbol Min. Typ. Max. Units Conditions Operating Frequency f DC — 160 MHz V DD = 3.3V, 2.5V DC — 67 MHz V DD = 1.8V Duty Cycle = t2 ÷ t1 — 40 50 60 % Measured at 1.4V, Input is 50% Rise Time t 3 — — 1.5 ns Measured between 0.8V and 2.0V Fall Time t 4 — — 1.5 ns Measured between 0.8V and 2.0V Output to Output Skew Note 1 t5 — — 250 ps All outputs equally loaded Propagation Delay, REF Rising Edge to CLKX Rising Edge Note 1 t6 1 5 9.2 ns Measured at V DD/2 Note 1: Parameter is guaranteed by design and characterization. 2: All parameters are specified with loaded outputs. NOISE CHARACTERISTICS Parameter Symbol Min. Typ. Max. Units Conditions Additive Phase Jitter — — 60 — fs V DD = 3.3V, Frequency = 100 MHz Integration range 12 kHz - 20 MHz
DS20006357D-page 4 2020-2021 Microchip Technology Inc. TEMPERATURE SPECIFICATIONS (Note 1) Parameters Symbol Min. Typ. Max. Units Conditions Temperature Ranges Ambient Operating Temperature T A –40 — +125 °C Commercial Junction Temperature T J — — +150 °C — Storage Temperature Range T S –65 — +150 °C — Package Thermal Resistance 8-Lead SOIC R θJA — — 103.2 °C/W — Note 1: The maximum allowable power dissipation is a function of ambient temperature, the maximum allowable junction temperature and the thermal resistance from junction to air (i.e., TA, TJ, JA). Exceeding the maximum allowable power dissipation will cause the device operating junction temperature to exceed the maximum +150°C rating. Sustained junction temperatures above +150°C can impact the device reliability.
2020-2021 Microchip Technology Inc. DS20006357D-page 5 PLA133-47
2.0 PIN DESCRIPTIONS
FIGURE 2-1: Pin Configuration, 8-Lead SOIC Package. The descriptions of the pins are listed in Table 2-1. TABLE 2-1: PIN FUNCTION TABLE Pin Number Pin Name Type Description 1, 2 VDD P VDD connection
3 REF I Input reference frequency
4 GND P GND connection
5 CLK0 O Buffered clock output
6 CLK1 O Buffered clock output
7 CLK2 O Buffered clock output
8 CLK3 O Buffered clock output
DS20006357D-page 6 2020-2021 Microchip Technology Inc.
3.0 NOMINAL PERFORMAN CE CHARACTERISTICS
FIGURE 3-1: PLA133-47 Additive Phase Jitter: VDD = 3.3V, CLK-100 MHz, Integration Range 2 kHz - 20 MHz, 0.059 ps Typical. When a buffer is used to pass a signal then the buffer will add a little bit of its own noise. The phase noise on the output of the buffer will be a little bit more than the phase noise in the input signal. The noise added by the buffer to the input signal is quantified by the additive phase jitter defined by the following formula: EQUATION 3-1: Note: The graphs and tables provided following this note are a statistical summary based on a limited number of samples and are provided for informational purposes only. The performance characteristics listed herein are not tested or guaranteed. In some graphs or ta bles, the data presented may be outside the specified operating range (e.g., outside specified power supply range) and therefore outside the warranted range. PLA133-47 AdditivePhaseJitter OutputPhaseJitter 2 InputPhaseJitter 2–=
2020-2021 Microchip Technology Inc. DS20006357D-page 7 PLA133-47
4.0 SWITCHING WAVEFORMS
FIGURE 4-1: Duty Cycle Timing. FIGURE 4-2: All Outputs Rise/Fall Time. FIGURE 4-3: Output to Output Skew. FIGURE 4-4: Input-Output Propagation Delay. VDD/2 VDD/2 t3 t 4 OUTPUT 0.8V 2.0V 3.3V 0.8V 2.0V INPUT OUTPUT VDD/2 VDD/2 OUTPUT OUTPUT VDD/2 VDD/2
DS20006357D-page 8 2020-2021 Microchip Technology Inc.
5.0 TEST CIRCUIT
FIGURE 5-1: Test Circuit. VDD VDD GND GND OUTPUTS CLOAD CLK 0.1 PF 0.1 PF
2020-2021 Microchip Technology Inc. DS20006357D-page 9 PLA133-47
6.0 LAYOUT RECOMMENDATIONS
The following guidelines are to assist you with a performance optimized PCB design:
6.1 Signal Integrity and Termination
- Keep traces short - Trace = Inductor. With a capacitive load this equals ringing - Long trace = Transmission Line. Without proper termination this will cause reflections ringing and waveforms and degradations. - Use stripline or microstrip with defined impedance for long traces (> 1 inch) - Match traces on one side of the board to avoid reflections bouncing back and forth.
6.2 Decoupling and Power Supply
- Place decoupling capacitors as close as pos- sible to the VDD pin(s) to limit noise from the power supply - Addition of a ferrite bead in series with VDD can help prevent noise from other board sources - Value of decoupling capacitor is frequency dependant. Typical values to use are 0.1 µF for designs using frequencies <50 MHz and 0.01 µF for designs using frequencies >50 MHz FIGURE 6-1: Typical CMOS Termination. Place Series Resistor as close as possible to CMOS output CMOS Output Buffer ( Typical buffer impedance 20 ohm) To CMOS Input 50 ohm line RS ȍ
DS20006357D-page 10 2020-2021 Microchip Technology Inc.
7.0 PACKAGING INFORMATION
7.1 Package Marking Information
8-Lead SOIC* WWNNN SA P133-47 16524 Legend: XX...X Product code, customer-specific information, or frequency in MHz without printed decimal point Y Year code (last digit of calendar year) YY Year code (last 2 digits of calendar year) WW Week code (week of January 1 is week ‘01’) NNN Alphanumeric traceability code Pb-free JEDEC ® designator for Matte Tin (Sn) * This package is Pb-free. The Pb-free JEDEC designator ( ) can be found on the outer packaging for this package.
- , ▲, ▼ Pin one index is identified by a dot, delta up, or delta down (triangle mark). Note: In the event the full Microchip part numbe r cannot be marked on one line, it will be carried over to the next line, t hus limiting the number of available characters for customer-specific information. Package may or may not include the corporate logo. Underbar (_) and/or Overbar (‾) symbol may not be to scale.
2020-2021 Microchip Technology Inc. DS20006357D-page 11 PLA133-47 8-Lead SOIC Package Outline and Recommended Land Pattern
DS20006357D-page 12 2020-2021 Microchip Technology Inc.
2020-2021 Microchip Technology Inc. DS20006357D-page 13 PLA133-47
DS20006357D-page 14 2020-2021 Microchip Technology Inc. NOTES:
2020-2021 Microchip Technology Inc. DS20006357D-page 15 PLA133-47 APPENDIX A: REVISION HISTORY Revision A (June 2020)
- Initial release of PLA133-47 as Microchip data sheet DS20006357A. Revision B (October 2020)
- Changed the operating frequency to 160 MHz which was wrongly input as 150 MHz. Revision C (December 2020)
- Changed the description for Pins 1, 2, and 7 in the Pin Descriptions table. Revision D (February 2021)
- Updated all instances of SOP package to reflect the new SOIC package.
DS20006357D-page 16 2020-2021 Microchip Technology Inc. NOTES:
2020-2021 Microchip Technology Inc. DS20006357D-page 17 PLA133-47 PRODUCT IDENTIFICATION SYSTEM To order or obtain information, e.g., on pricing or delivery, contact your local Microchip representative or sales office. Examples: Device: PLA133-47: Low-Power DC to 160 MHz 1:4 Fanout Buffer IC for Automotive Package: S = 8-Lead SOIC Package Temperature Range: A = –40°C to +125°C Media Type: (blank) = 100/Tube R = 3,300/Reel Automotive Suffix: VXX = Automotive Suffix in which “XX” is assigned by Microchip. Standard value “AO” is for standard auto- motive part. Note 1: Tape and Reel identifier only appears in the catalog part number description. This identifier is used for ordering purposes and is not printed on the device package. Check with your Microchip Sales Office for package availability with the Tape and Reel option. a) PLA133-47SAVAO Low-Power DC to 160 MHz 1:4 Fanout Buffer IC, SOIC Package, –40°C to +125°C, 100/ Tube, Standard automotive b) PLA133-47SA-RVAO Low-Power DC to 160 MHz 1:4 Fanout Buffer IC, SOIC Package, –40°C to +125°C, 3,300/Reel, Standard automotive PART NO. X X X XXX Device Package Temperature Range Media Type Automotive Suffix
DS20006357D-page 18 2020-2021 Microchip Technology Inc. NOTES:
2020-2021 Microchip Technology Inc. DS20006357D-page 19 Information contained in this publication is provided for the sole purpose of designing with and using Microchip products. Infor- mation regarding device applications and the like is provided only for your convenience and may be superseded by updates. It is your responsibility to ens ure that your application meets with your specifications. THIS INFORMATION IS PROVIDED BY MICROCHIP "AS IS". MICROCHIP MAKES NO REPRESENTATIONS OR WAR- RANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED, WRITTEN OR ORAL, STATUTORY OR OTHERWISE, RELATED TO THE INFORMATION INCLUDING BUT NOT LIMITED TO ANY IMPLIED WARRANTIES OF NON- INFRINGEMENT, MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE OR WARRANTIES RELATED TO ITS CONDITION, QUALITY, OR PERFORMANCE. IN NO EVENT WILL MICROCHIP BE LIABLE FOR ANY INDI- RECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUEN- TIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE INFORMATION OR ITS USE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY RELATED TO THE INFORMATION OR ITS USE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY, THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THE INFORMATION. Use of Microchip devices in life sup- port and/or safety applications is entirely at the buyer's risk, and the buyer agrees to defend, indemnify and hold harmless Microchip from any and all damages, claims, suits, or expenses resulting from such use. No licenses are conveyed, implicitly or otherwise, under any Microchip intellectu al property rights unless otherwise stated. Trademarks The Microchip name and logo, the Microchip logo, Adaptec, AnyRate, AVR, AVR logo, AVR Freaks, BesTime, BitCloud, chipKIT, chipKIT logo, CryptoMemory, CryptoRF, dsPIC, FlashFlex, flexPWR, HELDO, IGLOO, JukeBlox, KeeLoq, Kleer, LANCheck, LinkMD, maXStylus, maXTouch, MediaLB, megaAVR, Microsemi, Microsemi logo, MOST, MOST logo, MPLAB, OptoLyzer, PackeTime, PIC, picoPower, PICSTART, PIC32 logo, PolarFire, Prochip Designer, QTouch, SAM-BA, SenGenuity, SpyNIC, SST, SST Logo, SuperFlash, Symmetricom, SyncServer, Tachyon, TimeSource, tinyAVR, UNI/O, Vectron, and XMEGA are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. AgileSwitch, APT, ClockWorks, The Embedded Control Solutions Company, EtherSynch, FlashTec, Hyper Speed Control, HyperLight Load, IntelliMOS, Libero, motorBench, mTouch, Powermite 3, Precision Edge, ProASIC, ProASIC Plus, ProASIC Plus logo, Quiet- Wire, SmartFusion, SyncWorld, Temux, TimeCesium, TimeHub, TimePictra, TimeProvider, WinPath, and ZL are registered trademarks of Microchip Technology Incorporated in the U.S.A. Adjacent Key Suppression, AKS, Analog-for-the-Digital Age, Any Capacitor, AnyIn, AnyOut, Augmented Switching, BlueSky, BodyCom, CodeGuard, CryptoAuthentication, CryptoAutomotive, CryptoCompanion, CryptoController, dsPICDEM, dsPICDEM.net, Dynamic Average Matching, DAM, ECAN, Espresso T1S, EtherGREEN, IdealBridge, In-Circuit Serial Programming, ICSP, INICnet, Intelligent Paralleling, Inter-Chip Connectivity, JitterBlocker, maxCrypto, maxView, memBrain, Mindi, MiWi, MPASM, MPF, MPLAB Certified logo, MPLIB, MPLINK, MultiTRAK, NetDetach, Omniscient Code Generation, PICDEM, PICDEM.net, PICkit, PICtail, PowerSmart, PureSilicon, QMatrix, REAL ICE, Ripple Blocker, RTAX, RTG4, SAM-ICE, Serial Quad I/O, simpleMAP , SimpliPHY , SmartBuffer, SMART-I.S., storClad, SQI, SuperSwitcher, SuperSwitcher II, Switchtec, SynchroPHY, Total Endurance, TSHARC, USBCheck, VariSense, VectorBlox, VeriPHY, ViewSpan, WiperLock, XpressConnect, and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. The Adaptec logo, Frequency on Demand, Silicon Storage Technology, and Symmcom are registered trademarks of Microchip Technology Inc. in other countries. GestIC is a registered trademark of Microchip Technology Germany II GmbH & Co. KG, a subsidiary of Microchip Technology Inc., in other countries. All other trademarks mentioned herein are property of their respective companies. © 2020-2021, Microchip Technology Incorporated, All Rights Reserved. ISBN: 978-1-5224-7716-7 Note the following details of the code protection feature on Microchip devices:
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