PL87X288B NSC | Alldatasheet

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g O34 | National x rt § Semiconductor a (32 x 8) 256-Bit TTL Logic PROMs General Description Features These Schottky programmable logic devices are organized ™ Advanced titanium-tungsten (Ti-W) fuses in the popular 32 words by 8-bit configuration. An enable ™ Schottky-clamped for high speed input is provided to control the output states. When the de- Address access—15 ns max vice is enabled, the outputs represent the contents of the Enable access—12 ns max selected word. When disabled, the 8 outputs go to the OFF Enable recovery—12 ns max or high impedance state. The memories are available in the m= PNP inputs for reduced input loading TRI-STATE® version only. = All DC and AC parameters guaranteed over PROMs are shipped from the factory with lows in all loca- temperature tions. A high may be programmed into any selected location ™ Low voltage TRI-SAFET™ programming by following the programming instructions. ™ >2000V input protection for electrostatic discharge m2 TRISTATE outputs a Block Diagram Mm 2 AS) TERM 256 BIT OR ARRAY A2 FIXED PROVIDING A AND ALL 32 PRODUCT TERMS ARRAY AO - We ea eat eae atc cat 6. BUFFER BUF a | | BUF BUF BUF BUF Q7 6 Os a4 Qs 02 ai Q0 Tu0/6747~1 Pin Names AO-AG 0-47 Power Supply 3-6

Connection Diagrams & fs Dual-In-Line Package Plastic Leaded Chip Carrier (PLCC) & a, 3 8 wt 16}-Veg 58250 a2 15-6 3.2 1 2019 Qs 14a Q2—44 18 A4 ae 13b-A3s ass 7has bs 12 A2 NC—“16 16 FNC AS—-16 PR al 47 15 AZ o—-47 10 FA0 5-48 14 Al cna oo7 9 10 11:12:13 Tuorer7-2 eg25e Top View TUD/6747-9 Order Number PL87X288BJ or PL87X288BN Top View ‘See NS Package Number J16A or N16A Order Number PL87X288BV ‘See NS Package Number V20A

Ordering Information

Commercial Temperature Range OC to +70°C Parameter/Order Number PLB7X286BN [ots PL87x28684 [ts PLB7x2688V [ots ; 3-7

Fa Absolute Maximum Ratings Operating Conditions >< | It Military/Aerospace specified devices are required, Min Max — Units. bas] please contact the National Semiconductor Sales Supply Voltage (Voc) a Office/Distributors for availability and specifications. PL87X288B 4.75 5.25 Vv Supply Voltage (Note 2) -0.5to +7.0V Ambient Temperature (Ta) Input Voltage (Note 2) —1.2to +5.5V PL87X268B 0 +70 °C Output Voltage (Note 2) -0.5to +5.5V Logical “0” Input Voltage 0 08 v Storage Temperature 65 to + 150°C Logical “1” Input Voltage 2.0 55 v Lead Temperature (Soldering, 10 seconds) 300°C ESD Rating >2000V Symes | renmee | mmtome “ [min [tye | max | in Input Load Curent | Voo=MaxVw=oav [| | a0 | -250 | pa im InputLeakage Current — | Voo=MaxVin=27v | | | ana [ Voo=Maxvw=sev | | | 0 | ma Vou LowLevelOutputVotlage | Voc=Minlo.=2ema | | 095 | oso |v Vi | Lowtevelinputvorage | (Nowe) | | To TV vin High Levelinputvotage | oe) | 20 | TV Vo Input Clamp Voltage Veo = Min, iy = —18 mA [| -o8 | -15 | v (ey Input Capacitance Voc = 5.0V, Vin = 2.0V 7 Ta = 25°C, 1 MHz i Co Output Capacitance Voc = 5.0V, Vo = 2.0V F Ta = 25°C, 1 MHz, Outputs Off p loc Power Supply Current Voc = Max, Input Grounded mA All Outputs Open los Short Circuit Vo = OV, Voc = Max mA Output Current (Note 4) loz Output Leakage Voc = Max, Vo = 0.4V to 2.4V 100 aA (TRI-STATE) Chip Disabled =100 Vou OuiputVotageHigh | ton= -a2ma_ | 2a | sz | |v Note 1: Absolute maximum ratings are those values beyond which the device may be permanently damaged. They do not mean that the device may be operated at these values. ‘Note 2: These limits do not apply during programming. For the programming ratings, refer to the programming instructions. Note 3: These limits apply over the entire operating range unless stated otherwise. All typical values are for Voc = 5.0V and Ta = 25°C. Note 4: During iog measurement, only one output at a time should be grounded. Permanent damage may otherwise result. Note 5: C, = 50 pF. Note 6: C, = 5 pF. Note 7: These are absolute voltages with respect to the ground pin on the device and includes all overshoots due to system and/or tester noise. Do not attempt to test these values without suitable equipment. 3-8

u Cc Ped PL87X2 1S Symbol | ram | 7 ‘me ES [win [tye | Max _| 3 tas Address Access Time (Note 5) tavev | | to | as [ons tea Enable Access Time (Note 5) tev | | 6 | w | 1s tea Enable Recovery Time (Note 6) texx | | 6 | 12 | 1s tx Output Enable Time (Note 5) tevox | | 6 | i | as tyz Output Disable Time (Note 6) texaz | | 8 | i | os Functional Description TESTABILITY (J-package). Device performance in all package configura- The Schottky PROM die includes extra rows and columns of _ tions is excellent. fusable inks for testing the programmabiliy of each stip TITANIUM-TUNGSTEN FUSES ese test fuses are placed at the worst-case chip locations on . to provide the highest possible confidence in the program. National's Programmable Read-Only Memories (PROMs) q , p feature titanium-tungsten (Ti-W) fuse links designed to pro- ming tests in the final product. A ROM pattern is also per- ‘am efficiently with only 10.5V applied, The high perfor manently fixed in the additional circuitry and coded to pro- one on ral wi th y PROM a th ‘sun in br m vide a parity check of input address levels. These and other 2709 and elabilly ofthese et Which the tiene test circuits are used to test for correct operation of the row tun y metal y polar voor ° It i thous fan and column-select circuits and functionality of input and en Omg>-BY ME RUZGLGN It BP Integral part, and the use of an able gates. All test circuits are available at both wafer and OM-ChIP Programming circuit. assembled device levels to allow 100% functional and para-_ A major advantage of the titanium-tungsten fuse technology metric testing at every stage of the test flow. is the low programming voltage of the fuse links. At 10.5V, this virtually eliminates the need for guard-ring devices and RELIABILITY wide spacings required for other fuse technologies. Care is ‘As with all National products, the Ti-W PROMs are subject- taken, howaver, to minimize voltage drops across the die ed to an on-going reliability evaluation by the Reliability As- and to reduce parasitics. The device is designed to ensure ‘surance Department. These evaluations employ accelerat- _ that worst-case fuse operating current is low enough for ed life tests, including dynamic high-temperature operating _reliable long-term operation. The Darlington programming life, temperature-humidity life, temperature cycling, and ther- _circuit is liberally designed to insure adequate power density mal shock. To date, nearly 7.4 million Schottky Ti:-W PROM for blowing the fuse links. The complete circuit design is device hours have been logged, with samples in Epoxy B _ optimized to provide high performance over the entire oper- molded DIP (N-package), PLCC (V-package) and CERDIP ating ranges of Vcc and temperature. 3-9