PL610-01WC

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Technical content

Features

• Single Die, Wide Frequency Coverage, Programmable Advanced Oscillator Design
• Single IC to Cover up to 130 MHz Output Frequency.
• Direct Oscillation Operation with Optional Programmable Features: - ±50 ppm Frequency Tuning - Output Drive Setting (4 mA, 8 mA, or 16 mA) - 6-Bit Odd/Even Output Divider ( ≤ ÷63)
• Fundamental Crystal Input Frequency: - 10 MHz to 60 MHz (Default) - 60 MHz to 130 MHz (Programming Option)
• Output Frequency: LVCMOS - 8 0k H z t o 1 3 0M H z
• Wire Bond and Flip Chip Options to Choose from
• Very Low Jitter and Phase Noise
• Low Current Consumption
• Single 1.8V, 2.5V, or 3.3V ±10% Power Supply
• Operating Temperature Range from –40°C to +85°C General Description The PL610 is a high performance general purpose clock that uses a single die to cover outputs up to

130 MHz, eliminating the need for multiple ICs to cover

a wide frequency range. Designed to fit in a small 2.0 mm x 1.6 mm, or larger substrates, the PL610 offers the best phase noise and jitter performance, smallest die size, and lowest power consumption of any comparable IC. The optional ‘frequency fine tuning’ feature of PL610 allows for frequency adjustment after encapsulation of the module, up to ±50 ppm. In addition, there is a ‘6’ bit optional programmable Odd/Even divider (default = ÷1), and three programmable output drive strengths (4 mA, 8 mA (default), 16 mA) to choose from. The full feature set of PL610 makes it the most versatile XO for any application. Block Diagram PL610-01/-02/-03 FIN XOUT CLK0 OE, PDB, CLK1Programmable CLOAD Programmable Function /1,2 XTAL OSC P-Counter (6-bit) (PDB) FREF 1.8V to 3.3V Single IC XO with Frequency Tuning (10 MHz to 130 MHz)

DS20005616A-page 2  2016 Microchip Technology Inc.

1.0 ELECTRICAL CHARACTERISTICS

Absolute Maximum Ratings † † Notice: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operational sections of this s pecification is not intended. Exposure to maximum rating conditions for extended periods may affect device reliability. Parts are tested to commercial grade only.

 2016 Microchip Technology Inc. DS20005616A-page 3 PL610-01/-02/-03 TABLE 1-1: AC ELECTRICAL CHARACTERISTICS Parameters Sym. Min. Ty p. Max. Units Conditions Crystal Input Frequency (XIN) — 10 — 60 MHz Fundamental Crystal, Low Frequency 60 — 130 Fundamental Crystal, High Frequency Output Frequency — .080 — 130 MHz @ V DD = 1.8V to 3.3V, ±10% VDD Sensitivity — –2 — +2 ppm Frequency vs. V DD±10% Output Rise Time (see Figure 3-1)— —11 . 2 n s 15 pF Load, 10/90% VDD, High Drive, 3.3V Output Fall Time (see Figure 3-1)—— 1 1 . 2 n s 15 pF Load, 10/90% VDD, High Drive, 3.3V Duty Cycle (Note 1, see Figure 3-1) — 45 50 55 % — Note 1: For 1.8V operation, the 50% ±5% duty cycle is guaranteed for frequencies ≤40 MHz. TABLE 1-2: DC ELECTRICAL CHARACTERISTICS Parameters Sym. Min. Typ. Max. Units Conditions Supply Current, Dynamic, with Loaded LVCMOS Output IDD —3 . 7— mA VDD = 3.3V, 40 MHz, Load = 15 pF —2 . 7 5— VDD = 2.5V, 40 MHz, Load = 15 pF —2 . 0— VDD = 1.8V, 40 MHz, Load = 15 pF —2 . 5— VDD = 3.3V, 26 MHz, Load = 15 pF —1 . 8— VDD = 2.5V, 26 MHz, Load = 15 pF —1 . 3— VDD = 1.8V, 26 MHz, Load = 15 pF Supply Current, Dynamic, with Unloaded LVCMOS Output — —1 . 6 5— mA VDD = 3.3V, 40 MHz, No Load —1 . 2— VDD = 2.5V, 40 MHz, No Load —0 . 9— VDD = 1.8V, 40 MHz, No Load —1 . 2— VDD = 3.3V, 26 MHz, No Load —0 . 8— VDD = 2.5V, 26 MHz, No Load —0 . 5 8— VDD = 1.8V, 26 MHz, No Load Operating Voltage V DD 1.62 — 3.63 V — Power Supply Ramp t PU 0.001 — 100 ms Time for VDD to reach 90% VDD. Power ramp must be monotonic. Output Low Voltage V OL —— 0 . 1V I OL = +4 mA Standard Drive Output High Voltage V OH VDD – 0.4 —— V I OH = –4 mA Standard Drive

DS20005616A-page 4  2016 Microchip Technology Inc. Output Current, Low Drive (See Figure 3-2) IOLD ±4 — — mA V OL = 0.4V, VOH = 2.4V Output Current, Standard Drive (See Figure 3-2) IOSD ±8 — — mA V OL = 0.4V, VOH = 2.4V Output Current, High Drive (See Figure 3-2) IOHD ±16 — — mA V OL = 0.4V, VOH = 2.4V TABLE 1-2: DC ELECTRICAL CHARACTERISTICS (CONTINUED) Parameters Sym. Min. Typ. Max. Units Conditions TABLE 1-3: CRYSTAL SPECIFICATIONS (10 MHZ TO 60 MHZ) Parameters Sym. Min. Typ. Max. Units Conditions Fundamental Crystal Resonator Frequency FXIN 10 — 60 MHz — Crystal Loading Rating (The IC can be programmed for any value in this range.) CL(XTAL) 8 — 12 pF — Maximum Sustainable Drive Level — — —1 0 0 µ W — Operating Drive Level — — 25 — µW — Crystal Shunt Capacitance C0 — — 3 pF — Effective Series Resistance, Fundamental, (See Figure 3-4) ESR — — 50 Ω — TABLE 1-4: CRYSTAL SPECIFICATIONS (60 MHZ TO 130 MHZ) Parameters Sym. Min. Typ. Max. Units Conditions Fundamental Crystal Resonator Frequency FXIN 60 — 130 MHz — Crystal Loading Rating (The IC can be programmed for any value in this range.) C L(XTAL) 5—8p F — Maximum Sustainable Drive Level — — —1 0 0 µ W — Operating Drive Level — — 25 — µW — Crystal Shunt Capacitance C0 — — 2.5 pF — Effective Series Resistance, Fundamental, (See Figure 3-4) ESR — — 30 Ω — TABLE 1-5: PHASE NOISE SPECIFICATIONS (SEE MTC-3) Parameters Freq. @1 Hz @10 Hz @100 Hz @1 kHz @10 kHz @100 kHz @1 MHz Units Phase noise relative to carrier (typ.)

40 MHz –67 –98 –127 –142 –151 –155 –155

dBc/Hz26 MHz –65 –96 –124 –145 –150 –155 –155

 2016 Microchip Technology Inc. DS20005616A-page 5 PL610-01/-02/-03 TABLE 1-6: KEY PROGRAMMING PARAMETERS (OPTIONAL) CLK[0:1] Output Frequency Crystal Load Output Drive Strength Output Dividers CLK0 = FREF, FREF/2 or FREF/P Where P = 6-bit Optional: CLK1 = F REF, FREF/2 or CLK0 Optional ‘Frequency Tuning’ after encapsulation, up to: ±50 ppm Tuning Range Single-bit C L adjustment for high/low frequency input Three optional drive strengths to choose from:

• L o w : 4 m A
• S t d : 8 m A ( d e f a u l t )
• High: 16 mA Optional 6-bit odd/even output divider:
• ÷1 (default) to ÷63

DS20005616A-page 6  2016 Microchip Technology Inc. TEMPERATURE SPECIFICATIONS (Note 1) Parameters Sym. Min. Typ. Max. Units Conditions Temperature Ranges Storage Temperature Range T S –65 — +150 °C — Ambient Operating Temperature T A –40 — +85 °C — Note 1: Exposure of the device under conditions beyond the limits specified by the maximum ratings for extended periods may cause permanent damage to the device and affect product reliability. These conditions represent a stress rating only, and functional operations of the device at these or any other conditions above the operational limits noted in this specification is not implied. Operating temperature is guaranteed by design. Parts are tested to commercial grade only.

 2016 Microchip Technology Inc. DS20005616A-page 7 PL610-01/-02/-03

2.0 PAD DESCRIPTIONS

The descriptions of the pads are listed in Table 2-2. Pad Configurations TABLE 2-1: DIE SPECIFICATION Chip Size Chip Thickness Pad Size Chip Base 0.65 mm x 0.60 mm Optional 90 µm GND Level TABLE 2-2: PAD FUNCTION TABLE Pad Number Pad Center Pad Name PL610-01 Pad Name PL610-02 Pad Name PL610-03XY 1 –177 231 XIN XOUT XIN 2 –215 41 OE, PDB, CLK1 VDD GND 3 –215 –186 GND CLK0 CLK0 4 215 –186 CLK0 GND VDD 5 215 41 VDD OE, PDB, CLK1 OE, PDB, CLK1 6 177 213 XOUT XIN XOUT PL610-01 PL610-02 (650μmx600μm) 0.60 Note: ^ denotes internal pull up

1 XOUT

OE^, PDB^, CLK1 GND PL610-01 (Wire Bond) 0.65 X Y (650μmx600μm) 0.60 Note: ^ denotes internal pull up 1XOUT VDD CLK0 XIN OE^, PDB^, CLK1 GND PL610-02 (Flip Chip) 0.65 X Y PL610-03 (650μmx600μm) Note: ^ denotes internal pull up 1XIN GND CLK0 XOUT OE^, PDB^, CLK1 VDD PL610-03 0.65 X Y 0.60

DS20005616A-page 8  2016 Microchip Technology Inc. TABLE 2-3: PAD FUNCTION DESCRIPTIONS Pad Name Description CLK0 Programmable clock output GND GND connection OE^, PDB^, CLK1 Programmable as: Output Enable (OE) – Enables/Disables CLK0 output buffer Power Down (PDB) – Enables/Disables CLK0 output buffer and crystal oscillator circuitry CLK1 – Second clock output V DD VDD connection XIN Crystal input pad XOUT Crystal output pad

 2016 Microchip Technology Inc. DS20005616A-page 9 PL610-01/-02/-03

3.0 MEASUREMENT TEST

CIRCUITS (MTC) FIGURE 3-1: MTC-1: Rise Time, Fall Time, Duty Cycle, VOL, VOH, IDD, Power Down Current, Output Enable/Disable. FIGURE 3-2: MTC-2: Output Drive Current and Output Impedance. FIGURE 3-3: MTC-3: Jitter and Phase Noise. FIGURE 3-4: MTC-4: Negative Resistance. XIN VDD XOUT GND CLK OE^ FET Probe CL A 0.1μF XOUT XIN OE^ Probe FETCLK VDD GND 0.1μF 0.1μF V R XOUT OE^ GND 0.1μFXIN CLK VDD 0.1μF XIN OE^ XOUT CLK GND VDD 0.1μFNetwork Analyzer

DS20005616A-page 10  2016 Microchip Technology Inc.

4.0 WAVEFORM SWITCHING

FIGURE 4-1: Rise and Fall Times. FIGURE 4-2: VOH, VOL. FIGURE 4-3: Duty Cycle. tr tf 90%VDD 10% VDD GND VOH VOL VDD Tw T Duty Cycle = 100% × Tw T 50% VDD

 2016 Microchip Technology Inc. DS20005616A-page 11 PL610-01/-02/-03 APPENDIX A: REVISION HISTORY Revision A (August 2016)

• Converted Micrel document PL610-01/-02/-03 to Microchip data sheet DS20005616A.
• Minor text changes throughout.

DS20005616A-page 12  2016 Microchip Technology Inc. NOTES:

 2016 Microchip Technology Inc. DS20005616A-page 13 PL610-01/-02/-03 PRODUCT IDENTIFICATION SYSTEM To order or obtain information, e.g., on pricing or delivery, contact your local Microchip representative or sales office. Examples: a) PL610-01D6C: 1.8V to 3.3V Single IC XO with Frequency Tuning, Die, 6 mm Thickness, Commercial Temp. Range, Tray b) PL610-02E8C: 1.8V to 3.3V Single IC XO with Frequency Tuning, Die (non-conductive back), 8 mm Thickness, Commercial Temp. Range, Tray c) PL610-03VAC: 1.8V to 3.3V Single IC XO with Frequency Tuning, Wafer (non-conductive back), 10 mm Thickness, Commercial Temp. Range, Tray d) PL610-01WC: 1.8V to 3.3V Single IC XO with Frequency Tuning, Wafer, 12 mm Thickness, Commercial Temp. Range, Tray e) PL610-02W8C: 1.8V to 3.3V Single IC XO with Frequency Tuning, Wafer, 8 mm Thickness, Commercial Temp. Range, Tray f) PL610-03DAC: 1.8V to 3.3V Single IC XO with Frequency Tuning, Die, 10 mm Thickness, Commercial Temp. Range, Tray g) PL610-02E6C: 1.8V to 3.3V Single IC XO with Frequency Tuning, Die (non-conductive back), 6 mm Thickness, Commercial Temp. Range, Tray h) PL610-01VC: 1.8V to 3.3V Single IC XO with Frequency Tuning, Wafer (non-conductive back), 12 mm Thickness, Commercial Temp. Range, Tray PART NO. X PackageDevice Device: PL610-01: 1.8V to 3.3V Single IC XO with Frequency Tuning (10 MHz to 130 MHz) PL610-02: 1.8V to 3.3V Single IC XO with Frequency Tuning (10 MHz to 130 MHz) PL610-03: 1.8V to 3.3V Single IC XO with Frequency Tuning (10 MHz to 130 MHz) Package: D = Die E = Die (with non-conductive backcoating) V = Wafer (with non-conductive backcoating) W= W a f e r Thickness: 6 = 6 mm (Die Only) 8=8 m m A= 1 0 m m none = 12 mm Temperature: C = 0°C to +70°C (Commercial) Media Type: none = Tray X Thickness X Media Type X Temperature

DS20005616A-page 14  2016 Microchip Technology Inc. NOTES:

 2016 Microchip Technology Inc. DS20005616A-page 15 Information contained in this publication regarding device applications and the like is provided only for your convenience and may be superseded by updates. It is your responsibility to ensure that your application me ets with your specifications. MICROCHIP MAKES NO REPRESENTATIONS OR WARRANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED, WRITTEN OR ORAL, STATUTORY OR OTHERWISE, RELATED TO THE INFORMATION, INCLUDING BUT NOT LIMITED TO ITS CONDITION, QUALITY , PERFORMANCE, MERCHANTABILITY OR FITNESS FOR PURPOSE . Microchip disclaims all liability arising from this information and its use. Use of Microchip devices in life support and/or safety applications is entirely at the buyer’s risk, and the buyer agrees to defend, indemnify and hold harmless Microchip from any and all damages, claims, suits, or expenses resulting fr om such use. No licenses are conveyed, implicitly or ot herwise, under any Microchip intellectual property rights unless otherwise stated. Trademarks The Microchip name and logo, the Microchip logo, AnyRate, dsPIC, FlashFlex, flexPWR, Heldo, JukeBlox, KeeLoq, KeeLoq logo, Kleer, LANCheck, LINK MD, MediaLB, MOST, MOST logo, MPLAB, OptoLyzer, PIC, PICSTART, PIC32 logo, RightTouch, SpyNIC, SST, SST Logo, SuperFlash and UNI/O are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. ClockWorks, The Embedded Control Solutions Company, ETHERSYNCH, Hyper Speed Control, HyperLight Load, IntelliMOS, mTouch, Precision Edge, and QUIET-WIRE are registered trademarks of Microchip Technology Incorporated in the U.S.A. Analog-for-the-Digital Age, Any Capacitor, AnyIn, AnyOut, BodyCom, chipKIT, chipKIT logo, CodeGuard, dsPICDEM, dsPICDEM.net, Dynamic Average Matching, DAM, ECAN, EtherGREEN, In-Circuit Serial Programming, ICSP, Inter-Chip Connectivity, JitterBlocker, KleerNet, KleerNet logo, MiWi, motorBench, MPASM, MPF, MPLAB Certified logo, MPLIB, MPLINK, MultiTRAK, NetDetach, Omniscient Code Generation, PICDEM, PICDEM.net, PICkit, PICtail, PureSilicon, RightTouch logo, REAL ICE, Ripple Blocker, Serial Quad I/O, SQI, SuperSwitcher, SuperSwitcher II, Total Endurance, TSHARC, USBCheck, VariSense, ViewSpan, WiperLock, Wireless DNA, and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. Silicon Storage Technology is a registered trademark of Microchip Technology Inc. in other countries. GestIC is a registered trademarks of Microchip Technology Germany II GmbH & Co. KG, a subsidiary of Microchip Technology Inc., in other countries. All other trademarks mentioned herein are property of their respective companies. © 2016, Microchip Technology Incorporated, Printed in the U.S.A., All Rights Reserved. ISBN: 978-1-5224-0877-2 Note the following details of the code protection feature on Microchip devices:

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• Microchip is willing to work with the customer who is concerned about the integrity of their code.
• Neither Microchip nor any other semiconduc tor manufacturer can guarantee the security of their code. Code protection does not mean that we are guaranteeing the product as “unbreakable.” Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act. Microchip received ISO/TS-16949:2009 certification for its worldwide headquarters, design and wafer fabrication facilities in Chandler and Tempe, Arizona; Gresham, Oregon and design centers in California and India. The Company’s quality system processes and procedures are for its PIC ® MCUs and dsPIC® DSCs, KEELOQ® code hopping devices, Serial EEPROMs, microperipherals, nonvolatile memory and analog products. In addition, Microchip’s quality system for the design and manufacture of development systems is ISO 9001:2000 certified. QUALITY MANAGEMENT SYSTEM CERTIFIED BY DNV == ISO/TS 16949 ==

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