PL133-97 MICREL | Alldatasheet

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Technical content

Low -Power DC to 150MHz 1: 9 Fanout Buffer IC Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1(408) 944 -0800 • fax +1(408) 474 -1000 • www.micrel.com Rev 05/22 /1 4 Page 1

FEATURES

 1:9 LVCMOS output fanout buffer for DC to 150 MHz  8mA Output Drive Strength  Low power consumption for portable applications  Low input -output delay  Output -Output skew less than 250ps  Low Additive Phase J itter of 6 0fs RMS  2.5V to 3.3V, ±10% operation  1.8V ± 10% operation up to 67MHz  Operating temperature range from -40°C to 85°C  Available in 16 -Pin QFN GREEN/RoHS package

DESCRIPTION

The PL133 -97 is an advanced fanout buffer design for high performance, low -power, small form factor applic a- tions . The P L133-97 accepts a reference clock input from DC to 150MHz and provides 6 outputs of the same fr e- quency. The PL133 -97 is offered in a QFN-16L 3x3mm package and it offers the best phase noise, additive jitter perfor- mance, and lowest power consumption of any comparable IC. The PL133 -97 outputs can be disabled to a high impe d- ance (tri -state) by pulling low the OE pin. When the OE pin is high, the outputs are enabled and follow the REF input signal. When the OE pin is left open, a pull -up resistor on the chip wi ll default the OE pin to logic 1 so the outputs are enabled. CLK8 is a free running output that remains enabled when the OE pin is pulled low. BLOCK DIAGRAM AND PAC KAGE PINOUT REF CLK1 CLK2 CLK3 CLK4 CLK5 CLK6 QFN-16LOE CLK8 CLK7 CLK9 CLK4 OE CLK3 GNDCLK8 CLK7 REF CLK1 VDD GND CLK2 CLK6 VDD GND CLK5 1 2 3 4 12 11 10 9 16CLK9

Low -Power DC to 150MHz 1: 9 Fanout Buffer IC Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1(408) 944 -0800 • fax +1(408) 474 -1000 • www.micrel.com Rev 05/22 /1 4 Page 2 PIN DESCRIPTIONS Name QFN -16L Type Description REF 15 I Input reference frequency. CLK 1 1 O Buffered clock output CLK 2 4 O Buffered clock output CLK 3 5 O Buffered clock output CLK 4 8 O Buffered clock output CLK 5 9 O Buffered clock output CLK 6 12 O Buffered clock output CLK 7 13 O Buffered clock output CLK 8 14 O Buffered clock output , free running, does not disable with OE. CLK 9 16 O Buffered clock output VDD 2, 1 1 P VDD connection GND 3, 7, 1 0 P GND connection OE 6 I Output Enable Control Input with 130K  Pull -Up ePad - - Center Pad for Thermal Relief. Connect to GND.

Low -Power DC to 150MHz 1: 9 Fanout Buffer IC Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1(408) 944 -0800 • fax +1(408) 474 -1000 • www.micrel.com Rev 05/22 /1 4 Page 3 LAYOUT RECOMMENDATIONS The following guidelines are to assist you with a performance optimized PCB d esign: Signal I ntegrity and Termination Consider ations - Keep traces short! - Trace = Inductor. Wit h a capacitive load this equals ringing! - Long trace = Transmission Line. Without proper term i- nation this will cause reflections ( looks like rin ging ). - Design long traces (> 1 inch) as “striplines” or “m i- crostrips” with defined i mpedance. - Match trace at one side to avoid reflections bounc ing back and forth. Decoupling and Power Supply Considerations - Place decoupling capacitors as close as possible to the VDD p in(s) to limit noise from the power supply - Addition of a ferrite bead in series with VDD can help prevent noise from other board sources - Value of decoupling capacitor is frequency d e- pendant. Typical values to use are 0.1 F for d e- signs using frequencie s < 50MHz and 0.01 F for designs using frequencies > 50MHz. Typical CMOS termination Place Series Resistor as close as possible to CMOS output CMOS Output Buffer ( Typical buffer impedance 20 ohm) To CMOS Input Connect a 33 ohm series resistor at each of the output clocks to enhance the stability of the output signal 50 ohm line

Low -Power DC to 150MHz 1: 9 Fanout Buffer IC Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1(408) 944 -0800 • fax +1(408) 474 -1000 • www.micrel.com Rev 05/22 /1 4 Page 4 ABSOLUTE MAXIMUM COND ITIONS Static Discharge Voltage (per MIL -STD -883, Method 3015)………… ..> 2000V OPERATING CONDITIONS Parameter Description Min. Max. Unit VDD Supply Voltage 1.62 3.6 3 V TA Commercial Operating Temperature (ambient te mperature) 0 70 C Industrial Operating Temperature (ambient te mperature) -40 85 C CL Load Capacitance, below 100 MHz , V DD > 2.25V ― 30 pF Load Capacitance between 100 MHz and 134 MHz , V DD > 2.25V ― 10 pF Load Capacitance, above 134 MHz , V DD > 2.25V ― 5 pF Load Capacitance, below 67MHz, 1.62V < V DD < 2.25V ― 15 pF CIN Input Capacitance ― 7 pF REF, CLK[1: 9] Operating Frequency, Input=Output DC 150 MHz tPU Power -up time for all V DD s to reach minimum specified vol tage (power ramps must be monotonic) 0.05 50 ms ELECTRICAL CHARACTERISTICS (Commercial and Industrial Temperature D evices) Parameter Description Test Conditions Min. Max. Unit VIL Input LOW Voltage [1] VDD > 2.25V – 0.8 V VIH Input HIGH Voltage [1] VDD > 2.25V 2.0 – V IIL Input LOW Current VIN = 0V – 50 µA IIH Input HIGH Current VIN = VDD – 100 µA VOL Output LOW Voltage [2] IOL = 8 mA – 0.4 V VOH Output HIGH Voltage [2] IOH = –8 mA 2.4 – V IDD Supply Current 66.67MHz with unloaded outputs – 32 mA RPU OE Pin Pull-Up Resistance 100 – K

Low -Power DC to 150MHz 1: 9 Fanout Buffer IC Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1(408) 944 -0800 • fax +1(408) 474 -1000 • www.micrel.com Rev 05/22 /1 4 Page 5 SWITCHING CHARACTERISTICS (Commercial and Industrial Temperature D evices) [3] Parameter Description Test Conditions Min. Typ. Max. Unit Duty Cycle [2] = t2 ÷ t1 Measured at 1.4V, VDD=3.3V, Input=50% 40 50 60 % Measured at VDD/2 , Input = 50% 40 50 60 % t3 Rise Time [2] 0.8V  2.0V , VDD=3.3V , 30pF Load – – 1.5 ns 10%  90% , VDD=2.5V , 15pF Load – – 2.5 ns 10%  90% , VDD=1.8V , 15pF Load – – 4.5 ns t4 Fall Time [2] 2.0V  0.8V , VDD=3.3V , 30pF Load – – 1.5 ns 90%  10% , VDD=2.5V , 15pF Load – – 2.5 ns 90%  10% , VDD=1.8V , 15pF Load – – 4.5 ns t5 Output to Output Skew [2] All outputs equally loaded – – 250 ps t6 Propagation Delay, REF Rising Edge to CLKX Rising Edge [2] Measured at VDD/2 1 5 9.2 ns Notes: 1. REF input has a threshold voltage of V DD /2 2. Parameter is guaranteed by design and characterization. Not 100% tested i n produ ction . 3. All parameters are specified with loaded outputs .

Low -Power DC to 150MHz 1: 9 Fanout Buffer IC Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1(408) 944 -0800 • fax +1(408) 474 -1000 • www.micrel.com Rev 05/22 /1 4 Page 6 NOISE CHARACTERISTICS (Commercial and Industrial Temperature D evices ) Parameter Description Test Conditions Min. Typ. Max. Unit Additive Phase Jitter V DD=3.3V, Frequency=100MHz Offset=12KHz ~ 20MHz 60 fs -160 -150 -140 -130 -120 -110 -100 -90 -80 -70 -60 10 100 1000 10000 100000 1000000 10000000 100000000 Phase Noise (dBc/Hz) Offset Frequency (Hz) PL133-97 Additive Phase Jitter: VDD=3.3V, CLK=100MHz, Integration Range 12KHz to 20MHz: 0.059ps typical. REF Input PL133-97 Output When a buffer is used to pass a signal then the buffer will add a little bit of its own noise. The phase noise on the output of the buffer will be a little bit more than the phase noise in the input signal. To quantify the noise addition in the buffer we compare the Phase Jitter numbers from the input and the output. The difference is called "Additive Phase Jitter". The formula for the Additive Phase Jitter is as follows: Additive Phase Jitter = (Output Phase Jitter) - (Input Phase Jitter)

Low -Power DC to 150MHz 1: 9 Fanout Buffer IC Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1(408) 944 -0800 • fax +1(408) 474 -1000 • www.micrel.com Rev 05/22 /1 4 Page 7 SWITCHING WAVEFORMS TEST CIRCUIT 1.4V 1.4V VDD/2 INPUT OUTPUT VDD/2 1.4V OUTPUT OUTPUT 1.4V Duty Cycle Ti ming All Outputs Rise/Fall Time Output -Output Skew Input -Output Prop agation Delay t3 t4 OUTPUT 0.8V 2.0V 3.3V V 0.8V 2.0V VDD VDD GND GND OUTPUTS CLOAD CLK 0.1 F 0.1 F

Low -Power DC to 150MHz 1: 9 Fanout Buffer IC Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1(408) 944 -0800 • fax +1(408) 474 -1000 • www.micrel.com Rev 05/22 /1 4 Page 8 PACKAGE DRAWING QFN-16L Symbol Dimension in MM Min. Max. A 0.7 0.8 A1 0.05 0.05 A3 0.20 b 0.18 0.30 D 3.00 BSC E 3.00 BSC D1 -- 1.70 E1 -- 1.70 L 0.30 0.50 e 0.50 BSC SEATING PLANE b Ae L D E Pin1 Dot

Low -Power DC to 150MHz 1: 9 Fanout Buffer IC Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1(408) 944 -0800 • fax +1(408) 474 -1000 • www.micrel.com Rev 05/22 /1 4 Page 9 MICREL, INC. 2180 FORTUNE DRIVE SAN JOSE, CA 95131 USA TEL +1 (408) 944 -0800 FAX +1 (408) 474 -1000 WEB http://www.micr el.com Micrel makes no representations or warranties with respect to the accuracy or completeness of the information furnished in this data sheet. This infor- mation is not intended as a warranty and Micrel does not assume responsibility for its use. Micrel reserves the right to change circuitry, specifications and descriptions at any time without notice. No license, whether express, implied, arising by estoppel or otherwise, to any intellectual property rights is granted by this document. Except as provided in Micrel’s terms and conditions of sale for such products, Micrel assumes no liability whatsoever, and Micrel disclaims any express or implied warranty relating to the sale and/or use of Micrel products including liability or warranties relating to fitness for a particular purpose, merchantability, or infringement of any patent, copyright or other intellectual property right. Micrel Products are not designed or authorized for use as components in life support appliances, devices or systems where malfunction of a product can reasonably be expected to result in personal injury. Life support devices or systems are devices or systems that (a) are intended for surgical implant into the body or (b) support or sustain life, and whose failure to perform can be reasonably expected to result in a significant injury to the user. A Pur- chaser’s use or sale of Micrel Products for use in life support appliances, devices or systems is a Purchaser’s own risk and Purchaser agrees to fully indemnify Micrel for any damages resulting from such use or sale. © 2012 Micrel, Incorporated.

ORDERING INFORMATION

For part ordering, please contact our Sales Department:

2180 Fortune Drive , San Jose, CA 95131 , USA

Tel: (408) 944 -0800 Fax: (408) 474 -1000 PART NUMBER The order number fo r this device is a combination of the follo wing: Part number, Package type and Operating temperature range PL133-97 X X - X Part Number Package Type Q=QFN R=Tape & Reel Temperature Range C=Commercial (0°C to 70°C) I=Industrial (-40°C to 85°C) Part/Order Nu mber Marking Package Option Green (Lead -Free) Package PL13 3-97QC-R P133 LLL 16-Pin QFN (Tape and Reel ) PL133 -97QI-R P133 97I LLL 16-Pin QFN (Tape and Reel) *Note: LLL designates lot number