PL133-37 MICREL | Alldatasheet
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Technical content
Low -Power , 1.62V to 3.63V, 1 MHz to 150MHz, 1:3 Fan out Buffer IC Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1(408) 944- 0800 • fax +1(408) 474- 1000 • www.micrel.com Rev 02/24/ 15 Page 1
FEATURES
- 3 LVCMOS Outputs
- 12m A Output Drive Strength
- Input/Output F requency: o Reference Clock: 1 MHz to 15 0MHz
- Supports LVCMOS or Sine Wave Input Clock
- Very Low Jitter and Phase Noise
- Low Current Consumption
- Single 1.8V, 2.5V, or 3.3V , ± 10% Power Supply
- Operating Temperature Range o 0°C to 70°C (Commercial) o -40° C to 85° C (Industrial)
- Available in SOT23- 6L GREEN/RoHS Compliant Packages
DESCRIPTION
The PL133- 37 is an advanced fanout buffer design for high perfor mance, low -power, small form -factor applications. The PL133- 37 a ccepts a refer ence clock input of 1MHz to 150 MHz and produces three out puts of the same frequency. Reference clock i n- puts may be LVCMOS or sine- wave signals (the i n- puts are internally AC -coupled). Offered in a small 3mm x 3mm SOT23, the PL133- 37 of fers the best phase noise and jitter performance and lowest power consumption of any compa rable IC. PACKAGE PIN CO NFIGURATION BLOCK DIAGRAM FIN CLK0 CLK1 CLK2 3 4 6CLK1 GND FIN CLK2 CLK0 VDD SOT23-6L
Low -Power , 1.62V to 3.63V, 1 MHz to 150MHz, 1:3 Fan out Buffer IC Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1(408) 944- 0800 • fax +1(408) 474- 1000 • www.micrel.com Rev 02/24/ 15 Page 2 PIN DESCRIPTION Name Package Pin # Type Description SOT23 -6L CLK1 1 O Output clock GND 2 P Ground connection FIN 3 I Reference clock input CLK0 4 O Output clock VDD 5 P Power supply CLK2 6 O Output clock LAYOUT RECOMMENDATIONS The following guidelines are to assist you with a performance optimized PCB design: Signal Integ rity and Termination Co nsiderations - Keep traces short! - Trace = Inductor. With a capacitive load this equals ringing! - Long trace = Transmission Line. Without proper ter mi- nation this will cause reflections (looks like ringing). - Design long traces as “striplines” or “microstrips” with defined impedance. - Match trace at one side to avoid reflections bouncing back and forth. Decoupling and Power Supply Consi derations - Place decoupling capacitors as close as possible to the V DD pin(s) to limit nois e from the power supply - Multiple V DD pins should be decoupled separately for best performance. - Addition of a ferrite bead in series with V DD can help prevent noise from other board sources - Value of decoupling capacitor is frequency de- pendant. Typica l value to use is 0.1µF. Typical CMOS termination Place Series Resistor as close as possible to CMOS output CMOS Output Buffer (Typical buffer impedance 20Ω) To CMOS Input Series Resistor Use value to match output buffer impedance to 50Ω trace. Typical value 30Ω 50Ω line
Low -Power , 1.62V to 3.63V, 1 MHz to 150MHz, 1:3 Fan out Buffer IC Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1(408) 944- 0800 • fax +1(408) 474- 1000 • www.micrel.com Rev 02/24/ 15 Page 3 ELECTRICAL SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS PARAMETERS SYMBOL MIN. MAX. UNITS Supply Voltage Range VDD -0.5 4.6 V Input Voltage Range VI -0.5 VDD +0.5 V Output Voltage Range VO -0.5 VDD +0.5 V Storage Temperature TS -65 150 °C Ambient Operating Temper ature* -40 85 °C Exposure of the device under conditions beyond the limits specified by Maximum Ratings for extended periods may cause permanent damage to the device and affect product reliability. These conditions repr esent a stress rating only, and functional operations of the device at these or any other conditions above the operational limits noted in this specif ication is not implied. *Operating temper ature is guaranteed by design. Parts are tested to commerci al grade only. AC SPECIFICATIONS PARAMETERS CONDITIONS MIN. TYP. MAX. UNITS Input (FIN) Fr equency 2.5V and 3.3V oper ation 1 150 MHz 1.8V operation 1 100 MHz Input (FIN) Signal Ampl itude Internally AC coupled , <150MHz, VDD=2.5V and 3.3V. 0.8 VDD VPP Internally AC coupled , <100MHz, all VDDs 0.5 VDD VPP Internally AC coupled , 3.3V <50MHz, 2.5V <40MHz, 1.8V <15MHz 0.1 VDD VPP Output Enable Time OE Function; Ta=25 º C, 15pF Load 10 ns Output Rise Time 15pF Load, 10/90%V DD , 3.3V 2 3 ns Outpu t Fall Time 15pF Load, 90/10%V DD , 3.3V 2 3 ns Duty Cycle Input Duty Cycle is 50% 45 50 55 % Output to Output Skew All outputs equally loaded 250 ps DC SPECIFICATIONS PARAMETERS SYMBOL CONDITIONS MIN TYP MAX UNITS Supply Current, Dynamic IDD VDD = 3.3V, 25MHz, No Load 1.2 mA VDD = 2.5V, 25MHz, No Load 0.9 mA VDD = 1.8V, 25MHz, No Load 0.6 mA Supply Current, Standby IDD_SB OE Pin Pulled Low , VDD = 3.3V 0.3 mA Operating Vol tage VDD 1.62 3.63 V Output Low Voltage VOL IOL = +12 mA, VDD = 3.3V 0.4 V Output High Voltage VOH IOH = -12mA, VDD = 3.3V 2.4 V Output Current IOSD VOL = 0.4V, V OH = 2.4V , VDD = 3.3V 12 mA
Low -Power , 1.62V to 3.63V, 1 MHz to 150MHz, 1:3 Fan out Buffer IC Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1(408) 944- 0800 • fax +1(408) 474- 1000 • www.micrel.com Rev 02/24/ 15 Page 4 NOISE CHARACTERISTICS PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNIT Additive Phase Jitter VDD=3.3V, Frequency=26MHz Offset=12kHz ~ 5MHz 70 fs VDD=3.3V, Frequency=100MHz Offset=12kHz ~ 20MHz 80 fs PL133-37 Additive Phase Jitter: VDD=3.3V, CLK=26MHz, Integration Range 12KHz to 5MHz: 0.072ps typical. -170 -160 -150 -140 -130 -120 -110 -100 -90 -80 -70 10 100 1000 10000 100000 1000000 10000000 Offset Frequency (Hz) Phase Noise (dBc/Hz) REF Input PL133-37 Output When a buffer is used to pass a signal then the buffer will add a li ttle bit of its own noise. The phase noise on the output of the buffer will be a little bi t more than the phase noise in the input signal. To quantify the noise addition in the buffer we compare the Phase Jitter numbers from the input and the output. The difference is called "Addi- tive Phase Jitter". The formula for the Additive Phase Jitter is as follows: Additive Phase Jitter = (Output Phase Jitter) - (Input Phase Jitter)
Low -Power , 1.62V to 3.63V, 1 MHz to 150MHz, 1:3 Fan out Buffer IC Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1(408) 944- 0800 • fax +1(408) 474- 1000 • www.micrel.com Rev 02/24/ 15 Page 5 PACKAGE DRAWINGS (GREEN PACKAGE COMPLIANT) SOT23 -6L ORDERING INFORMATION (GREEN PACKAGE COMPLIANT) Micrel Inc., reserves the right to make changes in its products or specifications, or both at any time without notice. The information furnished by Micrel is believed to be accurate and reliable. However, Mi crel makes no guarantee or warranty concerning the accuracy of said information and shall not be responsible for any loss or damage of whatever nature resulting from the use of, or reliance upon this product. LIFE SUPPORT POLICY: Micrel’s products are not authorized for use as critical components in life support devices or systems without the express written approval of the President of Micrel Inc. Symbol Dimension in MM Min. Max. A 1.05 1.35 A1 0.05 0.15 A2 1.00 1.20 b 0.30 0.50 c 0.08 0.20 D 2.80 3.00 E 1.50 1.70 H 2.60 3.00 L 0.35 0.55 e 0.95 BSC For part ordering, please contact our Sales Department:
2180 Fortune Drive, San Jose, CA 95131, USA
Tel: (408) 944- 0800 Fax: (408) 474- 1000 PART NUMBER The order number for this device is a combination of the following: Part number, Package type and Operating temperature range PL133 -37 X X - X Part Number Package Type T = SOT 23-6L Temperature Range C=Commercial (0°C to 70°C) None =Tubes R=Tape and Reel Part /Order Number Marking Package Option PL133- 37TC -R H37 LLL 6-Pin SOT 23 (Tape and Reel) PL133- 37TI- R *Note: LLL designates lot number C L E H D e b A Pin1 Dot