PIIPM50P12B004 IRF | Alldatasheet

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www.irf.com 1 Bulletin I27146 01/03 PIIPM50P12B004 Programmable Isolated IPM PI-IPM Features: /square6 Power Module:

  • NPT IGBTs 50A, 1200V
  • 10us Short Circuit capability /square4 Square RBSOA /square4 Low Vce(on) (2.15Vtyp @ 50A, 25°C) /square4 Positive Vce(on) temperature coefficient
  • Gen III HexFred Technology /square4 Low diode VF (1.78Vtyp @ 50A, 25°C) /square4 Soft reverse recovery
  • 2mΩ sensing resistors on all phase outputs and DCbus minus rail /square4 T/C < 50ppm/°C /square6 Embedded driving board
  • Programmable 40 Mips DSP
  • Current sensing feedback from all phases
  • Full protection from ground and line to line faults
  • UVLO, OVLO on DCbus voltage
  • Embedded flyback smps for floating stages (single 15Vdc @ 300mA input required)
  • Asynchronous isolated 2.5Mbps serial port for DSP communication and programming
  • IEEE standard 1149.1 (JTAG port interface) for program downloading and debugging
  • Separated turn on / turn off outputs for IGBTs di/dt control
  • Isolated serial port input with strobe signal for quadrature encoders or SPI communication

Description

The PIIPM50P12B004 is a fully integrated Intelligent Power Module for high performances Servo Motor Driver applications. The device core is a state of the art DSP, the TMS320LF2406A* at 40 Mips, interfaced with a full set of peripheral designed to handle all analog feedback and control signals needed to correctly manage the power section of the device. The PI-IPM has been designed and tailored to implement internally all functions needed to close the current loop of a high performances servo motor driver, a basic software is already installed in the DSP and the JTAG connector allows the user to easily develop and download its own proprietary algorithm. The device comes in the EMP TM package, fully compatible in length, width and height with the popular EconoPack 2 outline. Package: PI-IPM – Inverter (EconoPack 2 outline compatible) Power Module schematic: Three phase inverter with current sensing resistors on all output phases PI-IPM System Block Schematic: *Beta samples come with the TMS320LF2406 at 30Mips, please refer to TI datasheet for further information about performances.

www.irf.com 2 PIIPM50P12B004 I27146 01/03 Detailed Block Diagram ADCi n00 ADCi n01 Lin Reg Current Sense Level Shifter ADCi n02 15V iso-3 Lin Reg 4 00k Hz R1 + R1 - Current Sense Level Shifter Lin Reg 4 00k Hz R2 + R2 - Current Sense Level Shifter 5. 5k Hz Bessel 4 00k Hz R3 + R3 -5. 5k Hz Bessel 5. 5k Hz Bessel 10 kHz SH + SH - 15V iso-1 15V iso-2 3. 3V 15V iso-1 15V 15V iso-2 15V 15V iso-3 15V Logic interface TMS320LF2406A 40Mi ps RS422 line driver Tx- Tx + Rx+ Rx- Opto- isola tio n Enc2-hall2/Sp iST E Strb-hall3 /SpiRx Enc1-hall1/Sp iCK Opto- isola tio n Opto- isola tio n Sci T x Sci Rx Spi SIMO Strobe Spi CK QE_p1 Spi STE QE_p2 ADCin02 ADCin01 ADCi n00 LFault TMS TD i TD o Tck TRS T- EMU0 EMU1 PD Tck-ret Boot-en Com JTAG interface connector Vin iso GND iso Th+ Th- 5V iso GND iso Power Supply 3.3V, 5V 15V flyback 15V is o-1 15V is o-2 15V is o-3 5V ref 3.3V 15V 3.3V re f V in COM DCB mon 1k Hz DC + DC - 3. 3V Vin m on LatchLFault LFault reset OV Comp Fault 3. 3V 3. 3V Fault Fault Fault Fault SpiTx Spi SOMI LFaultreset Vth 1. 7k Hz OPA OPA OPA OC Com pOPA DIV PWM3 PWM6 PWM2 PWM5 PWM1 PWM4 Gate Drivers Gate Drivers LFault LFault Gate Drivers LFault ADCin04 ADCin03 ADCin05 Fault Fault 68972697477799270 ADCi n00 ADCi n01 Lin Reg Lin Reg Current Sense Level Shifter ADCi n02 15V iso-315V iso-3 Lin Reg Lin Reg 4 00k Hz4 00k Hz R1 + R1 - Current Sense Level Shifter Lin Reg Lin Reg 4 00k Hz4 00k Hz R2 + R2 - Current Sense Level Shifter 5. 5k Hz Bessel 5. 5k Hz Bessel 4 00k Hz4 00k Hz R3 + R3 -5. 5k Hz Bessel 5. 5k Hz Bessel 5. 5k Hz Bessel 10 kHz10 kHz SH + SH - 15V iso-115V iso-1 5V5V 15V iso-215V iso-2 5V5V 5V5V 3. 3V3. 3V 15V iso-1 15V 15V iso-2 15V 15V iso-3 15V Logic interface Logic interface TMS320LF2406A 40Mi ps RS422 line driver Tx-Tx- Tx +Tx + Rx+Rx+ Rx-Rx- Opto- isola tio n Enc2-hall2/Sp iST EEnc2-hall2/Sp iST E Strb-hall3 /SpiRxStrb-hall3 /SpiRx Enc1-hall1/Sp iCKEnc1-hall1/Sp iCK Opto- isola tio n Opto- isola tio n Sci T x Sci Rx Spi SIMO Strobe Spi CK QE_p1 Spi STE QE_p2 ADCin02 ADCin01 ADCi n00 LFault TMSTMS TD iTD i TD oTD o TckTck TRS T-TRS T- EMU0EMU0 EMU1EMU1 PDPD Tck-retTck-ret Boot-enBoot-en ComCom JTAG interface connector Vin isoVin iso GND isoGND iso Th+ Th- 5V iso 5V5V GND iso Power Supply 3.3V, 5V 15V flyback 15V is o-1 15V is o-2 15V is o-3 5V ref 3.3V 15V 3.3V re f V inV in COMCOM DCB mon 1k Hz1k Hz DC + DC - 3. 3V3. 3V Vin m on LatchLFault LFault reset OV Comp FaultFault 3. 3V3. 3V 3. 3V3. 3V FaultFault FaultFault FaultFault FaultFault SpiTxSpiTx Spi SOMI LFaultreset Vth 1. 7k Hz1. 7k Hz OPA OPA OPA OC Com pOPA DIVDIV PWM3 PWM6 PWM2 PWM5 PWM1 PWM4 Gate Drivers Gate Drivers Gate Drivers LFaultLFault LFaultLFault Gate Drivers LFaultLFault ADCin04 ADCin03 ADCin05 FaultFault FaultFault 68972697477799270

www.irf.com 3 PIIPM50P12B004 I27146 01/03 Signal pins on RS422 serial port Symbol Lead Description Pin number Vin iso External 5V supply voltage for opto-couplers and line driver supply 6 GND iso Extenal 5V supply ground reference for opto-couplers and line driver supply 7 Tx+ RS422 Trasmitter Non inverting Driver Output 1 Tx- RS422 Trasmitter Inverting Driver Output 2 Rx+ RS422 Receiver Non inverting Driver Input, 4 Rx- RS422 Receiver Inverting Driver Input 3 Enc1 – Hall1 / SpiCK Incremental Encoder 1 / Hall effect sensor input 1/ SpiCK input (GND iso referenced) 5 Enc2 – Hall2 / SpiSTE Incremental Encoder 2 / Hall effect sensor input 2 / SpiSTE input (GND iso referenced) 9 Strb – Hall3 / SpiRx Incremental Encoder Strobe / Hall effect sensor input 3 / SpiRx input (GND iso ref.) 10 SpiTx SpiTx output (GND iso referenced) 8 Vin External 15V supply voltage. Internally referred to DC bus minus pin (DC -) 17-18 COM External 15V supply ground reference. This pin is directly connected to DC - 19-20 RS422 serial port Signal pins on IEEE1149.1 JTAG connector Symbol Lead Description State Pin number TMS JTAG test mode select Input 12 TMS2 JTAG test mode select 2 Input 5-6 TDI JTAG test data input Input 14 TDO JTAG test data output Output 13 TCK JTAG test clock. TCK is a 10MHz clock source from the emulation pod. This signal can be used to drive the system test clock. Input TRST~ JTAG test reset Input 11 EMU0 Emulation pin 0 I/O 9-10 EMU1/OFF~ Emulation pin 1 I/O 7-8 PD Presence detect. Indicates that the emulation cable is connected and that the PI-IPM logic is powered up. PD is tied to the DSP 3.3V supply through a 1k resistor. Output TCK_RET JTAG test clock return. Test clock input to the emulator. Internally short circuited to TCK. Output Boot-En Boot ROM enable. This pin is sampled during DSP reset, pulling it low enables DSP boot ROM (Flash versions only). 47k internal pull up. Input COM External 15V supply ground reference. This pin is directly connected to DC - N/A 20 IEEE1149.1 JTAG

www.irf.com 4 PIIPM50P12B004 I27146 01/03 Power Module Frame Pins Mapping Following pins are intended for signal communication between driving board and power module only, though here described for completeness, they are on purpose not available to the user. Symbol Lead Description Pin number DC + DC Bus plus input signal DC - DC Bus minus input signal (internally connected to COM) Th + Thermal sensor positive input Th - Thermal sensor negative input (internally connected to COM) Sh + DC Bus minus series shunt positive input (Kelvin point) Sh - DC Bus minus series shunt negative input (Kelvin point) G1/2/3 Gate connections for high side IGBTs E1/2/3 Emitter connections for high side IGBTs (Kelvin points) R1/2/3 + Output current sensing resistor positive input (IGBTs emitters 1/2/3 side, Kelvin points) R1/2/3 - Output current sensing resistor negative input (Motor side, Kelvin points) G4/5/6 Gate connections for low side IGBTs E4/5/6 Emitter connections for low side IGBTs (Kelvin points) Lateral connectors on embedded driving board

www.irf.com 5 PIIPM50P12B004 I27146 01/03 Absolute Maximum Ratings (TC=25ºC) Absolute Maximum Ratings indicate sustained limits beyond which damage to the device may occur. All voltage parameters are absolute voltages referenced to VDC-, all currents are defined positive into any lead. Thermal Resistance and Power Dissipation ratings are measured at still air conditions. Symbol Parameter Definition Min. Max. Units VDC DC Bus Voltage 0 1000 VCES Collector Emitter Voltage 0 1200 V IC @ 100C IGBTs continuous collector current (TC = 100 ºC) 50 IC @ 25C IGBTs continuous collector current (TC = 25 ºC) 100 ICM Pulsed Collector Current (Fig. 3, Fig. CT.5) 200 IF @ 100C Diode Continuous Forward Current (TC = 100 ºC) 50 IF @ 25C Diode Continuous Forward Current (TC = 25 ºC) 100 IFM Diode Maximum Forward Current 200 A VGE Gate to Emitter Voltage -20 +20 V PD @ 25°C Power Dissipation (One transistor) 330 Inverter PD @ 100°C Power Dissipation (One transistor, TC = 100 ºC) 130 W Vin Non isolated supply voltage (DC- referenced) -20 20 V Vin-iso Isolated supply voltage (GND iso referenced) -5 5.5 Rx RS422 Receiver input voltage (GND iso referenced) -7 12 TA—EDB Operating Ambient Temperature Range -20 +60 TSTG-EDB Board Storage Temperature Range -40 +125 ºC VISO-CONT RS232 Input-Output Continuous Withstand Voltage (RH ≤ 50%, -40°C ≤ TA ≤ 85°C ) AC DC 800 1000 V V Embedded Driving Board V ISO-TEMP RS232 Input-Output Momentary Withstand Voltage (RH ≤ 50%, t = 1 min, TA = 25°C) RMS 2500 V MT Mounting Torque 3.5 Nm T J Operating Junction Temperature -40 +150 TSTG Storage Temperature Range -40 +125 ºC Power Module Vc-iso Isolation Voltage to Base Copper Plate -2500 +2500 V

www.irf.com 6 PIIPM50P12B004 I27146 01/03 Electrical Characteristics: Inverter For proper operation the device should be used within the recommended conditions. TJ = 25°C (unless otherwise specified) Symbol Parameter Definition Min. Typ. Max. Units Test Conditions Fig. V(BR)CES Collector To Emitter Breakdown Voltage 1200 V VGE = 0V, IC = 250µA ∆V(BR)CES / ∆T Temperature Coeff. of Breakdown Voltage +1.2 V/ºC V GE = 0V, IC = 1mA (25 - 125 ºC) 2.15 2.50 I C = 50A, VGE = 15V 5, 6 2.70 3.78 I C = 100A, VGE = 15V 7, 9 VCE(on) Collector To Emitter Saturation Voltage 2.45 3.22 V IC = 50A, VGE = 15V, TJ = 125 ºC 10, 11 VGE(th) Gate Threshold Voltage 4.4 4.7 5.5 V VCE = VGE, IC = 250µA ∆VGE(th) / ∆Tj Temp. Coeff. of Threshold Voltage -1.2 mV/ºC V CE = VGE, IC = 1mA (25 - 125 ºC) gfe Forward Trasconductance 29 33 38 S VCE = 50V, IC = 50A, PW = 80µs

500 V GE = 0V, VCE = 1200V

650 1350 VGE = 0V, VCE = 1200V, TJ = 125 ºC ICES Zero Gate Voltage Collector Current 4000 µA VGE = 0V, VCE = 1200V, TJ = 150 ºC 1.78 2.1 I C = 50A 8 VFM Diode Forward Voltage Drop 1.90 2.22 V IC = 50A, TJ = 125 ºC IRM Diode Reverse Leakage Current 20 µA VR = 1200V, TJ = 25 ºC IGES Gate To Emitter Leakage Current ±200 nA V GE = 20V R1/2/3 Sensing Resistors 1.98 2 2.02 Rsh DC bus minus series shunt resistor 1.98 2 2.02 mΩ

www.irf.com 7 PIIPM50P12B004 I27146 01/03 Switching Characteristics: Inverter For proper operation the device should be used within the recommended conditions. TJ = 25°C (unless otherwise specified) Symbol Parameter Definition Min Typ Max Units Test Conditions Fig. Qg Total Gate Charge (turn off) 400 411 Qge Gate – Emitter Charge (turn off) 46 55 Qgc Gate – Collector Charge (turn off) 181 200 nC IC = 50A V CC = 600V V GE = 15V CT1 Eon Turn on Switching Loss 2814 3220 IC = 50A, VCC = 600V, TJ = 25 ºC CT4 Eoff Turn off Switching Loss 5293 5825 VGE = 15V, RG =10Ω, L = 250µH WF1 Etot Total Switching Loss 8107 9145 µJ Tail and Diode Rev. Recovery included WF2 Eon Turn on Switching Loss 3963 4415 Eoff Turn off Switching Loss 7810 8965 Etot Total Switching Loss 11773 13380 µJ IC = 50A, VCC = 600V, TJ = 125 ºC VGE = 15V, RG =10Ω, L = 250µH Tail and Diode Rev. Recovery included 13, CT4 WF1 WF2 td (on) Turn on delay time 66 72 14,16 Tr Rise time 72 83 IC = 50A, VCC = 600V, TJ = 125 ºC CT4 td (off) Turn off delay time 593 641 WF1 Tf Fall time 95 117 ns VGE = 15V, RG =10Ω, L = 250µH WF2 Cies Input Capacitance 5884 6052 V CC = 30V Coes Output Capacitance 950 968 V GE = 0V Cres Reverse Transfer Capacitance 167 193 pF f = 1MHz TJ = 150 ºC, I C =250A, VGE = 15V to 0V RBSOA Reverse Bias Safe Operating Area FULL SQUARE VCC = 1000V, Vp = 1200V, RG = 5Ω CT2 TJ = 150 ºC, VGE = 15V to 0V CT3 SCSOA Short Circuit Safe Operating Area 10 µs VCC = 900V, Vp= 1200V, RG = 5Ω WF4 EREC Diode reverse recovery energy 693 1114 1535 µJ TJ = 125 ºC trr Diode reverse recovery time 156 260 363 ns I F = 50A, VCC = 600V, Irr Peak reverse recovery current 35 42 43 A VGE = 15V, RG =10Ω, L = 250µH 17,18 19,20 CT4 WF3 RthJC_T Each IGBT to copper plate thermal resistance 0.38 ºC/W RthJC_D Each Diode to copper plate thermal resistance 0.76 ºC/W RthC-H Module copper plate to heat sink thermal resistance. Silicon grease applied = 0.1mm 0.03 ºC/W

100 IC = 7A, VDC = 530V, fsw = 8kHz, TC = 55 ºC

150 IC = 10A, VDC = 530V, fsw = 8kHz, TC = 55 ºC

250 IC = 10A, VDC = 530V, fsw = 16kHz TC = 55 ºC,

Pdiss Total Dissipated Power 200 W IC = 20A, VDC = 530V, fsw = 4kHz, TC = 40ºC PD1 PD2 PD3

www.irf.com 8 PIIPM50P12B004 I27146 01/03 Electrical Characteristics: Embedded Driving Board (EDB) communication ports For proper operation the device should be used within the recommended conditions. Vin = 15V, Vin-iso = 5V, TA = 0 to 55C, TC = 75C (unless otherwise specified) Symbol Parameter Definition Min. Typ. Max. Units Test Conditions Conn. Vin EDB Input supply Voltage 12 15 18 V Isupp EDB input Supply Current with EEprom not programmed 90 100 110 mA Isupp EDB Input Supply Current 131 149 166 mA V DC = 0V, fPWM = 8kHz (*) Isupp EDB Input Supply Current 132 152 170 mA Vdc=600V, f PWM = 8kHz (*) Vin iso EDB isolated supply voltage 4.5 5 5.5 V Iq. iso EDB isolated quiescent supply current 9 20 mA Rx+ = +5V, Rx- = 0V Hall1/2/3 = open 24 29 34 mA Hall1/2/3 low Rx+ = 0V, Rx- = +5V Tx+ and Tx- open Isupp. iso EDB isolated supply current 37 48 59 mA Hall1/2/3 low Rx+ = 0V, Rx- = +5V Tx+ and Tx- on 120Ω RS422 port VDO-TX Differential Driver Output Voltage 2 V VCO-TX Driver Common mode output voltage 3 V Rload = 120 Ω VDI-RX Receiver Input Differential Threshold Voltage - 0.2 0.2 V RIN-RX Receiver Input Resistance 120 Ω - 7V ≤ VCM ≤ +12V fMAX RS422 maximum data rate 2.5 Mbps RS422 port Venc-high / Vhall-high Logic High Input Voltage 3.6 V Venc-low / Vhall-low Logic Low Input Voltage 2 V Ienc-low / Ihall-low Logic Low Input Current - 5.2 mA Enc1 / Hall1 Enc2 / Hall2 Strb / Hall3 input pins RS422 port TMS TMS2 TDI TDO TCK TRST- EMU0 EMU1/OFF~ PD JTAG interface pins Please see TMS320LF2406A datasheet from Texas Instruments and V PD specifications Directly connected from DSP to connector pins. EMU0 and EMU1 with 4.7k internal pull up. JTAG VPD Presence detect voltage 3.2 3.3 3.4 V IPD = -100µA JTAG VBoot En Boot ROM enable input voltage 0.5 V IBoot-En Boot ROM enable input current - 100 µA Active low JTAG * these values are obtained with internal DSP clock, EVA, EVB, SCI peripherals enabled at 40MHz, A/D peripheral at 20MHz and 50% PWM duty cycle on all legs.

www.irf.com 9 PIIPM50P12B004 I27146 01/03 DSP pins mapping For proper operation the device should be used within the recommended conditions. Vin = 15V, Vin-iso = 5V, TA = 0 to 55C, TC = 75C (unless otherwise specified) Symbol Parameter Definition Min. Typ. Max. Units Test Conditions DSP name ; pin N VDCgain DC bus voltage feedback partition coefficient 2.39 2.44 2.49 mV/V VDC-MAX Maximun DC bus voltage read 1309 V VDCpole DC bus voltage feedback filter pole 950 1000 1050 Hz ADCin03;72 VDC-OVth DC bus voltage over-voltage threshold 870 920 970 V PDPINTA;6 VTH25C Thermal sensor voltage feedback at 25 ºC (Fig. TF1) 2.65 2.75 2.85 V VTH100C Thermal sensor voltage feedback at 100 ºC (Fig. TF1) 1.04 1.09 1.14 V ADCin04;70 Vin-gain Input voltage feedback partition coefficient 125 128 131 mV/V Vin-pole Input voltage feedback filter pole 1600 1700 1800 Hz ADCin05;69 Iph-GAIN Current feedback gain 16.6 16.9 17.2 mV/A Iph-pole Current feedback filter pole 5.0 5.5 6.0 kHz Iph-MAX Maximun Current feedback read 95 Α Iph-MIN Minimun Current feedback read -95 Α Iph-LAT Current feedback signal delay 12 µs Iph-Zero Zero current input voltage level 1.64 1.67 1.70 V all phases ADCin00: 79 ADCin01: 77 ADCin02: 74 ISC Short Circuit Threshold Current 110 128 146 A all phases ISC-DEL Short Circuit detection delay time 3 6 µs all phases PDPINTA;6 DCOC DC bus minus over-current level 130 140 150 A DC bus minus DCOC-pole DC bus minus over-current filter pole 14 15 16 kHz DC bus minus PDPINTA;6 WD External watchdog timeout (see also RS~ signal) 0.9 1.6 2.5 Sec WD;85 COM DSP Ground 2, 3, 5, 7, 11, 12, 13, 14, 15, 16, 19, 26, 27, 29, 32, 34, 38, 41, 43, 45, 46, 48, 53, 56, 58, 60, 63, 65, 66, 67, 68, 71, 73, 75, 76, 78, 80, 81, 84, 90, 97 3.3V DSP 3.3V supply 4, 10, 20, 30, 35, 47, 54, 59, 64, 91, 98 floating The following pins are left unconnected 42,44,51,88 Ref3.3V 3.3V reference voltage 3.33 V VCCA,VREFHI; 83,82 ~ indicates active low signals

www.irf.com 10 PIIPM50P12B004 I27146 01/03 Other DSP pins mapping Symbol Signal Definition DSP pin name ;pin N Comments PWM1 OUT 1 high side IGBT gate drive signal PWM1;39 DSP Event Manager A output PWM2 OUT 1 low side IGBT gate drive signal PWM2;37 DSP Event Manager A output PWM3 OUT 2 high side IGBT gate drive signal PWM3;36 DSP Event Manager A output PWM4 OUT 2 low side IGBT gate drive signal PWM4;33 DSP Event Manager A output PWM5 OUT 3 high side IGBT gate drive signal PWM5;31 DSP Event Manager A output PWM6 OUT 3 low side IGBT gate drive signal PWM6;28 DSP Event Manager A output Enc1–Hall1 / SpiCK Incremental Encoder 1 / Hall effect sensor input 1/ SpiCK input (GND iso referenced) SPICK;24 QEP1;57 Optically isolated input Enc2 – Hall2 / SpiSTE Incremental Encoder 2 / Hall effect sensor input 2 / SpiSTE input (GND iso referenced) SPISTE~;23 QEP2; 55 Optically isolated input Strb – Hall3 / SpiRx Incremental Encoder Strobe / Hall effect sensor input 3 / SpiSIMO input (GND iso ref.) SPISIMO;21 CAP3; 52 Optically isolated input SpiTx SpiSOMI output (GND iso referenced) SPISOMI;22 Optically isolated input Ref3.3V 3.3V reference voltage Vrefhi;82 Vcca; 83 3.33V reference voltage for ADC converter 5V supp. Flash programming voltage pin Vccp;40 Supplied by the embedded flyback regulator Boot En~ Boot ROM enable signal BOOT_EN~;86 See also EDB electrical characteristics Tx SCI transmit data SCITXD;17 CANTX ; 50 Drives Tx+ and Tx- through an opto-isolator and a line driver Rx SCI receive data SCIRX ; 18 CANRX ; 49 Driven by Rx+ and Rx- through an opto-isolator and a line driver LFAULT System general fault input (latched) IOPF6;92 Activated by short circuits on output phases and DC bus minus and by DC bus over-voltage comparator LFAULT reset System general fault output reset signal IOPF5;89 LFAULT Reset signal, to be activated via software after a fault or system boot FAULT~ System general fault input (not latched) PDPINTA~;6 Activated by short circuits on output phases and DC bus minus and by DC bus over-voltage comparator RS~ DSP reset input signal (see also WD signal) RS~;93 Forces a DSP reset if WD signal holds too long (see also EDB electrical char.) Xtal1 PLL oscillator input pin XTAL1;87 A 10Mhz oscillator at 100ppm frequency stability feeds this pin. PLLF1 PLL filter input 1 PLLF;9 PLL filter for 40Mhz DSP clock frequency PLLF2 PLL filter input 2 PLLF2;8 PLL filter for 40Mhz DSP clock frequency PDPINTB External protection interrupt for EVB PDPINTB~;95 Not used pull up 4.7K to 3.3V ~ indicates active low signals

www.irf.com 11 PIIPM50P12B004 I27146 01/03 General Description The PI-IPM is a new generation of Inte lligent Power Module designed specifically to implement itself a complete motor driver system. The device contains all peripherals needed to control a six IGBTs inverter, including voltage, temperature and current output sensing, completely interfaced with a 40Mips DSP, the TMS320LF2406A from Texas Instruments. All communication between the DSP and the local host, including DSP software installing and debugging, is realized through an asynchronous isolated serial port (SCI), an isolated port for incremental encoder inputs or synchronous serial port communication (SPI) is also provided making this module a complete user programmable solution connected to the system only through a serial link cable. System Description The PI-IPM is realized in two distinct parts: the Power Module “EMP” and the Embedded Driving Board “EDB,” these two elements assembled together constitute the complete device with all performances described in the following. The complete block schematic showing all functions implemented in the product is represented on the System Block Schematic on page 1. The new module concept includes everything depicted within the dotted line, the EMP power module includes IGBTs, Diodes and Sensing Resistors while all remaining electronics is assembled on the EDB that is fitted on the top of it as a cover with also mechanical protective functions. Connections between the two parts are realized through a single-in-line connector and the EDB only, without disassembling the power module from the system mechanic, can be easily substituted “at the factory” for an upgrade, a system configuration change (different control architecture) or a board replacement. Also software upgrades are possible but this does not even require any hardware changes thanks to the DSP programmability through the serial or JTAG ports. T HE “EMPTM” POWER MODULE This module contains six IGBTs + HexFreds Diodes in a standard inverter configuration. IGBTs used are the new NPT 1200V-50A (current rating measured @ 100C), generation V from International Rectifier; the HexFred diodes have been designed specifically as pair elements for these power transistors. Thanks to the new design and technologic realization, this gen V devices do not need any negative gate voltage for their complete turn off and the tail effect is also substantially reduced compared to competitive devices of the same family. This feature simplifies the gate driving stage that will be described in a dedicated chapter. Another not standard feature in this type of power modules is the presence of sensing resistors in the three output phases, for precise motor current sensing and short circuit protections, as well as another resistor of the same value in the DC bus minus line, needed only for device protections purposes. A complete schematic of the EMP module is shown on page 1 where sensing resistors have been clearly evidenced, a thermal sensor is also embedded and directly coupled with the DSP inputs. The package chosen is mechanically compatible with the well known EconoPack outline, also the height of the plastic cylindrical nuts for the external PCB positioned on its top is the same, so that, with the only re-layout of the main motherboard, this module can fit into the same mechanical fixings of the standard Econo II package thus speeding up the device evaluation in an already existing driver. An important feature of this new device is the presence of Kelvin points for all feedback and command signals between the board and the module with the advantage of having all emitter and resistor sensing independent from the power path. The final benefit is that all low power signal from/to the controlling board are unaffected by parasitic inductances or resistances inevitably present in the module power layout.

www.irf.com 12 PIIPM50P12B004 I27146 01/03 The new package outline is show on page 4, all signal and power pins are clearly listed, note that because of high current spikes on those inputs the DC bus power pins are doubled in size comparing to the other power pins. Module technology uses the standard and well know DBC: over a thick Copper base an allumina (Al 2O3) substrate with a 300 µm copper foil on both side is placed and IGBTs and Diodes dies are directly soldered, through screen printing process. These dies are then bonded with a 15 mils aluminum wire for power and signal connections. All components are then completely covered by a silicone gel with mechanical protection and electrical isolation purposes. T HE “EDB” EMBEDDED DRIVING BOARD This is the core of the device intelligence, all control and driving functions are implemented at this level, the board finds its natural placement as a cover of the module itself and has a double function of mechanical cover and intelligent interface. DSP and all other electronics are here assembled; figure on page 2 shows the board schematic and all connection pins. Looking at the schematic, all diamond shaped pins are signal connections, some belonging to the RS422 port interface and some to the IEEE 1149.1 (JTAG) connector. All other pins are used for communication between the board and the module, they are positioned laterally in the board and the module doesn’t have any pins in the middle of its body. From the top left, in anti-clockwise direction we identify the following blocks that will be then described in details: 1. DSP and opto isolated serial and JTAG ports 2. Flyback Power Supply 3. Current Sensing interfaces, over-current protections and signal conditioning 4. Gate drivers 5. DC bus and Input voltage feedback 1. DSP and opto isolated serial and JTAG ports. The DSP used in this application is the new TMS320LF2406A from TI, it is a improvement of the well known in the motor driver market “F240” used in many motor driver applications. If we compare this new device with the predecessor, the new DSP has some added features that let the software designer significantly improve the system control performances, the following table shows a list of relevant data, for all other information please refer to the related device datasheet. To be noted is the increased number of instruction per second, (40MIPS) and of I/O pins, the availability of a boot ROM and a CAN, a much faster ADC and the reduced supply voltage from 5V down to 3.3V, to follow the global trend for this type of products. The choice of the DSP has been done looking at the high number of applications already existing in the market using devices of this family, however it is clear that the same kind of approach could be followed using products from different suppliers to let the customer work on its preferred and well known platform. TMS320LF2406A vs TMS320F240 ‘F2406 ‘F240 MIPS RAM Flash ROM Boot ROM Ext. Memory I/F Event manager  GP timers  CMP/PWM  CAP/QEP Watchdog timer 10-bit ADC  Channels  Conv. time (min) SPI SCI CAN Digital I/O pins Voltage range 2.5Kw 32Kw 256w Yes Yes Yes 500ns Yes Yes Yes 3.3V 544w 16Kw Yes Yes Yes Yes 6.6µs Yes Yes 5 V

www.irf.com 13 PIIPM50P12B004 I27146 01/03 The “2406A” has three different serial interfaces available: SCI, SPI, and CAN bus. In the PI- IPM50P12B004 communication is made through the asynchronous port (SCI) while four other opto-isolated lines can be used for the SPI or for the hall effect sensor interface. Maximum bit rate for this asynchronous serial port is 2.5Mbps while the SPI (synchronous) could reach 10Mbps. The choice of the SCI has been taken for easy interfacing with a standard computer serial port, the only component needed is a line driver to adapt the RS232 voltage standard with the RS422 at 3.3V used on this application. In a standard Brushless motor application usually 1Mbps are far enough to transmit all information needed for the torque reference updates and other fault and feedback signals at a maximum frame rate of 10kHz (100bits/frame), in this way the on- board line driver let the application use long connecting wires between the host and the module, leaving the user the possibility of having the PI-IPM displ aced near the motor, e.g. in its connecting box, thus avoiding long ad noisy three phase cables between driver and load. The JTAG port is the standard one, neither isolation nor signal conditioning are provided here and all signal, except the Tck-ret, are directly connected from the related DSP pins to the connector; however, due to the limited board space, the connector used in not the standard 14 pins at two rows header, then an adaptor has to be realized to connect it to the JTAG adapter interface provided by Texas Instruments. Last but not least is the ADC speed and load characteristic: as the table shows the conversion time is 500ns, in fact the 2406A DSP has a single ADC handling, in time sharing, all 16 inputs, then, using 6 inputs, the total conversion time, which is a fixed delay to wait for before having all data updated, is around 3.0µs. 2. Flyback Power Supply A flyback power supply for the floating stages is provided in the EDB. As the block schematic on page 2 shows, we have three 15V outputs for the floating stages, isolated from each other at 1.5kV minimum, and a single 5V and 3.3V output. The 5V supplies all low voltage electronics and a 3.3V linear regulator is used to feed the DSP and some analog and logic interfaces to it. This 5V and 3.3V are directly referred to the DC bus minus, so that all control circuitry is alternately at one of the input lines potential, isolation is provided at the DSP serial link level, then avoiding all delays due to opto couplers insertion between DSP and control logic. Note that also the required 15V input voltage is referred to the same DC bus minus and directly supplies the low side gate drivers stages, the user should pay some attention on how this supply line is realized in his application. Just for completeness, the following figure gives a possible solution to that that doesn’t impact heavily on the user application. Examples of power supply for PI-IPM 15V and 5V iso inputs Normally a 5V power supply is already present, for displays, electronics and micro processor, the same 5V could be used for the 5V iso supply of opto-couplers and line driver, the 15V could be realized as an added winding in the secondary side of the flyback transformer, the only care that should be taken is in keeping its isolation from the above mentioned 5V at the required level (at least 1.5kV). To avoid noise problems in the measuring lines due to the commutating electronics during normal functioning of the system, references are kept separated. A 5V linear regulator, directly supplied from the 15V input, is used to provide the reference voltage to the current sensing amplifying and conditioning components while a precise op-amp, configured as a voltage follower,

www.irf.com 14 PIIPM50P12B004 I27146 01/03 acts as a buffer of the partition at 3.30V created down the 5V reference. This 3.30V is used also as reference for the DSP A/D converter. It has to be noted that in the schematic we are using the same linear regulator as a starting point for all reference voltages. In fact if the 5V linear regulator drifts in temperature or time, then all references (even the 3.30V being this a simple partitioning) follow in track and still keep the overall chain precision. The trimming is then done only once, in a single point of the measuring chain, that is the conditioning op-amp collecting the current sensing ICs signal as will then be described in the following chapter. 3. Current sensing interfaces, over-current protections and signal conditioning. This block is the real critical point of the system. Current measuring performances directly impact on motor control performances in a servo application: errors in current evaluation, delay in its measuring chain or poor overall precision of the system, such as scarce references or lower number of significant A/D bits, inevitably results in unwanted trembling and unnatural noise coming from the motor while running at lower speed or at blocked shaft conditions. In the PI-IPM50P12B 004 the current sensing function is done through three sensing resistors dropout measurement, one on each output phase, with the benefit of a lower area and somewhat a lower cost compared to the well-known Hall effect devices. This solution has the added value of having the shunts element embedded in the power module with all Kelvin connections available, avoiding any noise due to long routing of power paths. As the block schematic on page 2 shows, the voltage across each sensing resistor is applied, through an anti-aliasing 400kHz filter, at the input of a current sense IC and then to a signal conditioning circuit. Though the block schematic here shows an Op- Amp plus an external passive filter this is simply realized implementing a VCVS cell (i.e. a Constant Gain or Sallen – Key cell) configured so that the offset and gain is easily trimmed by three on board resistors. The filter implemented is a second order Bessel with 5.5kHz pole frequency, the reason for this is that this type of polynomials are calculated with the aim of having a constant group delay within the pass- band frequencies, thus giving the minimum waveform distortion to the output signal up to almost twice the filter pole. In other words we could also say that the group delay of the signal chain from the sensing resistor up to the ADC input of the DSP is constant from 0 to 5.5kHz. Signal outputted from the overall chain has a 0 to +3.30V dynamic, with a sensing resistor of 2mohms the input measured current range is +/- 100A then we have a situation as follows: VA VA VA 30.3100 65.100.0 0.0100 Summing up our current measurements performances are shown in the following table: The “2406A” DSP has a 10bit ADC, consequently the PI-IPM50P12B 004 has a minimum appreciable current step of approximately: Α== 1953.02 100*2 10LSB that is: mALSB 1951 ≅ The over current protection is provided also through the current sensing ICs, the related fault signal is activated when a 250mV voltage across PI-IPM Current sensing chain typical performances Value Units current range +/- 100 A Gain and Offset precision +/- 1.8 % Bandwidth 5.5 kHz latency time 10 µs

www.irf.com 15 PIIPM50P12B004 I27146 01/03 sensing pins is detected, this means an over- current detection level of approximately 25%. The delay of this line is around 3 µs, fast enough to let the DSP react within the 10 µs IGBTs short circuit rating, thus providing full device protection for any phase-to-ground and phase-to- phase short circuits. The only failure not covered in this way is the shoot-through, where high current levels cannot be detected from outside the module rather internally between two IGBTs of the same leg. In this case the protection is implemented by means of the fourth sensing element, with the same resistive value of the other shunts present in the power module, inserted in series to the DC bus minus. The related dropout voltage is then filtered by a 15kHz passive filter to avoid false fault detections due to unwanted induced voltage spikes and finally applied to an operational amplifier configured as a comparator. All data referred to the OC protection are listed on page 9 of this datasheet. 4. Gate Drivers Devices used to perform this task are the well- known IR2213, capable of 2A sink and 2A source maximum gate driving current, in a SO16W package; on page 2 is shown also the block schematic of the gate driving section of the module. The IGBTs used in the PI-IPM (genV NPT 1200V - 50A from IR) do not need any negative gate drive voltage for their complete turn off, this simplifies the flyback power supply design avoiding the need of center tapped transformer outputs or the use of zener diodes to create the central common reference for the gate drivers floating ground. Though the IR2213 do have +/- 2A of gate current capability, in the PI- IPM50P12B004 we use different gate resistor values for turn on and turn off as follows: ohmoffturn ohmonturn 6.7 Commonly realized through a diode-resistor series in parallel with a single resistor used in turn on only. Observed rise and fall times are around 250ns – 300ns depending on the output current level, this values are considered as pretty adequate for a 25A application at 16kHz symmetric PWM carrier, space vector modulation. These gate drivers do provide levels shifting without any galvanic isolation, that is no opto- couplers are built inside. This turns out to be a major benefit in this stage where the usual 1 µs delay of optos impacts on the system control as a systematic and fastidious delay. 5. DC bus and Input voltage feedback The purpose of this block is to continuously check the voltage of the two supply lines of the system: Vin and DC bus. Vin is the only external power supply needed for all electronics in the EDB. The internal flyback regulator has its own under-voltage lockout to prevent all electronics from start working when an insufficient supply voltage is present; minimum recommended supply voltage is 12V. Low side gate drivers are directly fed from the Vin line and there is no further control to this voltage than their own under-voltage lockout. This is typically set at 8.5V and this level could be not sufficient to properly drive the IGBT gates, then it is advisable to check with the DSP the input voltage and impose that the system could start switching only when the Vin voltage is between 10V and 18V thus providing also an over-voltage control. The DC bus voltage is also important for the system functioning and needs to be continuously kept under control. A resistor divider provides a partition coefficient of 2.44mV/V and a maximum mapped voltage of around 1100V As the block schematic shows, it has to be taken into account that, to avoid false detections due to voltage spikes inevitably present on the partitioned voltage, a 1kHz passive filter has been inserted between the divider and the voltage follower buffer whose output is connected to one of the ADC inputs.

www.irf.com 16 PIIPM50P12B004 I27146 01/03 Fig. 1 – Maximum DC collector Current vs. case temperature TC = (ºC) Fig. 3 – Forward SOA TC = 25ºC; Tj ≤ 150ºC VCE = (V) Fig. 2 – Power Dissipation vs. Case Temperature TC = (ºC) Fig. 4 – Reverse Bias SOA Tj = 150ºC, VGE = 15V VCE = (V)

www.irf.com 17 PIIPM50P12B004 I27146 01/03 Fig. 5 – Typical IGBT Output Characteristics Tj = - 40ºC; tp = 300µs VCE = (V) Fig. 7 – Typical IGBT Output Characteristics Tj = 125ºC; tp = 300µs VCE = (V) Fig. 6 – Typical IGBT Output Characteristics Tj = 25ºC; tp = 300µs VCE = (V) Fig. 8 – Typical Diode Forward Characteristics tp = 300µs VF = (V)

www.irf.com 18 PIIPM50P12B004 I27146 01/03 Fig. 9 – Typical VCE vs. VGE Tj = - 40ºC VGE = (V) Fig. 11 – Typical VCE vs. VGE Tj = 125ºC VGE = (V) Fig. 10 – Typical VCE vs. VGE Tj = 25ºC VGE = (V) Fig. 12 – Typical Transfer Characteristics VCE = 20V; tp = 20µs VGE = (V)

www.irf.com 19 PIIPM50P12B004 I27146 01/03 Fig. 13 – Typical Energy Loss vs. IC Tj = 125ºC; L = 250µH; VCE = 600V; Rg = 10Ω; VGE = 15V IC = (A) Fig. 15 – Typical Energy Loss vs. Rg Tj = 125ºC; L = 250µH; VCE = 600V; ICE = 50A; VGE = 15V Rg = (Ω) Fig. 14 – Typical Switching Time vs. IC Tj = 125ºC; L = 250µH; VCE = 600V; Rg = 10Ω; VGE = 15V IC = (A) Fig. 16 – Typical Switching Time vs. Rg Tj = 125ºC; L = 250µH; VCE = 600V; ICE = 50A; VGE = 15V Rg = (Ω)

www.irf.com 20 PIIPM50P12B004 I27146 01/03 Fig. 17 – Typical Diode IRR vs. IF Tj = 125ºC IF = (A) Fig. 19 – Typical Diode IRR vs. dIF/dt VDC = 600V; VGE = 15V; IF = 50A; Tj = 125ºC dIF/dt (A/µs) Fig. 18 – Typical Diode IRR vs. Rg IF = 50A; Tj = 125ºC Rg = (Ω) Fig. 20 – Typical Diode QRR VDC = 600V; VGE = 15V; Tj = 125ºC dIF/dt (A/µs)

www.irf.com 21 PIIPM50P12B004 I27146 01/03 Fig. 21 – Typical Diode EREC vs. IF Tj = 125ºC IF = (A) Fig. 23 – Typical Gate Charge vs. VGE IC = 50A; L = 600µH; VCC = 600V QG = (nC) Fig. 22 – Typical Capacitance vs. VCE VGE = 0V; f = 1MHz VCE = (V)

www.irf.com 22 PIIPM50P12B004 I27146 01/03 Fig. 24 – Normalized Transient Impedance, Junction-to-copper plate t1, Rectangular Pulse Duration (sec)

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www.irf.com 25 PIIPM50P12B004 I27146 01/03 Fig. PD1 – Total Dissipated Power vs. fSW IoutRMS = 7A, VDC = 530V, TC = 55ºC fSW = (kHz) Fig. PD3 – Total Dissipated Power vs. fSW IoutRMS = 20A, VDC = 530V, TC = 40ºC fSW = (kHz) Fig. PD2 – Total Dissipated Power vs. fSW IoutRMS = 10A, VDC = 530V, TC = 55ºC fSW = (kHz) Fig. TF1 – Thermal Sensor Voltage Feedback vs. Base-plate Temperature TC (ºC)

www.irf.com 26 PIIPM50P12B004 I27146 01/03 PIIPM family part number identification

www.irf.com 27 PIIPM50P12B004 I27146 01/03 Top board suggested footprint (top view) RS422 and JTAG Connectors top view These connectors do not have any orientation tag; please check their Pin 1 position on Power Module Frame Pins Mapping before inserting mate part. Molex 53916-0204 mates with 54167-0208 or 52991-0208

www.irf.com 28 PIIPM50P12B004 I27146 01/03 PIIPM50P12B004 case outline and dimensions Data and specifications subject to change without notice This product has been designed and qualified for Industrial Level. Qualification Standards can be found on IR’s Web Site. IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, Tel: (310) 3252 7105 TAC Fax: (310) 252 7309 Visit us at www.irf.com for sales contact information 01/03 Data and specifications subject to change without notice. Sales Offices, Agents and Distributors in Major Cities Throughout the World. © 2003 International Rectifier - Printed in Italy 01-13 - Rev. 2.9