PI6LC58S1101

Features

Document overview

• PDF pages: 17

Technical content

Features

ÎÎ 3.3V Supply Voltage ÎÎ Crystal/CMOS Input: 25MHz/50MHz ÎÎ Differential Input: 25MHz/50MHz ÎÎ Selectable Output Frequencies ÎÎ Four Output Banks with Selectable Output Signaling: LVPECL or LVDS ÎÎ Very low RMS Phase jitter: 0.08ps (typ.), 156.25MHz (10kHz to 20MHz) ÎÎ Excellent phase noise: -145dBc/Hz, 156.25MHz at 100kHz offset ÎÎ Power Supply Noise Rejection: -55dBc ÎÎ Industrial Temperature Support: -40 °C to 85°C ÎÎ Totally Lead-Free & Fully RoHS Compliant (Notes 1 & 2) ÎÎ Halogen and Antimony Free. “Green” Device (Note 3) ÎÎ For automotive applications requiring specific change control (i.e. parts qualified to AEC-Q100/101/200, PPAP capable, and manufactured in IATF 16949 certified facilities), please contact us or your local Diodes representative. https://www.diodes.com/quality/product-definitions/ ÎÎ Packaging (Pb-free & Green): 64-lead 9mm × 9mm TQFN

Description

The PI6LC58S1101 is very low jitter clock generator target for applications that demand extremely low phase noise, such as 10GbE, 40GbE, 100GbE, and 400GbE. It uses Diodes' proprietary LC VCO-based PLL design to achieve an optimum combination of those popular networking clock frequencies and low phase noise performance along with high power supply noise rejection. The PI6LC58S1101 has four output banks which can be config - ured independently for different frequencies and different output signaling types based on control pins. The pin control method provides an easy way to configure the device at the hardware level. Block Diagram PLL Bank A Bank BOSC IN_SEL Bank D IN+ IN- X_IN/CLK X_OUT QA[0:3] QB[0:3] QD0 25/50MHz 25/50MHz FREQ_SEL CONTROL REGISTERS NA[1:0] NB[1:0] NC[1:0] ND[1:0] DIVA DIVB DIVC DIVD Bank C QD[0:1] bP Lead-free Green Notes: 1. No purposely added lead. Fully EU Directive 2002/95/EC (RoHS), 2011/65/EU (RoHS 2) & 2015/863/EU (RoHS 3) compliant. 2. See https://www.diodes.com/quality/lead-free/ for more information about Diodes Incorporated’s definitions of Halogen- and Antimony-free, "Green" and Lead-free. 3. Halogen- and Antimony-free "Green” products are defined as those which contain <900ppm bromine, <900ppm chlorine (<1500ppm total Br + Cl) and <1000ppm antimony compounds.

www.diodes.com March 2020 Diodes Incorporated PI6LC58S1101 Document Number DS42683 Rev 1-2 Pin Description Pin # Pin Name Type Description

1 VDDOB Power — Power supply voltage for output Bank B

2 QB0+ Output — Bank B, Differential clock output, LVPECL or LVDS

3 QB0- Output — Bank B, Differential clock output, LVPECL or LVDS

4 QB1+ Output — Bank B, Differential clock output, LVPECL or LVDS

5 QB1- Output — Bank B, Differential clock output, LVPECL or LVDS

6 QB2+ Output — Bank B, Differential clock output, LVPECL or LVDS

7 QB2- Output — Bank B, Differential clock output, LVPECL or LVDS

8 QB3+ Output — Bank B, Differential clock output, LVPECL or LVDS

9 QB3- Output — Bank B, Differential clock output, LVPECL or LVDS

10 VDDOB Power — Power supply voltage for output Bank B

11 ND[0] Input Pullup/

Pulldown Control input for output Bank D. 3-level signals

12 ND[1] Input Pullup/

Pulldown Control input for output Bank D. 3-level signals

13 VDDOD Power — Power supply voltage for output Bank D

14 NC — — No Connect.

15 QD0+ Output — Bank D, Differential clock output, LVPECL or LVDS

16 QD0- Output — Bank D, Differential clock output, LVPECL or LVDS

19 20 21 22 23 24 25 26 27 28 29 30 31 32 LFF VDDA LFFR CR VDDA_IN2 CAP_BIAS NA[1] VDDA_IN1 CAP GND QB0+ VDDOB QB2+ QB1- QB0- QB1+ VDDOB ND[0] QB2- QB3+ NB[0] NB[1] 17 18 QB3- QD0+ ND[1] VDDOD NC QD0- 62 61 60 59 58 57 56 55 54 53 52 51 50 4964 63 NC[0] NC[1] VDD_CP ICP NC QA0+ VDDOA QA2+ QA1- QA0- QA1+ VDDOA VDDOC QA2- QA3+ QA3- QC1- QC0+ QC0- QC1+ VDDOC GND IN+ FREQ_IN X_OUT X_IN VDDA_XT NA[0] RES CAP_XTAL NC VDD NC NC VDD_CLK IN_SEL IN-

www.diodes.com March 2020 Diodes Incorporated PI6LC58S1101 Document Number DS42683 Rev 1-2 Pin Description Cont. Pin # Pin Name Type Description

17 NB[0] Input Pullup/

Pulldown Control input for output Bank B. 3-level signals

18 NB[1] Input Pullup/

Pulldown Control input for output Bank B. 3-level signals

19 NC[0] Input Pullup/

Pulldown Control input for output Bank C. 3-level signals

20 NC[1] Input Pullup/

Pulldown Control input for output Bank C. 3-level signals

21 VDDA_IN1 Power — Analog Power supply voltage for PLL

22 NA[1] Input Pullup/

Pulldown Control input for output Bank A. 3-level signals 23 CAP_BIAS Analog — Internal VCO bias decoupling capacitor. Use a 4.7μF capacitor between the CAP_BIAS and GND

24 VDDA_IN2 Power — Analog Power supply voltage for PLL

25 CR Analog — 1uF decoupling capacitor between CR amd VDDA

26 CAP Analog — 4.7uF Decoupling capacitor

27 LFFR Analog — Ground return path for PLL loop filter

28 LFF Output — Loop filter/ charge pump output for PLL. Connect to external loop filter

29 VDDA Power — Analog Power supply voltage for PLL

30 NC — — No Connect

31 VDD_CP Power — Analog power supply for charge pump

32 ICP Analog — Charge pump current input, connect to LFF pin 28

33 VDDOC Power — Power supply voltage for output Bank C

34 QC1- Output — Bank C, Differential clock output, LVPECL or LVDS

35 QC1+ Output — Bank C, Differential clock output, LVPECL or LVDS

36 QC0- Output — Bank C, Differential clock output, LVPECL or LVDS

37 QC0+ Output — Bank C, Differential clock output, LVPECL or LVDS

38 VDDOC Power — Power supply voltage for output Bank C

39 VDDOA Power — Power supply voltage for output Bank A

40 QA3- Output — Bank A, Differential clock output, LVPECL or LVDS

41 QA3+ Output — Bank A, Differential clock output, LVPECL or LVDS

42 QA2- Output — Bank A, Differential clock output, LVPECL or LVDS

43 QA2+ Output — Bank A, Differential clock output, LVPECL or LVDS

44 QA1- Output — Bank A, Differential clock output, LVPECL or LVDS

45 QA1+ Output — Bank A, Differential clock output, LVPECL or LVDS

46 QA0- Output — Bank A, Differential clock output, LVPECL or LVDS

47 QA0+ Output — Bank A, Differential clock output, LVPECL or LVDS

48 VDDOA Power — Power supply voltage for output Bank A

www.diodes.com March 2020 Diodes Incorporated PI6LC58S1101 Document Number DS42683 Rev 1-2 Pin Description Cont. Pin # Pin Name Type Description

49 IN_SEL Input Pulldown

Selects input reference source. LVCMOS interface levels. 0 = Crystal input on pins X_IN, X_Out (default) 1 = Reference clock input on pins IN+, IN-

50 VDD_CLK Power — Power supply voltage for input IN+, IN-

51 IN- Input Pullup/

Internal resistor bias to VDD_CLK/2

52 IN+ Input Pulldown Differential clock input

53 GND Power — Connect to Ground

54 FREQ_IN — Pullup/

Pulldown Input frequency select. 3-level signals 55 CAP_XTAL Analog — Crystal oscillator circuit decoupling capacitor. Use a 4.7μF capacitor between the CAP_XTAL and the GND terminals.

56 X_OUT Output — Crystal out

57 X_IN Input — Crystal in, the input also supports being driven by a single-ended crystal

oscillator or reference clock

58 VDDA_XT Analog — Analog power supply voltage for the crystal oscillator

59 NA[0] Input Pullup/

Pulldown Control input for output Bank A. 3-level signals 60 RES — — 2.8kΩ (1%) resistor to Ground

61 NC — — No Connect

62 NC — — No Connect

63 VDD Power — Power supply

64 NC — — No Connect

Epad Ground Power — Connect to Ground

www.diodes.com March 2020 Diodes Incorporated PI6LC58S1101 Document Number DS42683 Rev 1-2 Input MUX Selection IN_SEL Input Source

0 Crystal Input (X_IN, X_OUT)

1 Differential Input (IN+, IN-)

Bank A Differential Output Control NA[1] NA[0] Output Types Output Frequency (MHz) Low Low LVPECL 156.25 Low Middle LVPECL 125 Low High LVPECL 100 Middle Low LVPECL 25 Middle Middle Power Down, both outputs of the differential output pair will drive a logic-high level Middle High LVDS 156.25 High Low LVDS 125 High Middle LVPECL 312.5 High High Reserved Input Frequency Selection FREQ_IN Input Source High Reserved Middle 25MHz Low 50MHz Bank B Differential Output Control NB[1] NB[0] Output Types Output Frequency (MHz) Low Low LVPECL 156.25 Low Middle LVPECL 125 Low High LVPECL 100 Middle Low LVPECL 25 Middle Middle Power Down, both outputs of the differential output pair will drive a logic-high level Middle High LVDS 156.25 High Low LVDS 125 High Middle LVPECL 312.5 High High LVPECL 50

www.diodes.com March 2020 Diodes Incorporated PI6LC58S1101 Document Number DS42683 Rev 1-2 Bank D Differential Output Control ND[1] ND[0] Output Types Output Frequency (MHz) Low Low LVDS 156.25 Low Middle LVDS 125 Low High LVDS 100 Middle Low LVPECL 156.25 Middle Middle Power Down, both outputs of the differential output pair will drive a logic-high level Middle High LVPECL 100 High Low LVPECL 25 High Middle LVPECL 125 High High LVPECL fin Bank C Differential Output Control NC[1] NC[0] Output Types Output Frequency (MHz) Low Low LVPECL 312.5 Low Middle LVPECL 156.25 Low High LVPECL 125 Middle Low LVPECL 25 Middle Middle Power Down, both outputs of the differential output pair will drive a logic-high level Middle High LVDS 125 High Low LVDS 100 High Middle LVPECL 50 High High LVDS 156.25 PLL Loop Bandwidth and Loop Filter The PI6LC58S1101 PLL requires an external loop filter. The components of the filter are connected in between the ICP (pin32) and LFFR (pin27). PLL loop bandwidth generally depends on the loop components, charge pump current, PFD frequency, and VCO gain. For the best results, we recommend the following values for the components: C1=200pF, C2=0.1uF, and R2=150W.

www.diodes.com March 2020 Diodes Incorporated PI6LC58S1101 Document Number DS42683 Rev 1-2 Operating Conditions Symbol Parameters Conditions Min. Ty p. Max. Units VDD Core Power Supply Voltage — 3.135 3.3 3.465 V VDDOX Output Power Supply Voltage — 3.135 3.3 3.465 V VDDA Analog Power Supply Voltage — 3.135 3.3 3.465 V IDD Power Supply Current — — — 85 mA IDDO Power Supply Current for Outputs All outputs loaded, Diff. Outputs are LVPECL — — 850 mA All outputs loaded, Diff. Outputs are LVDS — — 650 mA I DDA Analog Power Supply Current — — — 180 mA TA Ambient Temperature — –40 — 85 °C Supply Voltage to Ground Potential, VDD, VDDA VDDOx –0.5V to +3.8V Note: Stresses greater than those listed under MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to ab - solute maximum rating conditions for extended periods may affect reliability. Maximum Ratings (Above which useful life may be impaired. For user guidelines, not tested.) Input Electrical Characteristics Symbol Parameters Conditions Min. Ty p. Max. Units Rpu Internal Pullup Resistance — — 51 — KΩ Rdn Internal Pulldown Resistance — — 51 — KΩ Rdn Internal Pulldown Resistance IN_SEL — 100 — KΩ CXTAL Internal capacitance on X_IN and X_OUT pins — — 12 — pF Symbol Parameters Conditions Min. Ty p. Max. Units VIH Input High Voltage VDD = 3.3V ±5% 0.7x VDD — VDD +0.3 V VIL Input Low Voltage VDD = 3.3V ±5% -0.3 — 0.3x VDD V IIH Input High Current VIN = VDD max. — — 150 mA IIL Input Low Current VIN = 0V -150 — — mA TDC Input Duty Cycle — 40 — 60 % CIN Input Capacitance — — 3.5 — pF

www.diodes.com March 2020 Diodes Incorporated PI6LC58S1101 Document Number DS42683 Rev 1-2 Differential Input DC Characteristics Symbol Parameters Conditions Min.. Ty p. Max. Units VIH Input High Voltage — — — VDD - 0.7 V VIL Input Low Voltage — VDD - 2.0 — — V VCM Input Bias Voltage — 1.1 — VDD - 0.3 V VIN-PP Input Differential Swing Differential peak to peak 0.2 — 1.4 V Crystal Characteristic Parameters Description Min. Ty p Max. Units OSCmode Mode of Oscillation Fundamental FREQ Frequency — 25 50 MHz ESR(1) Equivalent Series Resistance — — 50 W Cload Load Capacitance, 50MHz crystal — 8 12 pF Load Capacitance, 25MHz crystal — 12 22 pF Cshunt Shunt Capacitance — — 7 pF Drive Level — — 250 uW Note: 1. ESR value is dependent upon frequency of oscillation Symbol Parameters Conditions Min. Ty p. Max. Units VIH Input High Voltage VDD = 3.3V ±5% 0.7 × VDD — 3.465 V VIM Input Middle Voltage VDD = 3.3V ±5% 0.4 × VDD — 0.6 × VDD V VIL Input Low Voltage VDD = 3.3V ±5% -0.3 — 0.3 × VDD V IIH Input High Current VIN = VDD max. — — 150 mA IIH Input Middle Current VIN = VDD /2 — ±1 — mA IIL Input Low Current VIN = 0V -150 — — mA LVPECL Output DC Characteristics(1) Symbol Parameters Condition Min. Ty p. Max. Units VOPP Output Peak-Peak Voltage Single-ended — 0.78 — V VOH Output High Voltage Outputs terminated with 50Ω to VDD_OX - 2V VDDOX - 1.4 — VDDOX - 0.7 V VOL Output Low Voltage VDDOX - 2.0 — VDDOX - 1.3 V

www.diodes.com March 2020 Diodes Incorporated PI6LC58S1101 Document Number DS42683 Rev 1-2 AC Output Characteristics (see test circuit)(1) TA=-40oC to 85oC; VDD=3.3V+5%, VDD_O=3.3V+5% Symbol Parameters Condition Min. Ty p. Max. Units fOUT Output Frequency LVPECL — — 156.25 MHz LVDS — — 156.25 MHz tR / tF Rise and Fall Time; 20% ~ 80% LVPECL , LVDS — 100 200 ps tDC Duty Cycle LVPECL , LVDS 45 — 55 % tjPHASE Integrated-Phase Jitter (RMS) 10kHz-20MHz @ 156.25MHz, 25MHz Xtal input, with ELF — 0.08 0.12 ps tj c-c Cycle-to-Cycle Jitter — — 28 30 ps tjPk-Pk Peak-to-Peak jitter — — 30 35 ps fN Single-Side Band Phase Noise 156.25MHz, 25MHz Xtal input Offset 1kHz — -130 — dBc/Hz Offset 10kHz — -140 — Offset 100kHz — -145 — Offset 1MHz — -150 — Offset 10MHz — -160 — PSNR Power Supply Noise Rejection V DD, 50mVpp, 10k-15MHz — -65 — dBcVDDA, 50mVpp, 10k-15MHz — -65 — VDD_Ox, 50mVpp, 10k-15MHz — -55 — tSTARTUP Start Time(1) — — — 175 ms tLOCK PLL Lock Time — — — 20 ms Note: 1. Startup time is dependent on the capacitor value of CR (pin 25). LVDS Output DC Characteristics Symbol Parameters Condition Min. Ty p. Max. Units VOPP Output Peak-peak Voltage Single-ended 0.247 — 0.530 V DVOPP VOPP Magnitude Change — — — 50 mV VOS Output Offset Voltage — 1.9 — 2.7 V DVOS VOS Magnitude Change — — — 50 mV

Figure 1. LVPECL and LVDS Test Circuit

www.diodes.com March 2020 Diodes Incorporated PI6LC58S1101 Document Number DS42683 Rev 1-2

Application Information

Recommendations for Unused Input and Output Pins Crystal Inputs: For applications not requiring the use of the crystal oscillator input, both XTAL_IN and XTAL_OUT can be left floating. A 1kΩ resis- tor can be tied from XTAL_IN to ground for additional protection. Reference Inputs: IN+/IN- They can be left floating if not used. Connect them 1k to GND can provide additional protection. LVCMOS Control Pins: All control pins have internal pulldowns; A 1kΩ resistor tied from each control pin to ground can provide additional protection. Outputs: All unused are suggested to leave open in NC without any trace. This can save the IC supply power and with mini. EMI radiation. Crystal Circuit Connection The following diagram shows PI6LC58S1101 crystal circuit connection with a parallel crystal. For the CL=12pF crystal, it is suggested to use C1=12pF, C2=12pF. C1 and C2 can be adjusted to fine tune to the target ppm of crystal oscillator according to different board layouts. 18pF Crystal(CL=18pF) 18pF X_IN X_OUT Diodes Crystals FL25xxxxx Figure 2. Crystal Oscillator Circuit

a 1uF cross them after pin 30 a 22uF to GND. Figure 7. Power supply and other critical pins decoupling reference

www.diodes.com March 2020 Diodes Incorporated PI6LC58S1101 Document Number DS42683 Rev 1-2 Phase Noise Plots 156.25MHz LVPECL Clock Part Marking Top mark not available at this time. To obtain advance information regarding the top mark, please contact your local sales representative.

www.diodes.com March 2020 Diodes Incorporated PI6LC58S1101 Document Number DS42683 Rev 1-2

Ordering Information

Ordering Code Package Code Package Description Operating Temperature PI6LC58S1101ZDIEX ZD 64-Contact, Very Thin Quad Flat No-Lead (TQFN) Industrial Packaging Mechanical: 64-TQFN (ZD) For latest package information: See https://www.diodes.com/assets/MediaList-Attachments/Diodes-Package-Information.pdf Notes: 1. No purposely added lead. Fully EU Directive 2002/95/EC (RoHS), 2011/65/EU (RoHS 2) & 2015/863/EU (RoHS 3) compliant. 2. See https://www.diodes.com/quality/lead-free/ for more information about Diodes Incorporated’s definitions of Halogen- and Antimony-free, "Green" and Lead-free. 3. Halogen- and Antimony-free "Green” products are defined as those which contain <900ppm bromine, <900ppm chlorine (<1500ppm total Br + Cl) and <1000ppm antimony compounds. 4. I = Industrial 5. E = Pb-free and Green 6. X suffix = Tape/Reel

www.diodes.com March 2020 Diodes Incorporated PI6LC58S1101 Document Number DS42683 Rev 1-2 IMPORTANT NOTICE DIODES INCORPORATED MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARDS TO THIS DOCUMENT, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE (AND THEIR EQUIVALENTS UNDER THE LAWS OF ANY JURISDICTION). Diodes Incorporated and its subsidiaries reserve the right to make modifications, enhancements, improvements, corrections or other changes without further no - tice to this document and any product described herein. Diodes Incorporated does not assume any liability arising out of the application or use of this document or any product described herein; neither does Diodes Incorporated convey any license under its patent or trademark rights, nor the rights of others. Any Customer or user of this document or products described herein in such applications shall assume all risks of such use and will agree to hold Diodes Incorporated and all the companies whose products are represented on Diodes Incorporated website, harmless against all damages. Diodes Incorporated does not warrant or accept any liability whatsoever in respect of any products purchased through unauthorized sales channel. Should Customers purchase or use Diodes Incorporated products for any unintended or unauthorized application, Customers shall indemnify and hold Diodes Incorporated and its representatives harmless against all claims, damages, expenses, and attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized application. Products described herein may be covered by one or more United States, international or foreign patents pending. Product names and markings noted herein may also be covered by one or more United States, international or foreign trademarks. This document is written in English but may be translated into multiple languages for reference. Only the English version of this document is the final and determi - native format released by Diodes Incorporated. LIFE SUPPORT Diodes Incorporated products are specifically not authorized for use as critical components in life support devices or systems without the express written approval of the Chief Executive Officer of Diodes Incorporated. As used herein: A. Life support devices or systems are devices or systems which: 1. are intended to implant into the body, or 2. support or sustain life and whose failure to perform when properly used in accordance with instructions for use provided in the labeling can be reasonably expected to result in significant injury to the user. B. A critical component is any component in a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or to affect its safety or effectiveness. Customers represent that they have all necessary expertise in the safety and regulatory ramifications of their life support devices or systems, and acknowledge and agree that they are solely responsible for all legal, regulatory and safety-related requirements concerning their products and any use of Diodes Incorporated products in such safety-critical, life support devices or systems, notwithstanding any devices- or systems-related information or support that may be provided by Diodes Incorporated. Further, Customers must fully indemnify Diodes Incorporated and its representatives against any damages arising out of the use of Diodes Incorporated products in such safety-critical, life support devices or systems. Copyright © 2019, Diodes Incorporated www.diodes.com