PI2121 VICOR | Alldatasheet

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D 1, 15, 16, 17 Drain- The Drain of the internal N-channel MOSFET, connect to the output load. S 2, 3, 4, 5 Source-The source of the internal N-channel MOSFET, connect to the input power source bus voltage. SP 6 Positive Sense Input & Clamp: Connect SP pin to the S pin. The polarity of the voltage difference between SP and SN provides an indication of current flow direction through the MOSFET. FT 7 Fault State Output: This open collector pin pulls low when a fault occurs. Fault logic inputs are VC Under-Voltage, Input Under-Voltage, Input Over-Voltage, Forward Over-Current, light load, reverse current, and Over-Temperature. Leave this pin open if unused. BK 8 Blanking timer Input-Output: Connect a resistor from BK to GND to set the blanking time for the Reverse Comparator function. To configure in slave mode, connect BK to VC. To configure in master mode with the fastest turn-off response connect BK directly to GND. SL 9 Slave Input-Output: This pin is used for paralleling multiple PI2121 solutions in high power applications. When the PI2121 is configured as the Master, this pin functions as an output capable of driving up to 10 SL pins of slaved PI2121 devices. It serves as an input when the PI2121 is configured in slave mode. VC 10 Input Supply Pin: This pin is the supply pin for the control circuitry and gate driver. Connect a 1μF capacitor between VC pin and the GND pin. Voltage on this pin is limited to 15.5V by an internal shunt regulator in high auxiliary voltage applications. For high voltage auxiliary supply applications connect a shunt resistor between VC and the auxiliary supply. GND 11 Ground: This pin is ground for the gate driver and control circuitry. OV 12 Input Over Voltage Input: The OV pin is used to detect an input source over-voltage condition in ground referenced applications. When the OV pin voltage crosses the OV threshold, the FT pin pulls low indicating a fault condition. The input voltage OV threshold is programmable through an external resistor divider. Connect OV to GND to disable this function. UV 13 Input Under-Voltage Input: The UV pin is used to detect an input source under-voltage condition in ground referenced applications. When the UV pin voltage drops below the UV threshold, the FT pin pulls low indicating a fault condition. The input voltage UV threshold is programmable through an external resistor divider. Connect UV to VC to disable this function. SN 14 Negative Sense Input & Clamp- Connect SN to D pin. The polarity of the voltage difference between SP and SN provides an indication of current flow direction through the MOSFET. Package Pin-out

17 Pin LGA (5mm x 7mm)

Picor Corporation • picorpower.com PI2121 Rev. 1.0 Page 2 of 21

Drain-to-Source Voltage (VDS) 8V @ 25°C Source Current (IS ) Continuous 24A Source Current (IS ) Pulsed (10μs) 100A Thermal Resistance RθJA (3) 54°C/W VC -0.3V to 17.3V / 40mA SP, SN, OV, SL -0.3V to 8.0V / 10mA -0.3V to 17.3V / 10mA UV,BK, FT GND -0.3V / 5A peak -65oC to 150oC Storage Temperature -40oC to Over Temperature Fault (TFT) Operating Junction Temperature 250oC Lead Temperature (Soldering, 20 sec) ESD Rating 2kV HBM Electrical Specifications Unless otherwise specified: -40°C < TJ < 125°C, VC =12V, CVc = 1uF, CSL = 10pF Parameter Symbol Min Typ Max Units Conditions VC Supply Operating Supply Range (4) VVC-GND 4.5 13.2 V No VC limiting resistors Quiescent Current IVC 3.7 4.2 mA Normal Operating Condition, No Faults VC Clamp Voltage VVC-CLM 15 15.5 16 V IVC=10mA VC Clamp Shunt Resistance RVC 7.5 Ω Delta IVC=10mA VC Under-voltage Rising Threshold VVCUVR 4.3 4.5 V VC Under-voltage Falling Threshold VVCUVF 4.0 4.15 V VC Under-voltage Hysteresis VVCUV-HS 150 mV Internal N-Channel MOSFET Drain-to-Source Breakdown Voltage BVDSS 8 V In OFF state, ID=250µA , Tj=25°C; Figure 10, page 11 Source Current Continuous IS 24 A In ON state, Tj=25°C Drain Leakage Current IDLK 10 μA In OFF state, VDS=8V, Tj=25°C Drain-to-Source On Resistance RDSon 1.5 2.0 mΩ In ON state, IS=20A, Tj=25°C VC-V(S) ≥ 5V Body Diode Forward Voltage Vf-BD 0.7 1.0 V In ON state, IS=4A, Tj=25°C FAULT Under-Voltage Rising Threshold VUVR 500 540 mV Under-Voltage Falling Threshold VUVF 440 475 mV Under-Voltage Threshold Hysteresis VUV-HS 25 mV Under-Voltage Bias Current IUV -1 1 μA Over-Voltage Rising Threshold VOVR 500 540 mV Over-Voltage Falling Threshold VOVF 440 475 mV Picor Corporation • picorpower.com PI2121 Rev. 1.0 Page 3 of 21

Picor Corporation • picorpower.com PI2121 Rev. 1.0 Page 4 of 21 Electrical Specifications Unless otherwise specified: -40°C < TJ < 125°C, VC =12V, CVc = 1uF, CSL = 10pF Parameter Symbol Min Typ Max Units Conditions FAULT (Continued) Over-Voltage Threshold Hysteresis VOV-HS 25 mV Over-Voltage Bias Current IOV -1 1 μA Fault Output Low Voltage VFTL 0.2 0.5 V IFT=2mA, VC>3.5V Fault Output High Leakage Current IFT-LC 10 μA VFT=14V Fault Delay Time tFT-DEL 20 40 60 μs Includes output glitch filter Over Temperature Fault (1) TFT 160 °C Over Temperature Fault Hysteresis(1) TFT-HS -10 °C DIFFERENTIAL AMPLIFIER AND COMPARATORS Common Mode Input Voltage VCM -0.1 5.5 V SP to GND & SN to GND Differential Operating Input Voltage VSP-SN -50 125 mV SP-SN SP Input Bias Current ISP -50 -37 μA SP=SN=1.25V SN Input Bias Current ISN 3.5 8 μA SP=SN=1.25V SN Voltage VSN 5.5 V SP=0V Reverse Comparator Threshold VRVS-TH -10 -6 -2 mV VCM = 3.3V Reverse Comparator Hysteresis VRVS-HS 2 5 mV VCM = 3.3V Reverse to Slave Low Delay Time tRVS-MS 160 200 ns VSP-SN = -50mV step, VBK=0 (minimum blanking) Reverse to Slave Low Delay Time tRVS-SL 430 600 ns VSP-SN = -50mV step, VBK= VVC (maximum blanking) Forward Comparator Threshold VFWD-TH 2 6 9 mV VCM = 3.3V Forward Comparator Hysteresis VFWD-HS -5 -2 mV VCM = 3.3V Forward Over Current Comparator Threshold VOC-TH 60 66 70 mV VCM = 3.3V Forward Over Current Comparator Hysteresis VOC-HS -8 -4 mV VCM = 3.3V SLAVE Slave Source Current ISL -60 -25 μA VSL = 1V, Normal Operating Conditions, No Faults Slave Output Voltage High VSL-Hi 4.3 5.5 V Normal Operating Conditions, No Faults Slave Output Voltage Low VSL-Lo 0.2 0.5 V ISL=4mA Slave Hold-off Voltage at VC UVLO VSL-UV 0.7 1 V ISL=5μA,1.5V<VC<3.5V Slave Threshold VSL-TH 1.75 2 V Slave Fall Time tSL-FL 15 25 ns VBK=0 Slave Low to FET Turn Off Delay (1) Time Master Mode tG-SL 20 30 ns VBK=0 Slave Low to FET Turn Off Delay (1) Time Slave Mode tG-SL 100 130 ns VBK=VC

Picor Corporation • picorpower.com PI2121 Rev. 1.0 Page 5 of 21 Electrical Specifications Unless otherwise specified: -40°C < TJ < 125°C, VC =12V, CVc = 1uF, CSL = 10pF Parameter Symbol Min Typ Max Units Conditions BLANK Blank Source Current IBK -60 -45 -30 μA VBK=0V Blank Output Voltage VBK 0.77 0.9 V IBK=5μA Connected to GND Blank Slave Mode Threshold VBK-TH 1.2 1.45 1.7 V Note 1: These parameters are not production tested but are guaranteed by design, characterization and correlation with statistical process control. Note 2: Current sourced by a pin is reported with a negative sign. Note 3: Thermal resistance characterized on PI2121-EVAL1 evaluation board with 0 LFM airflow. Note 4: Refer to the Auxiliary Power Supply section in the Application Information for details on the VC requirement to fully enhance the internal MOSFET.

Picor Corporation • picorpower.com PI2121 Rev. 1.0 Page 6 of 21 Functional Description: The PI2121 integrated Cool-ORing product takes advantage of two different technologies combining a 1.5mΩ on-state resistance (Rds(on)) single N- channel MOSFET with high density control circuitry. This combination provides superior density, minimizing PCB space to achieve an ideal ORing diode function, significantly reducing power dissipation and eliminating the need for heat sinking, while minimizing design complexity. The PI2121’s 1.5mΩ on-state resistance MOSFET used in the conduction path enables a dramatic reduction in power dissipation versus the performance of a diode used in conventional ORing applications due to its high forward voltage drop. This can allow for the elimination of complex heat sinking and other thermal management requirements. Due to the i nherent characteristics of the integrated MOSFET, while the gate remains enhanced above the gate threshold voltage it will allow current to flow in the forward and reverse direction. Ideal ORing applications do not allow for reverse current flow, so the integrated controller has to be capable of very fast and accurate detection of reverse current caused by input power source failures, and turn off the gate of the MOSFET as quickly as possible. Once the gate voltage falls below the gate threshold, the MOSFET is off and the body diode will be reverse biased preventing reverse current flow and subsequent excessive voltage droop on the redundant bus. During forward over- current conditions caused by load faults, the controller maintains gate drive to the MOSFET to keep power dissipation as low as possible, otherwise the inherent body diode of the MOSFET would conduct, which has higher effective forward drop. Conventional ORing solutions using diodes offer no protection against forward over-current conditions. During the forward over-current condition, the PI2121 will provide an active-low fault flag to the system via the fault pin. The fault flag is also issued during the reverse current condition, light load conditions, VC under-voltage, Input Under- Voltage and Over-Voltage and Over-Temperature conditions. Differential Amplifier: The PI2121 integrates a high-speed, low offset voltage differential amplifier to sense the difference between the Sense Positive (SP) pin voltage and Sense Negative (SN) pin voltage with high accuracy. The amplifier output is connected to three comparators: Reverse comparator, Forward comparator, and Forward over-current comparator. Reverse Comparator: RVS The reverse comparator is the most critical comparator. It looks for negative voltage caused by reverse current. When the SN pin is 6mV higher than the SP pin, the reverse comparator will enable the BK current source to charge an internal 2pF capacitor. The blanking timer provides noise filtering for typical switching powe r conversion that might cause premature reverse current detection. Once the voltage across the capacitor reaches the timer threshold voltage (1.25V) the MOSFET will be turned off. The shortest blanking time is 50ns when BK is connected to ground. The Blanking time will be added to the controller delay time. The Electrical Specifications in the DIFFERENTIAL AMPLIFIER AND COMPARATOR section for Reverse Fault to Slave Low Delay Time “t RVS-MS or t RVS-SL” is the controller delay time plus the blanking time. Reverse Blanking Timer: BK Connecting an external resistor ( ) between the BK pin and ground will increase the blanking time as shown in the following chart. BKR Where: Ω ≤K RBK 200 If BK is connected to VC for slave mode operation, then the blanking time will be about 320ns typically, and total delay time will be 430ns. The reverse comparator has 3mV of hysteresis referenced to SP-SN. If the conditions are met for a reverse current fault, then the active-low fault flag output will also indicate a fault to the system after the 40µs fault delay time.

Picor Corporation • picorpower.com PI2121 Rev. 1.0 Page 7 of 21 Forward Voltage Comparator: FWD The FWD comparator detects when a forward current condition exists and SP is 6mV positive with respect to SN. When SP-SN is less than 6mV, the FWD comparator will assert the Fault flag to report a fault condition indicative of a light load “load not present” condition or possible shorted MOSFET. Forward Over Current Comparator: FOC The FOC comparator indicates an excessive forward current condition when SP is 66mV (typical) higher than SN. When the FET is in the on-state and SP- SN is higher than 66mV (typical) the PI2121 will initiate a fault condition via the FT pin. Slave: In high current applications that exceed the single PI2121 current handling capability, multiple PI2121’s can be paralleled and synchronized by using the slave function. The Slave function synchronizes multiple PI2121’s together and allows for localized control of each paralleled MOSFET. One PI2121 will be designated as the master and it will control the response of the slaved PI2121’s. When the PI2121 is configured in the “Master Mode” by connecting the BK to ground, the SL will be an output having the same signal characteristics as the internal Gate Driver. In this configuration, the SL output is capable of driving up to ten PI2121’s, configured in “Slave Mode”, through their corresponding SL pins. Logic high for the SL pin is limited to 5.5V (max). When the BK pin is tied to VC, the PI2121 becomes a slave and the SL pin will be an input. The internal Gate driver section and reverse current section are the only active circuits in the slaved PI2121 while the master performs the diagnostics and gate drive control. VC and Internal Voltage Regulator: The PI2121 has a separate input (VC) that provides power to the control circuitry and the internal gate driver. An internal regulator clamps the VC voltage to 15.5V. For high side applications, the VC input should be 5V above the bus voltage to properly enhance the internal N-channel MOSFET. The internal regulator circuit has a comparator to monitor the VC voltage and initiates a FAULT condition when VC is lower than the VC Under- Voltage Threshold UV: The Under-Voltage (UV) input trip point can be programmed through an external resistor divider to monitor the input voltage. The UV comparator initiates a fault condition and pulls the FT pin low, when UV falls below the Under-Voltage Falling Threshold. If the PI2121 is configured in a floating application, where the GND pin is connected to the input voltage, the UV pin cannot detect the input voltage. In this case, the UV pin should be disabled by connecting it to the VC pin. OV: The Over-Voltage (OV) input trip point can be programmed through an external resistor divider to monitor the input voltage. The OV comparator initiates a fault condition and pulls the FT pin low when OV rises above the Over-Voltage Rising Threshold. If the PI2121 is configured in a floating application, where the GND pin is connected to the input voltage, the OV pin cannot detect the input voltage. In this case, the OV pin should be disabled by connecting it to the controller GND pin. Over-Temperature Detection: The internal Over-Temperature block monitors the junction temperature of the controller. The over- temperature threshold is set to 160 °C with -10 °C of hysteresis. When the controller temperature exceeds this threshold, the over-temperature circuit initiates a fault condition and pulls the FT pin low. Fault: The fault circuit output is an open collector with 40μs delay to prevent any false triggering. The FT pin will be pulled low when any of the following faults occur:

  • Reverse Current
  • Forward Over-Current
  • Forward Low Current
  • Over-Temperature
  • Input Under-Voltage
  • Input Over-Voltage
  • VC pin Under-Voltage A gate voltage detector prevents FOC or FWD from initiating a fault when the MOSFET is in an OFF condition. The only fault condition that initiates gate turn-off of the MOSFET (as well as a fault flag signal) is when the reverse current fault conditions are met. All other fault conditions issue only a fault flag signal via the

Picor Corporation • picorpower.com PI2121 Rev. 1.0 Page 9 of 21 Figure 5: Timing diagram for two PI2121 solutions in an Active ORing application

Picor Corporation • picorpower.com PI2121 Rev. 1.0 Page 10 of 21 Figure 6: PI2121 State diagram, master mode.

Picor Corporation • picorpower.com PI2121 Rev. 1.0 Page 13 of 21 Figure 18: Plot of PI2121 response time to reverse current detection (Example 1, Figure 22)

Application Information

The PI2121 is designed to replace ORing diodes in high current, low voltage redundant power architectures. Replacing a traditional diode with a PI2121 will result in significant power dissipation reduction as well as board space reduction, efficiency improvement and additional protection features. This section describes in detail the procedure to follow when designing with the PI2121 Active ORing solution. Two Active ORing design examples are presented. Fault Indication: The FT output pin is an open collector and should be pulled up to the logic voltage or to the controller VC via a resistor (10KΩ). Blanking Timer: Connect the blanking time r pin (BK) to GND to program the device for the fastest reverse comparator response time of 160ns typical. To increase the blanking time, connect the BK pin to GND via a resistor to avoid the fault response to short reverse current pulses. Refer to the plot in the reverse comparator functional description for resistor values versus the reverse blanking time. Auxiliary Power Supply (Vaux): Vaux is an independent pow er source required to supply power to the VC input. The Vaux voltage should be 5V higher than Vin (redundant power source output voltage) to fully enhance the internal MOSFET.

Picor Corporation • picorpower.com PI2121 Rev. 1.0 Page 14 of 21 A bias resistor (Rbias) is required if Vaux is higher than 15V. Rbias should be connected between the VC pin and Vaux. Minimize the resistor value for low Vaux voltage levels to avoid a voltage drop that may reduce the VC voltage lower than required to drive the gate of the internal MOSFET. Select the value of Rbias using the following equations: max min IC VCVaux Rbias clamp− Rbias maximum power dissipation: Rbias VCVaux Pd clamp Rbias max )( − Where: minVaux : Vaux minimum voltage maxVaux : Vaux maximum voltage ClampVC : Controller clamp voltage, 15.5V maxIC : Controller maximum bias current, use 4.2mA Example: Vaux 20V to 30V Ω =−= = KmA V V IC VCVaux Rbias clamp 07 . 12 . 4 5 . 15 20 max min mWK V V Rbias VCVauxPd clamp Rbias 19607 . 1 ) 5 . 15 30 ()( 22 max −=−= Internal N-Channel MOSFET BVdss: The PI2121’s internal N-Channel MOSFET breakdown voltage (BVdss) is rated for 8V at 25°C and will degrade at -40°C to 7.75V, refer to Figure 10. In an application when the MOSFET is turned off due to a reverse fault, the series parasitic elements in the circuit may contribute to the MOSFET being exposed to a voltage higher than its voltage rating. In Active ORing applications when one of the input power sources is shorted, a large reverse current is sourced from the circuit output through the MOSFET. Depending on the output impedance of the system, the reverse current may reach over 60A in some conditions before the MOSFET is turned off. Such high current condition s will store energy even in a small parasitic element. For example: a 1nH parasitic inductance with 60A reverse current will generate 1.8µJ (½Li 2). When the MOSFET is turned off, the stored energy will be released and produce a high negative voltage ringing at the MOSFET source. At the same time the energy stored at the drain side of the internal MOSFET will be released and produce a voltage higher than the load voltage. This event will create a high voltage difference between the drain and source of the MOSFET. To reduce the magnitude of the ringing voltage, add a ceramic capacitor very close to the source that can react to the voltage ringing frequency and another capacitor close to the drain. Recommended values for the ceramic capacitors are 1µF, refer to C5 and C7 in Figure 24. Slave: For a high current application where one PI2121 can not handle the total load current, multiple PI2121’s can be paralleled in a master / slave configuration to support the total current per input. In the Master / Slave mode, one PI2121 is configured as the master and the rest are configured as slaves. The slave SL ) pin of the master unit will act as an output driving the units configur ed in slave mode. The SL pins of the slave units will act as inputs under the control of the master. Tie the BK pin to VC to configure the unit in slave mode. Power dissipation: In Active ORing circuits the MOSFET is always on in steady state operation and the power dissipation is derived from the total source current and the on- state resistance of the internal MOSFET. The PI2121 internal MOSFET power dissipation can be calculated with the following equation: ) (2 on Rds IsPdMOSFET ∗ = Where: Is : Source Current Rds(on) : MOSFET on-state resistance Note: Calculate with Rds(on) at maximum MOSFET temperature because Rds(on) is temperature dependent. Refer to figure 11 for normalized Rds(on) values over temperature. PI2121 nominal Rds(on) at 25°C is 1.5m Ω and will increase by 40% at 125°C junction temperature. The Junction Temperature rise is a function of power dissipation and thermal resistance. ) (2 on Rds Is RthPd Rth TriseJAMOSFETJA ∗ ∗ = ∗ =, Where: JARth : Junction-to-Ambient thermal resistance (54°C/Watt)(3)

Picor Corporation • picorpower.com PI2121 Rev. 1.0 Page 16 of 21 Typical Application Example 1: Requirement: Redundant Bus Voltage = 3.3V Load Current = 20A (assume through each redundant path) Maximum Ambient Temperature = 60°C, no air flow Auxiliary Voltage = 12V (10V to 14V) Solution: A single PI2121 for each redundant 3.3V power source should be used, configured as shown in the circuit schematic in Figure 22. Vaux: Since the Vaux voltage does not exceed the VC pin clamp voltage, connect the Vaux directly to the VC pin SP and SN pins: Connect each SP pin to the S pins and each SN pin to the D pins BK pin: Connect the BK pin to ground to achieve the minimum reverse current response time. SL pin: Not required, so leave floating FT pin: Connect to the logic input and to the logic power supply via a 10KΩ resistor. Program UV and OV to monitor input voltage: Program UV at 3.0V and OV at 3.6V Use the three-resistor divider configuration: A IRa μ200= Ω = =kA mVRa 5 . 2200 500 μ or 2.49kΩ 1% Ω =⎟ ⎛ − Ω =498 10 . 3 6 . 349 . 2 V Vk Rb or 499Ω 1% () Ω =⎟ ⎛ −Ω + Ω = kmV Vk Rc 95 . 14 1500 0 . 3499 49 . 2 or 15kΩ 1% Power Dissipation and Junction Temperature: First use Figure 13 (Junction Temperature vs. Input Current) to find the final junction temperature for 20A load current at 60°C ambient temperature. In Figure 13 (illustrated in Figure 21) draw a vertical line from 20A to intersect the 60°C ambient temperature line. At the intersection draw a horizontal line towards the Y-axis (Junction Temperature). The Junction Temperature at full load current (20A) and 60°C ambient is 118°C. Rds(on) is 2.0m Ω maximum at 25°C and will increase as the Junction temperature increases. From Figure 11, at 118°C Rds(on) will increase by ~35%, then Ω=∗Ω= mm on Rds 7 . 2 35 . 1 0 . 2 ) ( maximum at 118°C Maximum power dissipation is: W m A on Rds Iin Pd08 . 1 7 . 2 ) 20 ( ) (22 max = Ω ∗ = ∗ = Recalculate TJ: Cm AW CC TJ ° =⎟ max Figure 21: Example 1 final junction temperature at 20A/60°C TA Reverse Current Threshold: The following procedure demonstrates how to calculate the minimum required reverse current in the internal MOSFET to generate a reverse fault condition and turn off the internal MOSFET. At room temperature (25°C) typical Rds(on): Am mV on Rds reverse Vthreverse Is 45 . 1 ) ( .. − =Ω −== At maximum junction temperature (118°C) and maximum Rds(on): Am mV on Rds reverse Vthreverse Is 2 . 27 . 2 ) ( .. − =Ω −==

Picor Corporation • picorpower.com PI2121 Rev. 1.0 Page 18 of 21 Figure 23: PI2121 used in a 100A Active ORing application (master/slave configuration)

Picor Corporation • picorpower.com PI2121 Rev. 1.0 Page 20 of 21 Package Drawing Thermal Resistance Ratings Parameter Symbol Typical Max Unit Junction-to-Ambient (3) θJA 54 - °C/W θJCJunction-to-PCB 14 - °C/W Note 3: Thermal resistance characterized on PI2121-EVAL1 evaluation board with 0 LFM airflow.

Ordering Information

Part Number Package Transport Media PI2121-00-LGIZ 5x7mm 17-pin LGA Tape & Reel

Picor Corporation • picorpower.com PI2121 Rev. 1.0 Page 21 of 21 Warranty Vicor products are guaranteed for two years from date of shipment against defects in material or workmanship when in normal use and service. This warranty does not extend to products subjected to misuse, accident, or improper application or maintenance. Vicor shall not be liable for collateral or consequential damage. This warranty is extended to the original purchaser only. EXCEPT FOR THE FOREGOING EXPRESS WARRANTY, VICOR MAKES NO WARRANTY, EXPRESS OR LIMITED, INCLUDING, BUT NOT LIMITED TO, THE WARRANTY OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Vicor will repair or replace defective products in accordance with its own best judgment. For service under this warranty, the buyer must contact Vicor to obtain a Return Material Authorization (RMA) number and shipping instructions. Products returned without prior authorization will be returned to the buyer. The buyer will pay all charges incurred in returning the product to the factory. Vicor will pay all reshipment charges if the product was defective within the terms of this warranty. Information published by Vicor has been carefully checked and is believed to be accurate; however, no responsibility is assumed for inaccuracies. Vicor reserves the right to make changes to any products without further notice to improve reliability, function, or design. Vicor does not assume any liability arising out of the application or use of any product or circuit; neither does it convey any license under its patent rights nor the rights of others. Vicor general policy does not recommend the use of its components in life support applications wherein a failure or malfunction may directly threaten life or injury. Per Vicor Terms and Conditions of Sale, the user of Vicor components in life support applications assumes all risks of such use and indemnifies Vicor against all damages. Vicor’s comprehensive line of power solutions includes high density AC-DC and DC-DC modules and accessory components, fully configurable AC-DC and DC-DC power supplies, and complete custom power systems. Information furnished by Vicor is believed to be accurate and reliable. However, no responsibility is assumed by Vicor for its use. Vicor components are not designed to be used in applications, such as life support systems, wherein a failure or malfunction could result in injury or death. All sales are subject to Vicor’s Terms and Conditions of Sale, which are available upon request. Specifications are subject to change without notice. Vicor Corporation Picor Corporation

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