PHX3055E PHILIPS

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Philips Semiconductors Product specification N-channel TrenchMOS transistor PHX3055E FEATURES SYMBOL QUICK REFERENCE DATA

  • ’Trench’ technology
  • Low on-state resistance VDSS = 55 V
  • Fast switching
  • Isolated mounting tab ID = 9 A R DS(ON) ≤ 150 mΩ (VGS = 10 V) GENERAL DESCRIPTION PINNING SOT186A N-channel enhancement mode, PIN DESCRIPTION field-effect power transistor in a plastic envelope with an electrically 1 gate isolated mounting tab. The device uses ’trench’ technology to achieve 2 drain low on-state resistance. 3 source Applications:-
  • d.c. to d.c. converters tab isolated
  • switched mode power supplies The PHX3055E is supplied in the SOT186A (isolated TO220AB) conventional leaded package. LIMITING VALUES Limiting values in accordance with the Absolute Maximum System (IEC 134) SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT VDSS Drain-source voltage T j = 25 ˚C to 150˚C - 55 V VDGR Drain-gate voltage T j = 25 ˚C to 150˚C; RGS = 20 kΩ -5 5 V VGS Gate-source voltage - ± 20 V ID Continuous drain current Ths = 25 ˚C - 9 A Ths = 100 ˚C - 5.6 A IDM Pulsed drain current T hs = 25 ˚C - 36 A PD Total power dissipation T hs = 25 ˚C - 21 W Tj, Tstg Operating junction and - 55 150 ˚C storage temperature ISOLATION LIMITING VALUE & CHARACTERISTIC Ths = 25 ˚C unless otherwise specified SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT Visol R.M.S. isolation voltage from all f = 50-60 Hz; sinusoidal - 2500 V three terminals to external waveform; heatsink R.H. ≤ 65% ; clean and dustfree C isol Capacitance from T2 to external f = 1 MHz - 10 - pF heatsink d g s 123 case August 1999 1 Rev 1.000

Philips Semiconductors Product specification N-channel TrenchMOS transistor PHX3055E AVALANCHE ENERGY LIMITING VALUES Limiting values in accordance with the Absolute Maximum System (IEC 134) SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT EAS Non-repetitive avalanche Unclamped inductive load, IAS = 3.3 A; - 25 mJ energy t p = 220 µs; Tj prior to avalanche = 25˚C; VDD ≤ 25 V; RGS = 50 Ω ; VGS = 10 V; refer to fig:15 IAS Peak non-repetitive - 9 A avalanche current THERMAL RESISTANCES SYMBOL PARAMETER CONDITIONS TYP. MAX. UNIT R th j-hs Thermal resistance junction - 6 K/W to heatsink R th j-a Thermal resistance junction 55 - K/W to ambient

ELECTRICAL CHARACTERISTICS

Tj= 25˚C unless otherwise specified SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT V(BR)DSS Drain-source breakdown V GS = 0 V; ID = 0.25 mA; 55 - - V voltage T j = -55˚C 50 - - V VGS(TO) Gate threshold voltage V DS = VGS ; ID = 1 mA 2.0 3.0 4.0 V Tj = 150˚C 1.1 - - V Tj = -55˚C - - 6 V R DS(ON) Drain-source on-state V GS = 10 V; ID = 5.5 A - 120 150 m Ω resistance T j = 150˚C - 210 263 m Ω gfs Forward transconductance VDS = 25 V; ID = 5.5 A 1.5 3.2 - S IGSS Gate source leakage current VGS = ±10 V; VDS = 0 V - 10 100 nA IDSS Zero gate voltage drain V DS = 55 V; VGS = 0 V; - 0.05 10 µA current T j = 150˚C - - 100 µA Q g(tot) Total gate charge I D = 10 A; VDD = 44 V; VGS = 10 V - 5.8 - nC Q gs Gate-source charge - 1.5 - nC Q gd Gate-drain (Miller) charge - 3.2 - nC td on Turn-on delay time V DD = 30 V; RD = 2.7 Ω ;- 3 1 0 n s tr Turn-on rise time R G = 5.6 Ω ; VGS = 10 V - 26 35 ns td off Turn-off delay time Resistive load - 8 15 ns tf Turn-off fall time - 10 20 ns Ld Internal drain inductance Measured from drain lead to centre of die - 4.5 - nH Ls Internal source inductance Measured from source lead to source - 7.5 - nH bond pad C iss Input capacitance V GS = 0 V; VDS = 25 V; f = 1 MHz - 190 250 pF C oss Output capacitance - 55 80 pF C rss Feedback capacitance - 40 50 pF August 1999 2 Rev 1.000

Philips Semiconductors Product specification N-channel TrenchMOS transistor PHX3055E REVERSE DIODE LIMITING VALUES AND CHARACTERISTICS Tj = 25˚C unless otherwise specified SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT IS Continuous source current - - 9 A (body diode) ISM Pulsed source current (body - - 36 A diode) VSD Diode forward voltage I F = 10 A; VGS = 0 V - 1.1 1.5 V trr Reverse recovery time I F = 10 A; -dIF/dt = 100 A/µs; - 32 - ns Q rr Reverse recovery charge V GS = 0 V; VR = 30 V - 50 - nC August 1999 3 Rev 1.000

Philips Semiconductors Product specification N-channel TrenchMOS transistor PHX3055E Fig.1. Normalised power dissipation. PD% = 100⋅PD /PD 25 ˚C = f(Ths) Fig.2. Normalised continuous drain current. ID% = 100⋅ID /ID 25 ˚C = f(Ths); conditions: VGS ≥ 10 V Fig.3. Safe operating area. Tmb = 25 ˚C ID & IDM = f(VDS ); IDM single pulse; parameter tp Fig.4. Transient thermal impedance. Zth j-hs = f(t); parameter D = tp/T Fig.5. Typical output characteristics, Tj = 25 ˚C. ID = f(VDS ) Fig.6. Typical on-state resistance, Tj = 25 ˚C. R DS(ON) = f(ID ) Normalised Power Derating, PD (%) 100 0 25 50 75 100 125 150 Heatsink temperature, Ths (C) 0.1 1E-06 1E-05 1E-04 1E-03 1E-02 1E-01 1E+00 1E+01 Pulse width, tp (s) Transient thermal impedance, Zth j-hs (K/W) single pulse D = 0.5 0.2 0.1 0.05 0.02 tp D = tp/TDP T Normalised Current Derating, ID (%) 100 0 25 50 75 100 125 150 Heatsink temperature, Ths (C) Drain-Source Voltage, VDS (V) Drain Current, ID (A) 5.5 V Tj = 25 C VGS = 10V 6 V 6.5 V 7 V 4.5 V 8 V 5 V 0.1 100 1 10 100 Drain-Source Voltage, VDS (V) Peak Pulsed Drain Current, IDM (A) D.C. 100 ms 10 ms RDS(on) = VDS/ ID 1 ms tp = 10 us 100 us 0.05 0.1 0.15 0.2 0.25 0.3 0.35 0.4 0.45 0.5 0123456789 1 0 Drain Current, ID (A) Drain-Source On Resistance, RDS(on) (Ohms) VGS = 10V Tj = 25 C 7 V 8 V 6.5 V 6 V 5.5V5 V August 1999 4 Rev 1.000

Philips Semiconductors Product specification N-channel TrenchMOS transistor PHX3055E Fig.7. Typical transfer characteristics. ID = f(VGS ) Fig.8. Typical transconductance, Tj = 25 ˚C. gfs = f(ID ) Fig.9. Normalised drain-source on-state resistance. R DS(ON) /RDS(ON)25 ˚C = f(Tj) Fig.10. Gate threshold voltage. VGS(TO) = f(Tj); conditions: ID = 1 mA; VDS = VGS Fig.11. Sub-threshold drain current. ID = f(VGS); conditions: Tj = 25 ˚C; VDS = VGS Fig.12. Typical capacitances, Ciss, Coss, Crss. C = f(VDS ); conditions: VGS = 0 V; f = 1 MHz 0123456789 1 0 Gate-source voltage, VGS (V) Drain current, ID (A) VDS > ID X RDS(ON) Tj = 25 C 175 C Threshold Voltage, VGS(TO) (V) 0.5 1.5 2.5 3.5 4.5 -60 -40 -20 0 20 40 60 80 100 120 140 160 180 Junction Temperature, Tj (C) typical maximum minimum 0.5 1.5 2.5 3.5 0123456789 1 0 Drain current, ID (A) Transconductance, gfs (S) Tj = 25 C 175 C VDS > ID X RDS(ON) Drain current, ID (A) 1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01 Gate-source voltage, VGS (V) minimum typical maximum Normalised On-state Resistance 0.2 0.4 0.6 0.8 1.2 1.4 1.6 1.8 2.2 2.4 -60 -40 -20 0 20 40 60 80 100 120 140 160 180 Junction temperature, Tj (C) 100 1000 0.1 1 10 100 Drain-Source Voltage, VDS (V) Capacitances, Ciss, Coss, Crss (pF) Ciss Coss Crss August 1999 5 Rev 1.000

Philips Semiconductors Product specification N-channel TrenchMOS transistor PHX3055E Fig.13. Typical turn-on gate-charge characteristics. VGS = f(QG ) Fig.14. Typical reverse diode current. IF = f(VSDS ); conditions: VGS = 0 V; parameter Tj Fig.15. Maximum permissible non-repetitive avalanche current (IAS ) versus avalanche time (tAV ); unclamped inductive load 012345678 Gate charge, QG (nC) Gate-source voltage, VGS (V) ID = 10A Tj = 25 C VDD = 11 V VDD = 44 V 0.1 100 0.001 0.01 0.1 1 10 Avalanche time, tAV (ms) Maximum Avalanche Current, IAS (A) Tj prior to avalanche = 125 C 25 C Source-Drain Voltage, VSDS (V) Source-Drain Diode Current, IF (A) Tj = 25 C 175 C VGS = 0 V August 1999 6 Rev 1.000

Philips Semiconductors Product specification N-channel TrenchMOS transistor PHX3055E MECHANICAL DATA Dimensions in mm Net Mass: 2 g Fig.16. SOT186A; The seating plane is electrically isolated from all terminals. Notes 1. Observe the general handling precautions for electrostatic-discharge sensitive devices (ESDs) to prevent damage to MOS gate oxide. 2. Refer to mounting instructions for F-pack envelopes. 3. Epoxy meets UL94 V0 at 1/8". REFERENCESOUTLINE VERSION EUROPEAN PROJECTION ISSUE DATE IEC JEDEC EIAJ SOT186A TO-220 0 5 10 mm scale Plastic single-ended package; isolated heatsink mounted; 1 mounting hole; 3 lead TO-220 SOT186A A Q c K j Notes 1. Terminal dimensions within this zone are uncontrolled. Terminals in this zone are not tinned. 2. Both recesses are ∅ 2.5 × 0.8 max. depth D D 1 L L2 L1 e b w M 1 23 q E P T UNIT Db1 D 1 e qQPLc L2 (1) max. e1A 5.08 3mm 4.6 4.0 A 1 2.9 2.5 b 0.9 0.7 1.1 0.9 1.4 1.2 0.7 0.4 15.8 15.2 6.5 6.3 E 10.3 9.7 2.54 14.4 13.5 T (2) 2.5 0.4 3.30 2.79 j 2.7 2.3 K 0.6 0.4 2.6 2.3 3.0 2.6 w 3.2 3.0 DIMENSIONS (mm are the original dimensions) 97-06-11 August 1999 7 Rev 1.000

Philips Semiconductors Product specification N-channel TrenchMOS transistor PHX3055E DEFINITIONS Data sheet status Objective specification This data sheet contains target or goal specifications for product development. Preliminary specification This data sheet contains preliminary data; supplementary data may be published later. Product specification This data sheet contains final product specifications. Limiting values Limiting values are given in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of this specification is not implied. Exposure to limiting values for extended periods may affect device reliability.

Application information

Where application information is given, it is advisory and does not form part of the specification.  Philips Electronics N.V. 1999 All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, it is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent or other industrial or intellectual property rights. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices or systems where malfunction of these products can be reasonably expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale. August 1999 8 Rev 1.000