PHP50N03T

PHP50N03T PHILIPS | Alldatasheet

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Technical content

Philips Semiconductors Product specification TrenchMOS  transistor PHP50N03T Standard level FET GENERAL DESCRIPTION QUICK REFERENCE DATA N-channel enhancement mode SYMBOL PARAMETER MAX. UNIT standard level field-effect power transistor in a plastic envelope using VDS Drain-source voltage 30 V ’trench’ technology. The device I D Drain current (DC) 50 A features very low on-state resistance Ptot Total power dissipation 94 W and has integral zener diodes giving Tj Junction temperature 175 ˚C ESD protection up to 2kV. It is R DS(ON) Drain-source on-state 21 m Ω intended for use in DC-DC resistance V GS = 10 V converters and general purpose switching applications. PINNING - TO220AB PIN CONFIGURATION SYMBOL PIN DESCRIPTION 1 gate 2 drain 3 source tab drain LIMITING VALUES Limiting values in accordance with the Absolute Maximum System (IEC 134) SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT VDS Drain-source voltage - - 30 V VDGR Drain-gate voltage R GS = 20 kΩ -3 0V ±VGS Gate-source voltage - - 20 V ID Drain current (DC) T mb = 25 ˚C - 50 A ID Drain current (DC) T mb = 100 ˚C - 29 A IDM Drain current (pulse peak value) Tmb = 25 ˚C - 200 A Ptot Total power dissipation T mb = 25 ˚C - 94 W Tstg, Tj Storage & operating temperature - - 55 175 ˚C THERMAL RESISTANCES SYMBOL PARAMETER CONDITIONS TYP. MAX. UNIT R th j-mb Thermal resistance junction to - - 1.6 K/W mounting base R th j-a Thermal resistance junction to in free air 60 - K/W ambient ESD LIMITING VALUE SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT VC Electrostatic discharge capacitor Human body model - 2 kV voltage, all pins (100 pF, 1.5 k Ω ) d g s12 3 tab September 1997 1 Rev 1.100

Philips Semiconductors Product specification TrenchMOS transistor PHP50N03T Standard level FET STATIC CHARACTERISTICS Tj= 25˚C unless otherwise specified SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT V(BR)DSS Drain-source breakdown V GS = 0 V; ID = 0.25 mA; 30 - - V voltage T j = -55˚C 27 - - V VGS(TO) Gate threshold voltage V DS = VGS ; ID = 1 mA 2.0 3.0 4.0 V Tj = 175˚C 1.0 - - V IDSS Zero gate voltage drain current VDS = 30 V; VGS = 0 V; - 0.05 10 µA Tj = 175˚C - - 500 µA IGSS Gate source leakage current VGS = ±10 V; VDS = 0 V - 0.02 1 µA Tj = 175˚C - - 20 µA ±V(BR)GSS Gate source breakdown voltage IG = ±1 mA; 16 - - V R DS(ON) Drain-source on-state V GS = 10 V; ID = 25 A - 19 21 m Ω resistance T j = 175˚C - - 39 m Ω DYNAMIC CHARACTERISTICS Tj = 25˚C unless otherwise specified SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT gfs Forward transconductance V DS = 25 V; ID = 25 A 6 19 - S Q g(tot) Total gate charge I D = 25 A; VDD = 30 V; VGS = 10 V - 28 - nC Q gs Gate-source charge - 7 - nC Q gd Gate-drain (Miller) charge - 11 - nC C iss Input capacitance V GS = 0 V; VDS = 25 V; f = 1 MHz - 974 - pF C oss Output capacitance - 325 - pF C rss Feedback capacitance - 152 - pF td on Turn-on delay time V DD = 30 V; ID = 25 A; - 10 - ns tr Turn-on rise time V GS = 10 V; RG = 10 Ω -4 5-n s td off Turn-off delay time Resistive load - 30 - ns tf Turn-off fall time - 32 - ns Ld Internal drain inductance Measured from contact screw on - 3.5 - nH tab to centre of die Ld Internal drain inductance Measured from drain lead 6 mm - 4.5 - nH from package to centre of die Ls Internal source inductance Measured from source lead 6 mm - 7.5 - nH from package to source bond pad REVERSE DIODE LIMITING VALUES AND CHARACTERISTICS Tj = 25˚C unless otherwise specified SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT IDR Continuous reverse drain - - 50 A current IDRM Pulsed reverse drain current - - 200 A VSD Diode forward voltage I F = 25 A; VGS = 0 V - 0.95 1.2 V IF = 50 A; VGS = 0 V - 1.0 - trr Reverse recovery time I F = 25 A; -dIF/dt = 100 A/µs; - 100 - ns Q rr Reverse recovery charge V GS = -10 V; VR = 25 V - 0.4 - µC September 1997 2 Rev 1.100

Philips Semiconductors Product specification TrenchMOS transistor PHP50N03T Standard level FET AVALANCHE LIMITING VALUE SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT W DSS Drain-source non-repetitive ID = 25 A; VDD ≤ 25 V; - - 70 mJ unclamped inductive turn-off VGS = 10 V; RGS = 50 Ω ; Tmb = 25 ˚C energy Fig.1. Normalised power dissipation. PD% = 100⋅PD /PD 25 ˚C = f(Tmb ) Fig.2. Normalised continuous drain current. ID% = 100⋅ID /ID 25 ˚C = f(Tmb ); conditions: VGS ≥ 5 V Fig.3. Safe operating area. Tmb = 25 ˚C ID & IDM = f(VDS ); IDM single pulse; parameter tp Fig.4. Transient thermal impedance. Zth j-mb = f(t); parameter D = tp/T 0 20 40 60 80 100 120 140 160 180 Tmb / C PD% Normalised Power Derating120 110 100 1 10 100 100

1000 PHP50N03T

VDS, Drain-source voltage (Volts) ID, Drain current (Amps) RDS(ON) = VDS/ID tp = 10 us 100 us 1 ms 10 ms DC Tmb = 25 C 0 20 40 60 80 100 120 140 160 180 Tmb / C ID% Normalised Current Derating 120 110 100 0.2 0.1 0.05 0.02 0.5 PHP50N03T 1us 10us 100us 1ms 10ms 0.1s 1s 10s0.01 0.1 pulse width, tp (s) Transient thermal impedance, Zth j-mb (K/W) D = tp tp T TP t D D = September 1997 3 Rev 1.100

Philips Semiconductors Product specification TrenchMOS transistor PHP50N03T Standard level FET Fig.5. Typical output characteristics, Tj = 25 ˚C. ID = f(VDS ); parameter VGS Fig.6. Typical on-state resistance, Tj = 25 ˚C. R DS(ON) = f(ID ); parameter VGS Fig.7. Typical transfer characteristics. ID = f(VGS ); parameter Tj Fig.8. Typical transconductance, Tj = 25 ˚C. gfs = f(ID ) Fig.9. Normalised drain-source on-state resistance. a = RDS(ON) /RDS(ON)25 ˚C = f(Tj); ID = 25 A; VGS = 5 V Fig.10. Gate threshold voltage. VGS(TO) = f(Tj); conditions: ID = 1 mA; VDS = VGS 0 5 10 15 20 25 30 VGS = 4 V 4.5 V 5 V 5.5 V 6 V 6.5 V PHP50N03T VDS, Drain-Source voltage (Volts) ID, Drain current (Amps) 10 V

20 V Tj = 25 C

Drain current, ID (A) Transconductance, gfs (S) VDS = 30 V 175 C Tj = 25 C 0 1 02 03 04 05 0 0.01 0.02 0.03 0.04 0.05

0.06 PHP50N03T

ID, Drain current (Amps) RDS(on), Drain-Source on resistance (Ohms) VGS = 4 V 4.5 V 5 V 5.5 V 10 V Tj = 25 C 20 V -100 -50 0 50 100 150 200 0.5 1.5

2.5 BUK959-60

Rds(on) normlised to 25degC 02468 1 0 PHP50N03T Gate-source voltage, VGS (V) Drain current, ID (A) VDS = 30 V

175 C Tj = 25 C

-100 -50 0 50 100 150 2000 Tj / C VGS(TO) / V max. typ. min. September 1997 4 Rev 1.100

Philips Semiconductors Product specification TrenchMOS transistor PHP50N03T Standard level FET Fig.11. Sub-threshold drain current. ID = f(VGS); conditions: Tj = 25 ˚C; VDS = VGS Fig.12. Typical capacitances, Ciss, Coss, Crss. C = f(VDS ); conditions: VGS = 0 V; f = 1 MHz Fig.13. Typical turn-on gate-charge characteristics. VGS = f(QG ); parameter VDS Fig.14. Typical reverse diode current. IF = f(VSDS ); parameter Tj Fig.15. Normalised avalanche energy rating. W DSS % = f(Tmb ) Fig.16. Avalanche energy test circuit. 0123451E-06 1E-05 1E-04 1E-03 1E-02 1E-01 Sub-Threshold Conduction typ2% 98% PHP50N03T Source-Drain voltage, VSDS (V) Source-Drain diode current, IF(A) VGS = 0 V

10000 PHP50N03T

Drain-source voltage, VDS (V) Capacitances, Ciss, Coss, Crss (pF) Ciss Coss Crss 20 40 60 80 100 120 140 160 180 Tmb / C 120 110 100 WDSS% 0 1 02 03 04 05 06 0 PHP50N03T Qg, Gate charge (nC) VGS, Gate-Source voltage (Volts) VDD = 30 V ID = 25 A Tj = 25 C L T.U.T. VDD RGS R 01 VDS -ID/100 shunt VGS W DSS = 0.5⋅LID 2 ⋅BV DSS /(BV DSS − VDD ) September 1997 5 Rev 1.100

Philips Semiconductors Product specification TrenchMOS transistor PHP50N03T Standard level FET MECHANICAL DATA Dimensions in mm Net Mass: 2 g Fig.17. TO220AB; pin 2 connected to mounting base. Notes 1. Observe the general handling precautions for electrostatic-discharge sensitive devices (ESDs) to prevent damage to MOS gate oxide. 2. Refer to mounting instructions for TO220 envelopes. 3. Epoxy meets UL94 V0 at 1/8". 10,3 max 3,7 2,8 3,03,0 max not tinned 1,3 max (2x) 123 2,4 0,6 4,5 max 5,9 min 15,8 max 1,3 2,54 2,54 0,9 max (3x) 13,5 min September 1997 6 Rev 1.100

Philips Semiconductors Product specification TrenchMOS transistor PHP50N03T Standard level FET DEFINITIONS Data sheet status Objective specification This data sheet contains target or goal specifications for product development. Preliminary specification This data sheet contains preliminary data; supplementary data may be published later. Product specification This data sheet contains final product specifications. Limiting values Limiting values are given in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of this specification is not implied. Exposure to limiting values for extended periods may affect device reliability.

Application information

Where application information is given, it is advisory and does not form part of the specification.  Philips Electronics N.V. 1997 All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, it is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent or other industrial or intellectual property rights. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices or systems where malfunction of these products can be reasonably expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale. September 1997 7 Rev 1.100