PHP36N03LT

PHD36N03LT PHILIPS | Alldatasheet

Document overview

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Technical content

1.1 General description

package using TrenchMOS technology.

1.2 Features

1.3 Applications

1.4 Quick reference data

[1] It is not possible to make a connection to pin 2 of the SOT428 package. Table 1. Pinning

PHD_PHP36N03LT_2 © Koninklijke Philips Electronics N.V. 2006. All rights reserved. Table 2. Ordering information Table 3. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134).

PHD_PHP36N03LT_2 © Koninklijke Philips Electronics N.V. 2006. All rights reserved. Product data sheet Rev. 02 — 8 June 2006 3 of 13 Philips Semiconductors PHD/PHP36N03LT N-channel TrenchMOS logic level FET Fig 1. Normalized total power dissipation as a function of mounting base temperature Fig 2. Normalized continuous drain current as a function of mounting base temperature Tmb =2 5°C; IDM is single pulse; VGS =1 0V Fig 3. Safe operating area; continuous and peak drain currents as a function of drain-source voltage 03aa16 120 0 50 100 150 200 Tmb (°C) Pder (%) 03aa24 120 0 50 100 150 200 Tmb (°C) Ider (%) P der P tot P tot 25°C() ID ID2 5 °C() 001aae811 VDS (V) 1 10210 102 103 ID (A) Limit RDSon = VDS / ID tp = 10 ms 100 ms 1 ms DC

PHD_PHP36N03LT_2 © Koninklijke Philips Electronics N.V. 2006. All rights reserved. [1] Mounted on a printed-circuit board; vertical in still air. Table 4. Thermal characteristics

PHD_PHP36N03LT_2 © Koninklijke Philips Electronics N.V. 2006. All rights reserved. Table 5. Characteristics Tj=2 5°C unless otherwise specified.

PHD_PHP36N03LT_2 © Koninklijke Philips Electronics N.V. 2006. All rights reserved. Product data sheet Rev. 02 — 8 June 2006 6 of 13 Philips Semiconductors PHD/PHP36N03LT N-channel TrenchMOS logic level FET Tj=2 5°CT j=2 5°C Fig 5. Output characteristics: drain current as a function of drain-source voltage; typical values Fig 6. Drain-source on-state resistance as a function of drain current; typical values Tj=2 5°C and 175°C; VDS >ID × R DSon Fig 7. Transfer characteristics: drain current as a function of gate-source voltage; typical values Fig 8. Normalized drain-source on-state resistance factor as a function of junction temperature VDS (V) 001aae812 I D (A) VGS (V) = 2.4 2.6 2.8 3.0 3.2 3.43.53.84.510 ID (A) 04 0 3010 20 001aae813 R DSon (mΩ ) 3.5 3.8 4.5 VGS (V) = 3.4 VGS (V) 04 312 001aae814 ID (A) Tj = 25 °C175 °C 03af18 0.5 1.5 -60 0 60 120 180 Tj (°C) a a R DSon R DSon 25 °C()

PHD_PHP36N03LT_2 © Koninklijke Philips Electronics N.V. 2006. All rights reserved. Product data sheet Rev. 02 — 8 June 2006 7 of 13 Philips Semiconductors PHD/PHP36N03LT N-channel TrenchMOS logic level FET ID = 1 mA; VDS =V GS Tj=2 5°C; VDS =5V Fig 9. Gate-source threshold voltage as a function of junction temperature Fig 10. Sub-threshold drain current as a function of gate-source voltage ID = 36 A; VDS =1 5V Fig 11. Gate-source voltage as a function of gate charge; typical values Fig 12. Gate charge waveform definitions 03aa33 0.5 1.5 2.5 -60 0 60 120 180 Tj (°C) VGS(th) (V) max typ min 03aa36 10-6 10-5 10-4 10-3 10-2 10-1 0123 VGS (V) ID (A) maxtypmin Q G (nC) 02 0 1551 0 001aae817 VGS (V) 003aaa508 VGS VGS(th) Q GS1 Q GS2 Q GD VDS Q G(tot) ID Q GS VGS(pl)

PHD_PHP36N03LT_2 © Koninklijke Philips Electronics N.V. 2006. All rights reserved. Product data sheet Rev. 02 — 8 June 2006 8 of 13 Philips Semiconductors PHD/PHP36N03LT N-channel TrenchMOS logic level FET Tj=2 5°C and 175°C; VGS =0V V GS = 0 V; f = 1 MHz Fig 13. Source current as a function of source-drain voltage; typical values Fig 14. Input, output and reverse transfer capacitances as a function of drain-source voltage; typical values VSD (V) 0 1.2 0.90.3 0.6 001aae815 IS (A) Tj = 25 °C175 °C VDS (V) 10-1 102101 001aae816 103 102 104 C (pF) C iss C oss C rss

PHD_PHP36N03LT_2 © Koninklijke Philips Electronics N.V. 2006. All rights reserved. Product data sheet Rev. 02 — 8 June 2006 9 of 13 Philips Semiconductors PHD/PHP36N03LT N-channel TrenchMOS logic level FET 7. Package outline Fig 15. Package outline SOT428 (DPAK) REFERENCESOUTLINE VERSION EUROPEAN PROJECTION ISSUE DATE IEC JEDEC JEITA SOT428 SC-63 TO-252 SOT428 06-02-14 06-03-16 DIMENSIONS (mm are the original dimensions) Plastic single-ended surface-mounted package (DPAK); 3 leads (one lead cropped) A D 2 D 1 H D L e mounting base wAMb E b1 c y 0 5 10 mm scale UNIT mm 0.93 0.46 5.46 5.00 0.56 0.20 6.22 5.98 6.73 6.47 10.4 9.6 2.95 2.55 A 1 2.38 2.22 Ab 2 1.1 0.9 b1 e1 0.89 0.71 bc D 1 0.9 0.5 L2Ee 2.285 4.574.0 D 2 min 4.45 E 1 min 0.5 minH D Lw 0.2 y max 0.2 A

PHD_PHP36N03LT_2 © Koninklijke Philips Electronics N.V. 2006. All rights reserved. Product data sheet Rev. 02 — 8 June 2006 10 of 13 Philips Semiconductors PHD/PHP36N03LT N-channel TrenchMOS logic level FET Fig 16. Package outline SOT78 (3-lead TO-220AB) REFERENCESOUTLINE VERSION EUROPEAN PROJECTION ISSUE DATE IEC JEDEC JEITA SOT78 SC-46 3-lead TO-220AB D D 1 q p L 123 e e b 0 5 10 mm scale Plastic single-ended package; heatsink mounted; 1 mounting hole; 3-lead TO-220AB SOT78 DIMENSIONS (mm are the original dimensions) AE c Q UNIT A 1 b1 D 1 e p mm 2.54 qQA b Dc L2 max. 3.0 3.8 3.5 15.0 12.8 3.30 2.79 3.0 2.7 2.6 2.2 0.7 0.4 16.0 15.2 0.9 0.6 1.45 1.00 4.7 4.1 1.40 1.25 6.6 5.9 10.3 9.7 L1E L 05-03-22 05-10-25 mounting base

PHD_PHP36N03LT_2 © Koninklijke Philips Electronics N.V. 2006. All rights reserved. Table 6. Revision history

• The format of this data sheet has been redesigned to comply with the new presentation and information standard of Philips Semiconductors.
• Addition of PHP36N03LT PHD36N03LT -01 (9397 750 11613)

20030630 Product data - -

PHD_PHP36N03LT_2 © Koninklijke Philips Electronics N.V. 2006. All rights reserved. Product data sheet Rev. 02 — 8 June 2006 12 of 13 Philips Semiconductors PHD/PHP36N03LT N-channel TrenchMOS logic level FET 9. Legal information

9.1 Data sheet status

[1] Please consult the most recently issued document before initiating or completing a design. [2] The term ‘short data sheet’ is explained in section “Definitions”. [3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.semiconductors.philips.com.

9.2 Definitions

Draft —The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. Philips Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet —A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local Philips Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail.

9.3 Disclaimers

General — Information in this document is believed to be accurate and reliable. However, Philips Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. Right to make changes —Philips Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use —Philips Semiconductors products are not designed, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or malfunction of a Philips Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. Philips Semiconductors accepts no liability for inclusion and/or use of Philips Semiconductors products in such equipment or applications and therefore such inclusion and/or use is for the customer’s own risk. Applications —Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Limiting values —Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) may cause permanent damage to the device. Limiting values are stress ratings only and operation of the device at these or any other conditions above those given in the Characteristics sections of this document is not implied. Exposure to limiting values for extended periods may affect device reliability. Terms and conditions of sale —Philips Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.semiconductors.philips.com/profile/terms , including those pertaining to warranty, intellectual property rights infringement and limitation of liability, unless explicitly otherwise agreed to in writing by Philips Semiconductors. In case of any inconsistency or conflict between information in this document and such terms and conditions, the latter will prevail. No offer to sell or license —Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights.

9.4 Trademarks

Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. TrenchMOS — is a trademark of Koninklijke Philips Electronics N.V. 10. Contact information For additional information, please visit: http://www.semiconductors.philips.com For sales office addresses, send an email to: sales.addresses@www.semiconductors.philips.com Document status[1][2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification.

Philips Semiconductors PHD/PHP36N03LT N-channel TrenchMOS logic level FET © Koninklijke Philips Electronics N.V. 2006. All rights reserved. For more information, please visit: http://www.semiconductors.philips.com. Date of release: 8 June 2006 Document identifier: PHD_PHP36N03LT_2 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. 11. Contents