PHP12N10E

PHP12N10E PHILIPS | Alldatasheet

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Philips Semiconductors Product Specification PowerMOS transistor PHP12N10E GENERAL DESCRIPTION QUICK REFERENCE DATA N-channel enhancement mode SYMBOL PARAMETER MAX. UNIT field-effect power transistor in a plastic envelope. The device is V DS Drain-source voltage 100 V intended for use in Switched Mode ID Drain current (DC) 14 A Power Supplies (SMPS), motor P tot Total power dissipation 75 W control, welding, DC/DC and AC/DC Tj Junction temperature 175 ˚C converters, and in general purpose RDS(ON) Drain-source on-state resistance 0.16 Ω switching applications. PINNING - TO220AB PIN CONFIGURATION SYMBOL PIN DESCRIPTION 1 gate 2 drain 3 source tab drain LIMITING VALUES Limiting values in accordance with the Absolute Maximum System (IEC 134) SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT V DS Drain-source voltage - - 100 V VDGR Drain-gate voltage R GS = 20 kΩ - 100 V ±VGS Gate-source voltage - - 30 V ID Drain current (DC) T mb = 25 ˚C - 14 A ID Drain current (DC) T mb = 100 ˚C - 10 A IDM Drain current (pulse peak value) Tmb = 25 ˚C - 56 A Ptot Total power dissipation T mb = 25 ˚C - 75 W Tstg Storage temperature - - 55 175 ˚C Tj Junction Temperature - - 175 ˚C THERMAL RESISTANCES SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT R th j-mb Thermal resistance junction to - - 2 K/W mounting base R th j-a Thermal resistance junction to - 60 - K/W ambient 12 3 tab d g s September 1997 1 Rev 1.000

Philips Semiconductors Product Specification PowerMOS transistor PHP12N10E STATIC CHARACTERISTICS Tj = 25 ˚C unless otherwise specified SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT V (BR)DSS Drain-source breakdown V GS = 0 V; ID = 0.25 mA 100 - - V voltage VGS(TO) Gate threshold voltage V DS = VGS ; ID = 1 mA 2.1 3.0 4.0 V IDSS Zero gate voltage drain current VDS = 100 V; VGS = 0 V; Tj = 25 ˚C - 1 10 µA IDSS Zero gate voltage drain current VDS = 100 V; VGS = 0 V; Tj = 125 ˚C - 0.1 1.0 mA IGSS Gate source leakage current VGS = ±30 V; VDS = 0 V - 10 100 nA R DS(ON) Drain-source on-state V GS = 10 V; ID = 5 A - 0.15 0.16 Ω resistance DYNAMIC CHARACTERISTICS Tj = 25 ˚C unless otherwise specified SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT g fs Forward transconductance V DS = 25 V; ID = 5 A 4.0 5.5 - S C iss Input capacitance V GS = 0 V; VDS = 25 V; f = 1 MHz - 660 825 pF C oss Output capacitance - 140 200 pF C rss Feedback capacitance - 60 100 pF td on Turn-on delay time V DD = 30 V; ID = 3 A; - 10 20 ns tr Turn-on rise time V GS = 10 V; RGS = 50 Ω ; - 25 40 ns td off Turn-off delay time R gen = 50 Ω - 6 09 0n s tf Turn-off fall time - 40 55 ns Ld Internal drain inductance Measured from contact screw on - 3.5 - nH tab to centre of die Ld Internal drain inductance Measured from drain lead 6 mm - 4.5 - nH from package to centre of die Ls Internal source inductance Measured from source lead 6 mm - 7.5 - nH from package to source bond pad REVERSE DIODE LIMITING VALUES AND CHARACTERISTICS Tj = 25 ˚C unless otherwise specified SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT I DR Continuous reverse drain - - - 14 A current IDRM Pulsed reverse drain current - - - 56 A VSD Diode forward voltage I F = 14 A ; VGS = 0 V - 1.2 1.5 V trr Reverse recovery time I F = 14 A; -dIF/dt = 100 A/µs; - 90 - ns Q rr Reverse recovery charge V GS = 0 V; VR = 30 V - 0.6 - µC AVALANCHE LIMITING VALUE Tmb = 25 ˚C unless otherwise specified SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT W DSS Drain-source non-repetitive ID = 14 A ; VDD ≤ 50 V; VGS = 10 V ; - - 70 mJ unclamped inductive turn-off RGS = 50Ω energy September 1997 2 Rev 1.000

Philips Semiconductors Product Specification PowerMOS transistor PHP12N10E Fig.1. Normalised power dissipation. PD% = 100⋅PD /PD 25 ˚C = f(Tmb ) Fig.2. Normalised continuous drain current. ID% = 100⋅ID /ID 25 ˚C = f(Tmb ); conditions: VGS ≥ 10 V Fig.3. Safe operating area. Tmb = 25 ˚C ID & IDM = f(VDS ); IDM single pulse; parameter tp Fig.4. Transient thermal impedance. Zth j-mb = f(t); parameter D = tp/T Fig.5. Typical output characteristics, Tj = 25 ˚C. ID = f(VDS ); parameter VGS Fig.6. Typical on-state resistance, Tj = 25 ˚C. R DS(ON) = f(ID ); parameter VGS 0 20 40 60 80 100 120 140 160 180 Tmb / C PD% Normalised Power Derating120 110 100 1E-07 1E-05 1E-03 1E-01 1E+01 t / s Zth j-mb / (K/W)1E+01 1E+00 1E-01 1E-02 0.5 0.2 0.1 0.05

0.02 D = tp tp

T T P t D ZTHX53 0 20 40 60 80 100 120 140 160 180 Tmb / C ID% Normalised Current Derating 120 110 100 0 2 4 6 8 10 BUK453-100A VDS / V ID / A VGS / V = 1 100 VDS / V ID / A100 0.1 BUK453-100 tp = 10 us 100 us 1 ms 10 ms DC RDS(ON) = VDS/ID A B 100 ms 0 4 8 12 16 20 24 28 BUK453-100A ID / A 1.0 0.8 0.6 0.4 0.2 4.5 5 5.5 6 6.5 7.5 8 10 RDS(ON) / Ohm VGS / V = September 1997 3 Rev 1.000

Philips Semiconductors Product Specification PowerMOS transistor PHP12N10E Fig.7. Typical transfer characteristics. ID = f(VGS ) ; conditions: VDS = 25 V; parameter Tj Fig.8. Typical transconductance, Tj = 25 ˚C. gfs = f(ID ); conditions: VDS = 25 V Fig.9. Normalised drain-source on-state resistance. a = RDS(ON) /RDS(ON)25 ˚C = f(Tj); ID = 5 A; VGS = 10 V Fig.10. Gate threshold voltage. VGS(TO) = f(Tj); conditions: ID = 1 mA; VDS = VGS Fig.11. Sub-threshold drain current. ID = f(VGS); conditions: Tj = 25 ˚C; VDS = VGS Fig.12. Typical capacitances, Ciss, Coss, Crss. C = f(VDS ); conditions: VGS = 0 V; f = 1 MHz 0 2 4 6 8 10 BUK453-100A VGS / V ID / A28 Tj / C = 25 150 -60 -20 20 60 100 140 180 Tj / C VGS(TO) / V max. typ. min. 0 4 8 12 16 20 24 28 BUK453-100A ID / A gfs / S7 0 1 2 3 4 VGS / V ID / A1E-01 1E-02 1E-03 1E-04 1E-05 1E-06 SUB-THRESHOLD CONDUCTION typ2 % 98 % -60 -20 20 60 100 140 180 Tj / C Normalised RDS(ON) = f(Tj) 2.4 2.2 2.0 1.8 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 a 0 20 40 VDS / V C / pF Ciss Coss Crss 100 1000

10000 BUK4y3-100

September 1997 4 Rev 1.000

Philips Semiconductors Product Specification PowerMOS transistor PHP12N10E Fig.13. Typical turn-on gate-charge characteristics. VGS = f(QG ); conditions: ID = 14 A; parameter VDS Fig.14. Typical reverse diode current. IF = f(VSDS ); conditions: VGS = 0 V; parameter Tj Fig.15. Normalised avalanche energy rating. W DSS % = f(Tmb ); conditions: ID = 14 A Fig.16. Avalanche energy test circuit. 0 2 4 6 8 10 12 14 16 QG / nC VGS / V VDS / V =20 BUK453-100 20 40 60 80 100 120 140 160 180 Tmb / C 120 110 100 WDSS% 0 1 2 BUK453-100A VSDS / V IF / A Tj / C = 150 25 L T.U.T. VDD RGS R 01 VDS -ID/100 shunt VGS W DSS = 0.5⋅LID 2 ⋅BV DSS /(BV DSS − VDD ) September 1997 5 Rev 1.000

Philips Semiconductors Product Specification PowerMOS transistor PHP12N10E MECHANICAL DATA Dimensions in mm Net Mass: 2 g Fig.17. TO220AB; pin 2 connected to mounting base. Notes 1. Observe the general handling precautions for electrostatic-discharge sensitive devices (ESDs) to prevent damage to MOS gate oxide. 2. Refer to mounting instructions for TO220 envelopes. 3. Epoxy meets UL94 V0 at 1/8". 10,3 max 3,7 2,8 3,03,0 max not tinned 1,3 max (2x) 123 2,4 0,6 4,5 max 5,9 min 15,8 max 1,3 2,54 2,54 0,9 max (3x) 13,5 min September 1997 6 Rev 1.000

Philips Semiconductors Product Specification PowerMOS transistor PHP12N10E DEFINITIONS Data sheet status Objective specification This data sheet contains target or goal specifications for product development. Preliminary specification This data sheet contains preliminary data; supplementary data may be published later. Product specification This data sheet contains final product specifications. Limiting values Limiting values are given in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of this specification is not implied. Exposure to limiting values for extended periods may affect device reliability.

Application information

Where application information is given, it is advisory and does not form part of the specification.  Philips Electronics N.V. 1997 All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, it is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent or other industrial or intellectual property rights. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices or systems where malfunction of these products can be reasonably expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale. September 1997 7 Rev 1.000