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N-channel enhancement mode field-effect transistor Rev. 03 — 25 June 2003 Product data M3D748 1. Description The latest generation N-channel enhancement mode field-effect power transistor in a SOT669 (LFPAK) package. Product availability: PH3230 in SOT669 (LFPAK). 2. Features ■ Logic level compatible ■ Low drive current ■ High density mounting ■ Very low on-state resistance. 3. Applications ■ DC-to-DC converters ■ Computer motherboards ■ Switched mode power supplies. 4. Pinning information Table 1: Pinning - SOT669 (LFPAK), simplified outline and symbol Pin Description Simplified outline Symbol 1,2,3 source (s) SOT669 (LFPAK) 4 gate (g) mb mounting base, connected to drain (d) Top view MBL286 mb MBL288 d s1 s2 s3 g
Philips Semiconductors PH3230 N-channel enhancement mode field-effect transistor Product data Rev. 03 — 25 June 2003 2 of 13 9397 750 10949 © Koninklijke Philips Electronics N.V. 2003. All rights reserved. 5. Quick reference data 6. Limiting values Table 2: Quick reference data Symbol Parameter Conditions Typ Max Unit VDS drain-source voltage (DC) T j=2 5°C - 30 V ID drain current (DC) T mb =2 5°C - 50 A Ptot total power dissipation T mb =2 5°C - 42 W Tj junction temperature - 150 °C R DSon drain-source on-state resistance VGS = 10 V; ID = 25 A; Tj=2 5°C 3.2 3.7 m Ω VGS = 4.5 V; ID = 25 A; Tj=2 5°C 5.5 7.3 m Ω Table 3: Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter Conditions Min Max Unit VDS drain-source voltage (DC) 25 °C ≤ Tj≤ 150 °C - 30 V VGS gate-source voltage (DC) - ±20 V ID drain current (DC) V GS = 10 V; Tmb =2 5°C; Figure 2 and4 -5 0 A IDM peak drain current T mb =2 5°C; pulsed; tp ≤ 10 µs;Figure 4 - 200 A Ptot total power dissipation T mb =2 5°C; Figure 1 -4 2 W Tstg storage temperature −55 +150 °C Tj junction temperature −55 +150 °C Source-drain diode I SM peak source (diode forward) current Tmb =2 5°C; pulsed; tp ≤ 10 µs - 50 A Avalanche ruggedness I DS(AL)R repetitive drain-source avalanche current Tj=2 5°C -5 A EDS(AL)R repetitive drain-source avalanche energy Tj=2 5°C; RGS ≥ 50 Ω ; IDS(AL)R =5A ; VDD = 15 V; duty cycle < 0.1%;Figure 3and 16 - 2.5 mJ
Philips Semiconductors PH3230 N-channel enhancement mode field-effect transistor Product data Rev. 03 — 25 June 2003 3 of 13 9397 750 10949 © Koninklijke Philips Electronics N.V. 2003. All rights reserved. VGS ≥ 10 V Fig 1. Normalized total power dissipation as a function of mounting base temperature. Fig 2. Normalized continuous drain current as a function of mounting base temperature. IAR = 5 A; VDD = 15 V; duty cycle < 0.1%; RG ≥ 50 Ω Fig 3. Repetitive drain-source avalanche energy as a function of junction temperature. 03ah31 120 0 50 100 150 200 Tmb (°C) Pder (%) 03ag77 120 0 50 100 150 200 Tmb (°C) Ider (%) P der P tot P tot 25 C°() Ider ID I D2 5C°() 03aj93 0 50 100 150 Tj (°C) EDS(AL)R (mJ)
Philips Semiconductors PH3230 N-channel enhancement mode field-effect transistor Product data Rev. 03 — 25 June 2003 4 of 13 9397 750 10949 © Koninklijke Philips Electronics N.V. 2003. All rights reserved. Tmb =2 5°C; IDM is single pulse. Fig 4. Safe operating area; continuous and peak drain currents as a function of drain-source voltage. 03ag78 102 103 10-1 1 10 10 2VDS (V) ID (A) DC 100 ms 10 ms 1 ms tp = 10 µs 100 µs Limit RDSon = VDS / ID
Philips Semiconductors PH3230 N-channel enhancement mode field-effect transistor Product data Rev. 03 — 25 June 2003 5 of 13 9397 750 10949 © Koninklijke Philips Electronics N.V. 2003. All rights reserved. 7. Thermal characteristics
7.1 Transient thermal impedance
Table 4: Thermal characteristics Symbol Parameter Conditions Min Typ Max Unit R th(j-mb) thermal resistance from junction to mounting baseFigure 5 --3K / W Fig 5. Transient thermal impedance from junction to mounting base as a function of pulse duration. 03ag76 10-2 10-1 10-5 10-4 10-3 10-2 10-1 1 10tp (s) Zth(j-mb) (K/W) single pulse δ = 0.5 0.2 0.1 0.05 0.02 tp tp T P t Tδ =
Philips Semiconductors PH3230 N-channel enhancement mode field-effect transistor Product data Rev. 03 — 25 June 2003 6 of 13 9397 750 10949 © Koninklijke Philips Electronics N.V. 2003. All rights reserved. 8. Characteristics Table 5: Characteristics Tj=2 5°C unless otherwise specified. Symbol Parameter Conditions Min Typ Max Unit Static characteristics V (BR)DSS drain-source breakdown voltage ID = 10 mA; VGS = 0 V 3 0 --V VGS(th) gate-source threshold voltage ID = 1 mA; VDS =V GS ;Figure 10 1 1.9 2.5 V IDSS drain-source leakage current V DS =3 0V ; VGS =0V - - 1 µA IGSS gate-source leakage current V GS = ±16 V; VDS = 0 V - 0.1 10 µA R DSon drain-source on-state resistance VGS = 10 V; ID =2 5A ;Figure 8 and9 - 3.2 3.7 m Ω VGS = 4.5 V; ID =2 5A ;Figure 9 - 5.5 7.3 m Ω Dynamic characteristics g fs forward transconductance V DS =1 0V ; ID =2 5A ;Figure 12 39 55 - S Q g(tot) total gate charge I D = 50 A; VDD =1 0V ; VGS =1 0V ;Figure 15 -7 5 -n C Q gs gate-source charge - 16 - nC Q gd gate-drain (Miller) charge - 14 - nC C iss input capacitance V GS =0V ; VDS = 10 V; f = 1 MHz;Figure 13 -4 7 5 0 -p F C oss output capacitance - 1160 - pF C rss reverse transfer capacitance - 630 - pF td(on) turn-on delay time V DD =1 0V ; ID = 25 A; VGS =1 0V ;RG = 4.7Ω -2 5 -n s tr rise time -5 0 -n s td(off) turn-off delay time - 90 - ns tf fall time -2 6 -n s Source-drain (reverse) diode V SD source-drain (diode forward) voltage IS = 50 A; VGS =0V ;Figure 14 - 0.85 0.98 V trr reverse recovery time I S = 50 A; dIS/dt =−50 A/µs; VGS = 0 V - 60 - ns
Philips Semiconductors PH3230 N-channel enhancement mode field-effect transistor Product data Rev. 03 — 25 June 2003 7 of 13 9397 750 10949 © Koninklijke Philips Electronics N.V. 2003. All rights reserved. Tj=2 5°CT j=2 5°C and 150°C; VDS > ID × R DSon Fig 6. Output characteristics: drain current as a function of drain-source voltage; typical values. Fig 7. Transfer characteristics: drain current as a function of gate-source voltage; typical values. Tj=2 5°C Fig 8. Drain-source on-state resistance as a function of drain current; typical values. Fig 9. Normalized drain-source on-state resistance factor as a function of junction temperature. 03ag79 100
012345 VDS (V)
(A) 3.5 V VGS = 3 V 10 V 4 V 5 V Tj = 25 °C 03ag80 01234 VGS (V) ID (A) VDS > ID x RDSon Tj = 25 °C 150 °C 03ag85 0 2 04 06 0 ID (A) RDSon (mΩ ) 3 VVGS = 2.5 V 5 V 10 V 3.5 V 03ah32 0.6 1.2 1.8 -80 -20 40 100 160 Tj (°C) a a R DSon R DSon 25 C°()
Philips Semiconductors PH3230 N-channel enhancement mode field-effect transistor Product data Rev. 03 — 25 June 2003 8 of 13 9397 750 10949 © Koninklijke Philips Electronics N.V. 2003. All rights reserved. ID = 1 mA; VDS =V GS Tj=2 5°C Fig 10. Gate-source threshold voltage as a function of junction temperature Fig 11. Sub-threshold drain current as a function of gate-source voltage. Tj=2 5°C and 150°C; VDS > ID × R DSon VGS = 0 V; f = 1 MHz Fig 12. Forward transconductance as a function of drain current; typical values. Fig 13. Input, output and reverse transfer capacitances as a function of drain-source voltage; typical values. 03ah33 -80 -20 40 100 160 (V) min typ max VGS(th) Tj (°C) 03ah30 10-6 10-5 10-4 10-3 10-2 10-1 0123 max.typ.min. VGS (V) ID (A) 03ag81 0 2 04 06 08 0 150 °C VDS > ID x RDSon Tj = 25 °C ID (A) gfs (S) 03ag83 V (V) 102 103 104 10-1 1 10 10 2 DS C (pF) C iss C oss C rss
Philips Semiconductors PH3230 N-channel enhancement mode field-effect transistor Product data Rev. 03 — 25 June 2003 9 of 13 9397 750 10949 © Koninklijke Philips Electronics N.V. 2003. All rights reserved. 9. Test information Tj=2 5°C and 150°C; VGS =0V T j=2 5°C; ID = 50 A; VDD =1 0V Fig 14. Source (diode forward) current as a function of source-drain (diode forward) voltage; typical values. Fig 15. Gate-source voltage as a function of gate charge; typical values. 03ag82 100 0 0.4 0.8 1.2 1.6 VSD (V) IS (A) Tj = 25 °C 150 °C VGS = 0 V 03ag84 0 2 04 06 08 0 Q G (nC) VGS (V) ID = 50 A VDD = 10 V Tj = 25 °C Fig 16. Avalanche energy test circuit. 03am60 50 Ω R01 shunt VGS VDS R G T.U.T. VDD −ID /100 L E DS AL() R 0.5 LI DS AL() R()× 2 V BR() DSS
Philips Semiconductors PH3230 N-channel enhancement mode field-effect transistor Product data Rev. 03 — 25 June 2003 10 of 13 9397 750 10949 © Koninklijke Philips Electronics N.V. 2003. All rights reserved. 10. Package outline Fig 17. SOT669 (LFPAK). REFERENCESOUTLINE VERSION EUROPEAN PROJECTION ISSUE DATE IEC JEDEC JEITA SOT669 MO-235 02-07-10 03-02-05 0 2.5 5 mm scale e b A 2 bcA eUNIT DIMENSIONS (mm are the original dimensions) mm 1.10 0.95 A 3A 1 0.15 0.00 1.20 1.01 0.50 0.35 4.41 3.62 0.25 0.19 0.30 0.24 4.10 3.80 6.2 5.8 H 1.3 0.8 0.85 0.40 L 1.3 0.8 wyD (1) 5.0 4.8 E(1) 3.3 3.1 (1)D 1 (1) max 1 23 4 mounting base D 1 c Plastic single-ended surface mounted package (Philips version LFPAK); 4 leads SOT669 E H D A Aw M C C X 1/2 e yC θ θ (A )3 L A detail X Note 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
Philips Semiconductors PH3230 N-channel enhancement mode field-effect transistor Product data Rev. 03 — 25 June 2003 11 of 13 9397 750 10949 © Koninklijke Philips Electronics N.V. 2003. All rights reserved. 11. Revision history Table 6: Revision history Rev Date CPCN Description 03 20030625 - Product Data (9397 750 10949) Modifications:
- JEDEC reference added to package outline drawing inFigure 17 02 20020905 - Product data (9397 750 10122) 01 20020207 - Product data (9397 750 09395)
Philips Semiconductors PH3230 N-channel enhancement mode field-effect transistor © Koninklijke Philips Electronics N.V. 2003. All rights reserved. Product data Rev. 03 — 25 June 2003 12 of 13 Contact information For additional information, please visithttp://www.semiconductors.philips.com. 12. Data sheet status [1] Please consult the most recently issued data sheet before initiating or completing a design. [2] The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com. [3] For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status. 13. Definitions Short-form specification —The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition —Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information —Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. 14. Disclaimers Life support —These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes —Philips Semiconductors reserves the right to make changes in the products - including circuits, standard cells, and/or software - described or contained herein in order to improve design and/or performance. When the product is in full production (status ‘Production’), relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN). Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no licence or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Level Data sheet status[1] Product status[2][3] Definition I Objective data Development This data sheet contains data from the objective specification for product development. Philips Semiconductors reserves the right to change the specification in any manner without notice. II Preliminary data Qualification This data sheet contains data from the preliminary specification. Supplementary data will be published at a later date. Philips Semiconductors reserves the right to change the specification without notice, in order to improve the design and supply the best possible product. III Product data Production This data sheet contains data from the product specification. Philips Semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. Relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN).
© Koninklijke Philips Electronics N.V. 2003. Printed in The Netherlands All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Date of release: 25 June 2003 Document order number: 9397 750 10949
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Philips Semiconductors PH3230 N-channel enhancement mode field-effect transistor