PGA870IRHDT

PGA870 TI | Alldatasheet

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Control□LogicPGA870 6bSignal□Source +5□V Bandpass Filter ADS6149 F =□250□MHzS Powerdown□1 Latch□Mode 1 Gain□Strobe□1 FPGA 6b□Gain□Adjust Fast□Gain□Control□Loop PGA870 www.ti.com SBOS436 –DECEMBER 2009 High-Speed,FullyDifferential,Programmable-GainAmplifier Check forSamples: PGA870 1FEATURES DESCRIPTION 23• Wideband +5-V Operation:650-MHz Bandwidth The PGA870 is a wideband programmable-gain amplifier(PGA) forhigh-speedsignalchainand data• Low Impedance, VoltageMode Output acquisitionsystems. The PGA870 has been• Wide Gain Range: –11.5dB to+20 dB optimizedto providehigh bandwidth,low distortion,• Precise0.5-dBGain Steps and low noise,making itideallysuitedas a 14-bit Step-to-StepGain Error= ±0.03dB analog-to-digitalconverter(ADC) driverforwireless base stationsignalchainapplications.The wide gain• HD 2:–93 dBc at100 MHz range of –11.5 dB to +20 dB can be adjustedin• HD 3:–88 dBc at100 MHz 0.5-dBgainstepsthrougha 6-bitcontrolword applied• IMD 3:–98 dBc at100 MHz, –95 dBc at200 MHz to the parallelinterface.The gain controlinterface may be configuredas a level-triggeredlatchor an• OIP3:+47 dBm at100 MHz; edge-triggeredlatch,or itmay be placed in anExceeds +45 dBm forFrequenciesto300 MHz unlatched(transparent)mode. Inadditiontothe6-bit• FlexibleGain ControlInterface: gaincontrol,thePGA870 containsa power-down pin– Supports latchedand unlatchedoptions (PD) thatcan be used to put the device intoa low-current,power-down mode. In thismode, the– Gain may be setinpower-down state quiescentcurrentdropsto2 mA, butthegaincontrol– Fastsetup and hold times:2.5ns circuitryremains active,allowingthe gain of the• Low DisableCurrent:2 mA PGA870 to be set before device power-up. The

• Pb-Free(RoHS-Compliant)and Green Package PGA870 is offered in a QFN-28 PowerPAD ™ package.

APPLICATIONS

RELATED PRODUCTS• Programmable Gain IFAmplifier: DEVICE DESCRIPTION– Differentialsignalchains Wideband,low-noise,low-distortion,fully– Single-endedtodifferentialconversion THS4509 differentialamplifier

• FastGain ControlLoops for: High-speed,fullydifferential16-bitADCTHS7700– Test/measurement driver THS9000 50-MHz to400-MHz IF/RFAmplifier– Digitalradiosignalchains 14-Bit,250-MSPS ADC withDDR• ADC DriverforWirelessBase StationSignal ADS6149 LVDS/CMOS OutputsChains:GSM, WCDMA, MC-GSM ADS6145 14-Bit,125-MSPS ADC withDDR• Radar/Ranging Systems LVDS/CMOS Outputs Pleasebe aware thatan importantnoticeconcerningavailability,standardwarranty,and use incriticalapplicationsofTexas Instrumentssemiconductorproductsand disclaimerstheretoappearsattheend ofthisdatasheet. 2PowerPAD isa trademarkofTexas Instruments. 3Allothertrademarksarethepropertyoftheirrespectiveowners. PRODUCTION DATA informationiscurrentas ofpublicationdate. Copyright© 2009,Texas InstrumentsIncorporatedProductsconform to specificationsper the terms of the Texas Instrumentsstandardwarranty.Productionprocessingdoes not necessarilyincludetestingofallparameters.

SBOS436 –DECEMBER 2009 www.ti.com This integratedcircuitcan be damaged by ESD. Texas Instrumentsrecommends thatallintegratedcircuitsbe handled with appropriateprecautions.Failuretoobserveproperhandlingand installationprocedurescan cause damage. ESD damage can rangefromsubtleperformancedegradationtocompletedevicefailure.Precisionintegratedcircuitsmay be more susceptibletodamage because verysmallparametricchanges couldcause thedevicenottomeet itspublishedspecifications. ORDERING INFORMATION (1) SPECIFIED PACKAGE TEMPERATURE PACKAGE ORDERING TRANSPORT MEDIA, PRODUCT PACKAGE-LEAD DESIGNATOR RANGE MARKING NUMBER QUANTITY PGA870 PGA870IRHDT Tape and Reel,250 PGA870 QFN-28 RHD –40°C to+85°C PGA870 PGA870IRHDR Tape and Reel,3000 (1) Forthemost currentpackage and orderinginformationsee thePackage OptionAddendum attheend ofthisdocument,orsee theTI web siteatwww.ti.com. ABSOLUTE MAXIMUM RATINGS (1) Over operatingfree-airtemperaturerange,unlessotherwisenoted. PGA870 UNIT Power supply 6 V Internalpower dissipation See ThermalCharacteristics Inputvoltagerange VS V Storagetemperaturerange –40 to+125 °C Maximum junctiontemperature(TJ) +150 °C Maximum junctiontemperature(TJ),continuousoperation,long-termreliability +140 °C Human body model (HBM) 2000 V ESD rating Charged devicemodel (CDM) 1000 V Machine model (MM) 200 V (1) Stressesabove theseratingsmay cause permanentdamage. Exposuretoabsolutemaximum conditionsforextendedperiodsmay degradedevicereliability.These arestressratingsonly,and functionaloperationofthedeviceattheseorany otherconditionsbeyond thosespecifiedisnotsupported. DISSIPATION RATINGS (1) POWER RATING (2) (TJ= +125°C) PACKAGE θJP(°C/W) θJA (°C/W) TA = +25°C TA = +85°C QFN-28 4.1 35 2.9W 0.87W (1) These datawere takenwiththeJEDEC High-KtestPCB. FortheJEDEC low-KtestPCB, θJA is350°C/W. (2) Power ratingisdeterminedwitha junctiontemperatureof+125°C. Thisisthepointwhere distortionstartstosubstantiallyincreaseand long-termreliabilitystartstobe reduced.Thermalmanagement ofthefinalprintedcircuitboardshouldstrivetokeep thejunction temperatureatorbelow+125° C forbestperformanceand reliability.

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www.ti.com SBOS436 –DECEMBER 2009 ELECTRICAL CHARACTERISTICS: VS+ = +5 V Boldfacelimitsaretestedat+25°C . AtTA= +25°C, VS+ = +5 V,differentialinputsignal,differentialVOUT = 2 VPP ,R L= 200 Ω differential,G = 20 dB,and inputand outputcommon-mode atinternalmidsupplyreference,unlessotherwisenoted. PGA870IRHD TEST PARAMETER CONDITIONS MIN TYP MAX UNITS LEVEL (1) AC PERFORMANCE Small-signalbandwidth G = 20 dB,VO = 100 mV PP 650 MHz C Large-signalbandwidth G = 20 dB,VO = 2 VPP 650 MHz C Bandwidthfor0.1-dBflatness 100 MHz C Slew rate(differential) 2-V step 2900 V/µs C Risetime 2-V step 0.55 ns C Falltime 2-V step 0.55 ns C Settlingtimeto1% 2-V step 3 ns C Settlingtimeto0.1% 2-V step 5 ns C HARMONIC DISTORTION Gain = +20 dB, VO = 2 VPP ,R L = 200 Ω f= 50 MHz –108 dBc C Second-orderharmonicdistortion f= 100 MHz –93 dBc C f= 200 MHz –71 dBc C f= 50 MHz –95 dBc C Third-orderharmonicdistortion f= 100 MHz –88 dBc C f= 200 MHz –75 dBc C f1(MHz) f2(MHz) C 49 51 -87 dBc CSecond-orderintermodulation 2-MHz tone distortion spacing 99 101 -90 dBc C 199 201 -89 dBc C 49 51 -103 dBc C 2-MHz toneThird-orderintermodulationdistortion 99 101 –98 dBc Cspacing 199 201 –95 dBc C 49 51 50 dBm C VOUT = 2 VPP ,Outputthird-orderintercept 99 101 47 dBm CR L = 200 Ω 199 201 45 dBm C Noisefigure 150-Ω system,Gain = +20 dB,f= 100 MHz 13 dB C DC TA= +25°C –30 ±5 30 mV A Outputoffsetvoltage TA= –40°C to+85°C –35 35 mV B Averageoffsetvoltagedrift TA= –40°C to+85°C 20 μV/°C B INPUT Inputreturnloss ZSYS = 150 Ω,frequency< 300MHz -40 dB B Differentialinputresistance 129 150 173 Ω B Differentialinputcapacitance 1.2 pF C Single-endedinputresistance 141 Ω B Common-mode rejectionratio TA= +25°C, Gain = 20 dB 54 76 dB A (1) Testlevels:(A)100% testedat+25°C. Over temperaturelimitssetby characterizationand simulation.(B)Limitssetby characterization and simulation.(C)Typicalvalue;onlyforinformation. Copyright© 2009,Texas InstrumentsIncorporated 3 ProductFolderLink(s):PGA870

SBOS436 –DECEMBER 2009 www.ti.com ELECTRICAL CHARACTERISTICS: VS+ = +5 V (continued) Boldfacelimitsaretestedat+25°C . AtTA= +25°C, VS+ = +5 V,differentialinputsignal,differentialVOUT = 2 VPP ,R L= 200 Ω differential,G = 20 dB,and inputand outputcommon-mode atinternalmidsupplyreference,unlessotherwisenoted. PGA870IRHD TEST PARAMETER CONDITIONS MIN TYP MAX UNITS LEVEL (1) OUTPUT TA= +25°C 3.5 3.7 V A Maximum outputvoltagehigh Each outputwith TA= –40°C to+85°C 3.4 V B 100 Ω to TA= +25°C 1.3 1.5 V AmidsupplyMinimum outputvoltagelow TA= –40°C to+85°C 1.6 V B TA= +25°C, R L = 200 Ω 4 4.8 VPP B Differentialoutputvoltageswing TA= –40°C to+85°C 3.6 VPP B Differentialoutputcurrentdrive TA= +25°C, R L = 20 Ω 40 50 mA P A Outputcommon-mode offsetfrom TA= +25°C, R L = 20 Ω –60 ±10 60 mV Amidsupply Differentialoutputimpedance f= 100 MHz 3.5/87 Ω /° B Differentialoutputimpedance model SeriesR OUT,EQ ,LOUT,EQ 0.3/3.8 Ω /nH B POWER SUPPLY Specifiedoperatingvoltage 4.75 5 5.25 V C TA= +25°C 138 143 148 mA A Quiescentcurrent TA= –40°C to+85°C 136 150 mA B Power-supplyrejectionratio(PSRR) TA= +25°C, Gain = 20 dB (2) 54 76 dB A POWER DOWN Devicepower-upvoltagethreshold Ensuredon above 2.1V 2.1 V A Devicepower-down voltagethreshold Ensuredoffbelow0.9V 0.9 V A TA= +25°C 2 4 mA A Power-down quiescentcurrent TA= –40°C to+85°C 4.8 mA B Forwardisolationinpower-down state f= 100 MHz -110 dB C PD pininputbiascurrent PD = VS– 0.5 μA B PD pininputimpedance 20 ||0.5 kΩ ||pF C Turn-ontimedelay Measured tooutputon 16 ns C Turn-offtimedelay Measured tooutputoff 60 ns C GAIN SETTING Gain range –11.5 +20 dB A Gain control:G0 toG5 6 Bits B Gain stepsize –11.5dB ≤ Gain ≤ +20 dB 0.50 dB A Absolutegainerror –0.35 ±0.05 0.35 dB A Gain erroroverentiregainrange Steptostepgainerror –0.10 ±0.03 0.10 dB A Gain temp coefficient 0.0018 0.0022 0.0026 dB/°C B Gain settlingtime 5 ns B DIGITAL INPUTS B0 toB5 and Latch Digitalthresholdlow 0.9 V A Digitalthresholdhigh 2.1 V A Currentinto/outofdigitalpins ±20 nA C Data setup timetoGAIN STROBE low 2.5 ns C Data holdtimeafterGAIN STROBE 0 ns Clow Latencytime 6.4 ns C (2) PSRR isdefinedwithrespecttoa differentialoutput.

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LATCH□MODE (MSB)□B5 VS+ IN+ VMID2 V IN/c45 VS+ GAIN□STROBE GND V OUT+ GND OUT/c45 V GND 13 141211108 22232425262728 V MID1 GNDV GNDGNDGNDPD PowerPAD/c228 PGA870 www.ti.com SBOS436 –DECEMBER 2009 PIN CONFIGURATION QFN-28 RHD PACKAGE (TOP VIEW) PIN ASSIGNMENTS PIN NUMBER PIN NAME DESCRIPTION Controlslatchedand unlatchedacquisitionofthegaincontrolword (B0 toB5).See theapplicationsectionGain1 LATCH MODE ControlModes fora detaileddescription. 2,6,11,16,20,25 VS+ +5V power supply

3 IN+ Noninvertinginput

Bufferoutputfortheinternalmidsupplyreference.Thispointistheoutputofan activebufferwhichisnotintended4 VMID2 todrivean externalload.Itshouldbe bypassedby a 0.1-μF capacitor.

5 IN– Invertinginput

7 GAIN STROBE Gain latchclockpin

8 B5 (MSB) Gain controlMSB

9 B4 Gain controlbit4

10 B3 Gain controlbit3

12 B2 Gain controlbit2

13 B1 Gain controlbit1

14 B0 (LSB) Gain controlbit0

17 OUT – Invertingoutput

15,18,21,22,23, GND Ground24,26

19 OUT+ Noninvertingoutput

27 PD Activelowpower-down fordeviceanalogcircuitry.Gain controlCMOS circuitryisstillactivewhen PD islow. Chipbypasspinforinternalmidsupplyreference.Thispointisthemidpointofa resistivevoltagedividerand isnot28 VMID1 intendedtofunctionas an input.Itshouldbe bypassedwitha 0.1-μF capacitor. ThermalPad PowerPAD Thermalcontactforheatdissipation.The thermalpad must be connectedtoelectricalground. Copyright© 2009,Texas InstrumentsIncorporated 5 ProductFolderLink(s):PGA870

/c45 /c45 /c45 Gain□(dB) 10 100 1000 Frequency□(MHz) Gain□=□+5□dB Gain□= 11.5□dB/c45 Gain□Adjusted□in□0.5-dB□Steps V =□200□mVOUT PP Gain□(dB) 10 100 1000 Frequency□(MHz) Gain□=□+20□dB Gain□=□+5.5□dB Gain□Adjusted□in□0.5-dB□Steps V =□200□mVOUT PP /c45 /c45 /c45 /c45 Gain□(dB) 10 100 1000 Frequency□(MHz) Gain□=□20□dB Gain□=□10□dB Gain□=□0□dB Gain□= 6□dB/c45 Differential□Input V =□2□VOUT PP 20/c45 /c45 /c45 /c45 Gain□(dB) 10 100 1000 Frequency□(MHz) Gain□=□20□dB Gain□=□10□dB Gain□=□0□dB Gain□= 6□dB/c45 Single-Ended□Input V =□2□VOUT PP 10 100 1000 Frequency□(MHz) Gain□(dB) C =□820□pFL C =□470□pFL C =□94□pFL C =□44□pFL C = 10□pF L C = 20□pF L C = 16□pF L PGA870 ROS VOUT ROS CL CL 100 R ( ) /c87 OS 1 10 100 1000 Capacitive□Load□(pF) PGA870 ROS VOUT ROS CL CL PGA870 SBOS436 –DECEMBER 2009 www.ti.com TYPICAL CHARACTERISTICS AtTA= +25°C, VS+ = +5 V,differentialinputsignal,differentialVOUT = 2 VPP ,R L = 200 Ω differential,G = +20 dB,and inputand outputcommon-mode atinternalmidsupplyreference,unlessotherwisenoted. SMALL-SIGNAL AC RESPONSE SMALL-SIGNAL AC RESPONSE Gain Adjustedfrom –11.5dB to+5 dB Gain Adjustedfrom +5.5dB to+20 dB Figure1. Figure2. LARGE-SIGNAL AC RESPONSE AT FOUR GAINS LARGE-SIGNAL AC RESPONSE AT FOUR GAINS DIFFERENTIAL INPUT SINGLE-ENDED INPUT Figure3. Figure4. DIFFERENTIAL FREQUENCY RESPONSE vs CAPACITIVE LOAD R OS vs CAPACITIVE LOAD Figure5. Figure6.

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/c4512/c4510 /c458 /c456 /c454 /c452 0 2 4 6 8 10 12 14 16 18 20 Gain□Setting /c45 /c45 /c45 Gain□(dB) 50□MHz 100□MHz 200□MHz /c45 12/c45 10 /c45 8 /c45 6 /c45 4 /c45 2 0 2 4 6 8 10 12 14 16 18 20 Gain□Setting 0.15 0.10 0.05 0.05 /c45 /c45 /c45 /c45 0.10 Gain□Error□(dB) /c45 40 C/c176 +25 C/c176 +85 C/c176 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0.5 1.0 /c45 /c45 Gain□Control□(V) 0 100 200 300 400 500 Time□(ns) 1.5 1.0 0.5 /c450.5 /c451.0 /c451.5 Amplifier□Output□(V) Gain□Control Gain□Code□=□111111 Gain□Code□=□000000Amplifier Output /c4512/c4510 /c458 /c456 /c454 /c452 0 2 4 6 8 10 12 14 16 18 20 Gain□Setting 0.04 0.02 0.02 0.04 0.06 0.08 /c45 /c45 /c45 /c45 Gain□Error□(dB) 50□MHz 100□MHz 200□MHz 2.5 2.0 1.5 1.0 0.5 0 1.0 0.5 0.5 1.0 /c45 /c45 Gain□Control,□Gain□Strobe□(V) Amplifier□Output□(V) Time□(50□ns/div) Gain□Code□= 111111 Gain□Code□= 000000 Gain□Strobe 2.5 2.0 1.5 1.0 0.5 0 1.0 0.5 0.5 1.0 /c45 /c45 Gain□Control,□Gain□Strobe□(V) Amplifier□Output□(V) Time□(50□ns/div) Gain□Code□=□111111 Gain□Code□= 000000 Gain Strobe PGA870 www.ti.com SBOS436 –DECEMBER 2009 TYPICAL CHARACTERISTICS (continued) AtTA= +25°C, VS+ = +5 V,differentialinputsignal,differentialVOUT = 2 VPP ,R L = 200 Ω differential,G = +20 dB,and inputand outputcommon-mode atinternalmidsupplyreference,unlessotherwisenoted. STEP-TO-STEP GAIN ERROR vs GAIN SETTING LARGE-SIGNAL GAIN vs GAIN SETTING OVER TEMPERATURE Figure7. Figure8. STEP-TO-STEP GAIN ERROR vs GAIN SETTING OVER FREQUENCY GAIN STEP RESPONSE: NO LATCH Figure9. Figure10. GAIN STEP RESPONSE: LEVEL-TRIGGERED GAIN LATCH GAIN STEP RESPONSE: EDGE-TRIGGERED LATCH Figure11. Figure12. Copyright© 2009,Texas InstrumentsIncorporated 7 ProductFolderLink(s):PGA870

/c45 /c45 /c45 /c45 /c45 /c45 /c45 100 IMD (dBc) 50 100 150 200 250 300 Frequency□(MHz) R =□100 /c87L R =□200 R =□500 R =□1□k L L L /c87 /c87 /c87 V =□2□VOUT PP F□=□2□MHz/c68 Gain□=□+10□dB /c45 80 100 102 104 106 108 110 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 IMD (dBc) 50 100 150 200 250 300 Frequency□(MHz) R =□100 /c87L R =□200 R =□500 R =□1□k L L L /c87 /c87 /c87 Dashed□lines:□Gain□= 6□dB/c45 Solid□lines:□Gain□=□+10□dB V =□2□VOUT PP F□=□2□MHz/c68 /c45 /c45 /c45 /c45 /c45 /c45 /c45 100 IMD (dBc) 50 100 150 200 250 300 Frequency□(MHz) R =□100 /c87L R =□200 R =□500 R =□1□k L L L /c87 /c87 /c87 V =□2□VOUT PP F□=□2□MHz/c68 Gain□=□+20□dB /c45 80 100 102 104 106 108 110 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 IMD (dBc) 50 100 150 200 250 300 Frequency□(MHz) R =□100 /c87L R =□200 R =□500 R =□1□k L L L /c87 /c87 /c87 Dashed□lines:□Gain□=□0□dB Solid□lines:□Gain□=□+20□dB V =□2□VOUT PP F□=□2□MHz/c68 OIP (dBm) 50 100 150 200 250 300 Frequency□(MHz) V =□2□V R =□200 OUT PP L /c87 Gain□=□+20□dB Gain□=□+10□dB Gain□=□0□dB Gain□= dB/c45 6 PGA870 SBOS436 –DECEMBER 2009 www.ti.com TYPICAL CHARACTERISTICS (continued) AtTA= +25°C, VS+ = +5 V,differentialinputsignal,differentialVOUT = 2 VPP ,R L = 200 Ω differential,G = +20 dB,and inputand outputcommon-mode atinternalmidsupplyreference,unlessotherwisenoted. SECOND-ORDER INTERMODULATION DISTORTION THIRD-ORDER INTERMODULATION DISTORTION FOR FOUR OUTPUT LOADS (VOUT = 2 VPP ) FOR TWO GAINS AND FOUR OUTPUT LOADS (VOUT = 2 VPP ) Figure13. Figure14. SECOND-ORDER INTERMODULATION DISTORTION THIRD-ORDER INTERMODULATION DISTORTION FOR FOUR OUTPUT LOADS (VOUT = 2 VPP ) FOR TWO GAINS AND FOUR OUTPUT LOADS (VOUT = 2 VPP ) Figure15. Figure16. OUTPUT THIRD-ORDER INTERCEPT vs FREQUENCY (VOUT = 2 VPP ) Figure17.

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/c45 /c45 /c45 /c45 /c45 /c45 /c45 100 IMD (dBc) 50 100 150 200 250 300 Frequency□(MHz) R =□100 /c87L R =□200 R =□500 R =□1□k L L L /c87 /c87 /c87 V =□3□VOUT PP F□=□2□MHz/c68 Gain□=□+10□dB /c45 74 100 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 IMD (dBc) 50 100 150 200 250 300 Frequency□(MHz) R =□100 /c87L R =□200 R =□500 R =□1□k L L L /c87 /c87 /c87 Dashed□lines:□Gain□= 6□dB/c45 Solid□lines:□Gain□=□+10□dB V =□3□VOUT PP F□=□2□MHz/c68 100 /c45 /c45 /c45 /c45 /c45 /c45 /c45 IMD (dBc) 50 100 150 200 250 300 Frequency□(MHz) R =□100 /c87L R =□200 R =□500 R =□1□k L L L /c87 /c87 /c87 V =□3□VOUT PP F□=□2□MHz/c68 Gain□=□+20□dB /c45 74 100 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 IMD (dBc) 50 100 150 200 250 300 Frequency□(MHz) R =□100 /c87L R =□200 R =□500 R =□1□k L L L /c87 /c87 /c87 Dashed□lines:□Gain□=□0□dB Solid□lines:□Gain□=□+20□dB V =□3□VOUT PP F□=□2□MHz/c68 OIP (dBm) 50 100 150 200 250 300 Frequency□(MHz) V =□3□V R =□200 OUT PP L /c87 Gain□=□+20□dB Gain□=□+10□dB Gain□=□0□dB Gain□= 6□dB/c45 PGA870 www.ti.com SBOS436 –DECEMBER 2009 TYPICAL CHARACTERISTICS (continued) AtTA= +25°C, VS+ = +5 V,differentialinputsignal,differentialVOUT = 2 VPP ,R L = 200 Ω differential,G = +20 dB,and inputand outputcommon-mode atinternalmidsupplyreference,unlessotherwisenoted. SECOND-ORDER INTERMODULATION DISTORTION THIRD-ORDER INTERMODULATION DISTORTION FOR FOUR OUTPUT LOADS (VOUT = 3 VPP ) FOR TWO GAINS AND FOUR OUTPUT LOADS (VOUT = 3 VPP ) Figure18. Figure19. SECOND-ORDER INTERMODULATION DISTORTION THIRD-ORDER INTERMODULATION DISTORTION FOR FOUR OUTPUT LOADS (VOUT = 3 VPP ) FOR TWO GAINS AND FOUR OUTPUT LOADS (VOUT = 3 VPP ) Figure20. Figure21. OUTPUT THIRD-ORDER INTERCEPT vs FREQUENCY (VOUT = 3 VPP ) Figure22. Copyright© 2009,Texas InstrumentsIncorporated 9 ProductFolderLink(s):PGA870

/c45 55 100 105 110 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 45 100 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 Second-Order□Harmonic□Distortion□(dBc) Third-Order□Harmonic□Distortion□(dBc) 50 100 150 200 250 300 Frequency□(MHz) Gain□= 6□dB/c45 Gain□=□0□dB Dashed□lines:□2nd□Harmonic Solid□lines:□3rd□Harmonic V =□2□V R =□100 OUT PP L /c87 Gain□=□+10□dB Gain□=□+20□dB /c45 55 100 105 110 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 45 100 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 Second-Order□Harmonic□Distortion□(dBc) Third-Order□Harmonic□Distortion□(dBc) 50 100 150 200 250 300 Frequency□(MHz) Gain□= 6□dB/c45 Gain□=□0□dB Dashed□lines:□2nd□Harmonic Solid□lines:□3rd□Harmonic V =□2□V R =□200 OUT PP L /c87 Gain□=□+10□dB Gain□=□+20□dB /c45 55 100 105 110 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 45 100 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 Second-Order□Harmonic□Distortion□(dBc) Third-Order□Harmonic□Distortion□(dBc) 50 100 150 200 250 300 Frequency□(MHz) Gain□= 6□dB/c45 Gain□=□0□dB Dashed□lines:□2nd□Harmonic Solid□lines:□3rd□Harmonic V =□2□V R =□500 OUT PP L /c87 Gain□=□+10□dB Gain□=□+20□dB /c45 55 100 105 110 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 45 100 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 Second-Order□Harmonic□Distortion□(dBc) Third-Order□Harmonic□Distortion□(dBc) 50 100 150 200 250 300 Frequency□(MHz) Dashed□lines:□2nd□Harmonic Solid□lines:□3rd□Harmonic V =□2□V R =□1□k OUT PP L /c87 Gain□= 6□dB/c45 Gain□=□0□dB Gain□=□+10□dB Gain□=□+20□dB PGA870 SBOS436 –DECEMBER 2009 www.ti.com TYPICAL CHARACTERISTICS (continued) AtTA= +25°C, VS+ = +5 V,differentialinputsignal,differentialVOUT = 2 VPP ,R L = 200 Ω differential,G = +20 dB,and inputand outputcommon-mode atinternalmidsupplyreference,unlessotherwisenoted. HARMONIC DISTORTION vs FREQUENCY HARMONIC DISTORTION vs FREQUENCY (VOUT = 2 VPP ) (VOUT = 2 VPP ) Figure23. Figure24. HARMONIC DISTORTION vs FREQUENCY HARMONIC DISTORTION vs FREQUENCY (VOUT = 2 VPP ) (VOUT = 2 VPP ) Figure25. Figure26.

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/c45 55 100 105 110 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 40 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 Second-Order□Harmonic□Distortion□(dBc) Third-Order□Harmonic□Distortion□(dBc) 50 100 150 200 250 300 Frequency□(MHz) Gain□= 6□dB/c45 Gain□=□0□dB Dashed□lines:□2nd□Harmonic Solid□lines:□3rd□Harmonic V =□3□V R =□100 OUT PP L /c87 Gain□=□+10□dB Gain□=□+20□dB /c45 55 100 105 110 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 40 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 Second-Order□Harmonic□Distortion□(dBc) Third-Order□Harmonic□Distortion□(dBc) 50 100 150 200 250 300 Frequency□(MHz) Gain□= 6□dB/c45 Gain□=□0□dB Dashed□lines:□2nd□Harmonic Solid□lines:□3rd□Harmonic V =□3□V R =□200 OUT PP L /c87 Gain□=□+10□dB Gain□=□+20□dB /c45 55 100 105 110 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 40 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 Second-Order□Harmonic□Distortion□(dBc) Third-Order□Harmonic□Distortion□(dBc) 50 100 150 200 250 300 Frequency□(MHz) Gain□= 6□dB/c45 Gain□=□0□dB Dashed□lines:□2nd□Harmonic Solid□lines:□3rd□Harmonic V =□3□V R =□500 OUT PP L /c87 Gain□=□+10□dB Gain□=□+20□dB /c45 55 100 105 110 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 40 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 Second-Order□Harmonic□Distortion□(dBc) Third-Order□Harmonic□Distortion□(dBc) 50 100 150 200 250 300 Frequency□(MHz) Gain□= 6□dB/c45 Gain□=□0□dB Dashed□lines:□2nd□Harmonic Solid□lines:□3rd□Harmonic V =□3□V R =□1□k OUT PP L /c87 Gain□=□+10□dB Gain□=□+20□dB PGA870 www.ti.com SBOS436 –DECEMBER 2009 TYPICAL CHARACTERISTICS (continued) AtTA= +25°C, VS+ = +5 V,differentialinputsignal,differentialVOUT = 2 VPP ,R L = 200 Ω differential,G = +20 dB,and inputand outputcommon-mode atinternalmidsupplyreference,unlessotherwisenoted. HARMONIC DISTORTION vs FREQUENCY HARMONIC DISTORTION vs FREQUENCY (VOUT = 3 VPP ) (VOUT = 3 VPP ) Figure27. Figure28. HARMONIC DISTORTION vs FREQUENCY HARMONIC DISTORTION vs FREQUENCY (VOUT = 3 VPP ) (VOUT = 3 VPP ) Figure29. Figure30. Copyright© 2009,Texas InstrumentsIncorporated 11 ProductFolderLink(s):PGA870

2.25 2.00 1.75 1.50 1.25 1.00 0.75 0.50 0.25 0.25/c45 1.5 1.2 0.9 0.6 0.3 0.3/c45 /c45 /c45 /c45 /c45 0.6 0.9 1.2 1.5 Disable□Signal□Amplitude□(V) Amplifier□Output□(V) 100 200 300 400 500 Time□(ns) Disable□Signal Amplifier□Output Noise□Figure□(dB) /c45 12 /c45 8 /c45 4 0 4 8 12 16 22 2018141062/c45 2/c45 6/c45 10 Gain□(dB) f□=□100□MHz R =□150SYS /c87 1.5 1.0 0.5 0.5 1.0 1.5 /c45 /c45 /c45 0.15 0.10 0.05 0.05 0.10 0.15 /c45 /c45 /c45 Large-Signal□Differential□Output□(V) Small-Signal□Differential□Output□(V) 0 5 10 15 20 25 Time□(2.5□ns/div) Gain□=□20□dB,□R =□200 /c87L Right□Scale Left□Scale /c45 /c45 /c45 /c45 /c45 100 120 140 Forward□Isolation□(dB) 0 100 200 300 400 500 Frequency□(MHz) 160 150 140 130 120 110 100 20/c45 /c45 /c45 /c45 /c45 Input□Impedance□Magnitude□( ) /c87 Input□Impedance□Phase□( )/c176 Frequency□(Hz) Magnitude Phase 60/c45 /c45 /c45 /c45 /c45 /c45 Input□Return□Loss□(dB) 100□M 1□G Frequency□(Hz) Z =□150 /c87SYS 20□dB 10□dB 0□dB 6□dB/c45 PGA870 SBOS436 –DECEMBER 2009 www.ti.com TYPICAL CHARACTERISTICS (continued) AtTA= +25°C, VS+ = +5 V,differentialinputsignal,differentialVOUT = 2 VPP ,R L = 200 Ω differential,G = +20 dB,and inputand outputcommon-mode atinternalmidsupplyreference,unlessotherwisenoted. NOISE FIGURE vs GAIN DISABLE STEP RESPONSE Figure31. Figure32. LARGE- AND SMALL-SIGNAL FORWARD ISOLATION vs FREQUENCY DIFFERENTIAL PULSE RESPONSE IN DISABLED MODE Figure33. Figure34. DIFFERENTIAL INPUT RETURN LOSS DIFFERENTIAL INPUT IMPEDANCE vs FREQUENCY Figure35. Figure36.

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0.1 Output□Impedance□Magnitude□( ) /c87 10□k 100□k 1□M 10□M 100□M 300□M Frequency□(Hz) 100 Output□Impedance□Phase□( )/c176 Magnitude Phase 35/c45 /c45 /c45 /c45 /c45 /c45 /c45 Input□Return□Loss□(dB) 10□M 100□M 1□G Frequency□(Hz) Z =□150 /c87SYS 20□dB 10□dB 0□dB 6□dB/c45 5.5 5.0 4.5 4.0 3.5 Differential□Output□Swing□(V) 100 1□k 10□k Differential□Load□Resistance,□R ( ) /c87LOAD Power-Supply□Rejection□Ratio□(dB)Common-Mode□Rejection□Ratio□(dB) Frequency□(Hz) CMRR PSRR PGA870 www.ti.com SBOS436 –DECEMBER 2009 TYPICAL CHARACTERISTICS (continued) AtTA= +25°C, VS+ = +5 V,differentialinputsignal,differentialVOUT = 2 VPP ,R L = 200 Ω differential,G = +20 dB,and inputand outputcommon-mode atinternalmidsupplyreference,unlessotherwisenoted. SINGLE-ENDED INPUT RETURN LOSS vs FREQUENCY DIFFERENTIAL OUTPUT IMPEDANCE Figure37. Figure38. DIFFERENTIAL OUTPUT SWING PSRR AND CMRR vs R LOAD vs FREQUENCY Figure39. Figure40. Copyright© 2009,Texas InstrumentsIncorporated 13 ProductFolderLink(s):PGA870

Gain□Control BIAS Control Gain Strobe Latch Mode (LSB) B1 B2 B3 B4 B5 (MSB) Disable OUT/c45 OUT+ PGA870 Gain□=□+20□dB PGA870 SBOS436 –DECEMBER 2009 www.ti.com

APPLICATION INFORMATION

The PGA870 isa wideband,fullydifferential,programmable-gainamplifier.Lookingat the blockdiagram in Figure41,thePGA870 can be separatedintothefollowingfunctionalblocks:

• InputAttenuator
• BufferedMUX
• OutputAmplifier
• 8-bitdigitalinterface
• Power function Figure41. PGA870 Block Diagram InputAttenuator The inputstageofthePGA870 consistsofa logarithmicR2R ladderand presentsa 150-Ω loadtotheprevious stage.To minimizeinputreturnlossand noisefigure,itisrecommended toprovidea 150-Ω matchingforthat input.Thisinputcan be driveneitherdifferentiallyorsingle-ended. This resistiveinputnetworkisinternallybiasedto midsupplyby an internalbuffer(VMID2 on pin 4).Proper bypassingisrequiredon thisnode (0.1μF).The buffermidsupplyisgeneratedby a passiveresistornetwork (VMID1 on pin28).A 0.1-μF capacitorisexpectedon VMID1 foradequatebypassing.AlthoughVMID1 and VMID2 are externallyaccessible,neitherofthesepinsisintendedtobe externallydriven.Additionally,VMID2 isnotintended todrivethemidsupplyreferencetoanotherchip,butcan sourceapproximately200 μA ifrequired. Duringpower-down operation,theinputmaintainsitsnominaldifferentialresistance.However, VMD1 and VMID2 fallto0 V. The inputattenuatoriscontrolledviathethreemost significantbits(MSBs) ofthegaincontrol.RefertoTable1 forthestepsizeofeach ofthesethreeMSBs. InputAmplifierand BufferedMUX Followingtheinputattenuatorisa programmablebufferstage;thegainoftheprogrammablebufferiscontrolled by thethreeleastsignificantbits(LSBs)ofthegain-controlword.RefertoTable1 forthestepsizeofeach of thesethreeLSBs.

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www.ti.com SBOS436 –DECEMBER 2009 Table1.Gain Bitsand Corresponding Gain Step Sizes(indB) (MSB) (LSB) B5 B4 B3 B2 B1 B0 16 8 4 2 1 0.5 Output Amplifier The PGA870 has a differential,voltage-modeoutputstagewitha differentialoutputresistanceofapproximately 0.3Ω and an inductivereactanceequivalentto3.8nH. The common-mode outputvoltagehas a nominalvalueof VMID2 .Thisoutputamplifierhas a nominalgainof+20 dB. The nominalloadis200 Ω,butthePGA870 can driveloadsas low as 100 Ω withonlyminorchanges tothe devicedistortion. The outputpinsgo toa high-impedancestatewhen thedeviceisthepower-down state(thatis,when PD islow). 8-bitDigitalInterface The 8-bitdigitalinterfaceiscomposed ofsixbits:threeMSBs thatcontroltheinputattenuationand threeLSBs thatcontroltheinputamplifierand bufferedMUX. Formore informationon thisparallelinterface,refertotheGain Controland LatchModes section. Power function The PGA870 featuresa low-powerdisabledstatefortheanalogcircuitrywhen thepower-down (PD) pinislow. Inthedisabledstate,thedigitalcircuitryremainsactive,whichallowsthegaintobe setbeforedevicepower-up. There isno internalcircuitrytoprovidea nominalbiastothispin.Ifthispinistobe leftopen,itmust be biased withan externalpull-upresistor. Note thatwhen the PGA870 isin thislow-powermode, the gain can be programmed usingthe 8-bitdigital interface,the outputpinsgo to a high-impedancestate,and the voltageon the midsupplypinsbiasingthe attenuator(pin4 and pin28)goes to0 V. Gain Controland Latch Modes The PGA870 has sixbitsofgaincontrol(B5 toB0) thatgivean extendedgainrangefroma maximum gainof20 dB toa minimum gainof–11.5dB. The LSB (B0)representsa minimum gainchange (stepsize)of0.5dB, and theLSB (B5)representsa gainchange of16 dB. The equivalentgainstepsizeofeach gaincontrolbitisshown inTable1.The devicevoltagegaincan be expressedby thefollowingequation: GaindB= 20 dB − 0.5dB × (NG − 63) N G istheequivalentbase-10integernumber thatcorrespondstothebinarygaincontrolword.A summary ofthe 63 possibledevicegainsversusNG and thevaluesofB0 toB5 areshown inTable2. The highand low voltagethresholdsallowallofthegaincontrolpinstobe controlledby CMOS circuitry.There areno internalpull-upresistorson thegain-controlpins.Ifthepinsaretobe leftopen,theymust be biasedwith externalpull-upresistors. The PGA870 can be configuredso the devicegainiscontrolledby onlythe sixgainbits(no latch) when the GAIN STROBE pinand theGAIN MODE pinarebothheldhigh.Inthisoperatingmode, thedevicevoltagegain followsthe signalson pinsB0 to B5. Transientson the sixgainbitscan cause changes to the PGA870 gain whileinthismode, as well.To combat thispossibility,thePGA870 alsosupportstwo gainmodes where thegain bitdataareacquiredand latchedby signalson theGAIN STROBE pin. The deviceisconfiguredfora level-triggeredlatchwhen theLATCH MODE pinishigh;thisconfigurationallows the sixgain bitsto be acquiredand latchedonlyon a high signalon the GAIN STROBE. When the GAIN STROBE signalgoes low,thegain-controldataarelatchedand thePGA870 gainisindependentofthesixgain bitsuntiltheGAIN STROBE goes highagain. IfthePGA870 LATCH MODE pinislow,thedeviceisconfiguredforan edge-triggeredlatchthatacquiresand latchesthesixgain-controlbitsonlyon thefallingedge oftheGAIN STROBE signal. Copyright© 2009,Texas InstrumentsIncorporated 15 ProductFolderLink(s):PGA870

SBOS436 –DECEMBER 2009 www.ti.com Table2.PGA870 Gain and Corresponding Gain Word Values Gain Gain State Gain (MSB) (LSB) State Gain (MSB) (LSB) NG (dB) B5 B4 B3 B2 B1 B0 NG (dB) B5 B4 B3 B2 B1 B0 63 20 1 1 1 1 1 1 31 4 0 1 1 1 1 1 62 19.5 1 1 1 1 1 0 30 3.5 0 1 1 1 1 0 61 19 1 1 1 1 0 1 29 3 0 1 1 1 0 1 60 18.5 1 1 1 1 0 0 28 2.5 0 1 1 1 0 0 59 18 1 1 1 0 1 1 27 2 0 1 1 0 1 1 58 17.5 1 1 1 0 1 0 26 1.5 0 1 1 0 1 0 57 17 1 1 1 0 0 1 25 1 0 1 1 0 0 1 56 16.5 1 1 1 0 0 0 24 0.5 0 1 1 0 0 0 55 16 1 1 0 1 1 1 23 0 0 1 0 1 1 1 54 15.5 1 1 0 1 1 0 22 -0.5 0 1 0 1 1 0 53 15 1 1 0 1 0 1 21 -1 0 1 0 1 0 1 52 14.5 1 1 0 1 0 0 20 -1.5 0 1 0 1 0 0 51 14 1 1 0 0 1 1 19 -2 0 1 0 0 1 1 50 13.5 1 1 0 0 1 0 18 -2.5 0 1 0 0 1 0 49 13 1 1 0 0 0 1 17 -3 0 1 0 0 0 1 48 12.5 1 1 0 0 0 0 16 -3.5 0 1 0 0 0 0 47 12 1 0 1 1 1 1 15 -4 0 0 1 1 1 1 46 11.5 1 0 1 1 1 0 14 -4.5 0 0 1 1 1 0 45 11 1 0 1 1 0 1 13 -5 0 0 1 1 0 1 44 10.5 1 0 1 1 0 0 12 -5.5 0 0 1 1 0 0 43 10 1 0 1 0 1 1 11 -6 0 0 1 0 1 1 42 9.5 1 0 1 0 1 0 10 -6.5 0 0 1 0 1 0 41 9 1 0 1 0 0 1 9 -7 0 0 1 0 0 1 40 8.5 1 0 1 0 0 0 8 -7.5 0 0 1 0 0 0 39 8 1 0 0 1 1 1 7 -8 0 0 0 1 1 1 38 7.5 1 0 0 1 1 0 6 -8.5 0 0 0 1 1 0 37 7 1 0 0 1 0 1 5 -9 0 0 0 1 0 1 36 6.5 1 0 0 1 0 0 4 -9.5 0 0 0 1 0 0 35 6 1 0 0 0 1 1 3 -10 0 0 0 0 1 1 34 5.5 1 0 0 0 1 0 2 -10.5 0 0 0 0 1 0 33 5 1 0 0 0 0 1 1 -11 0 0 0 0 0 1 32 4.5 1 0 0 0 0 0 0 -11.5 0 0 0 0 0 0 Table3.Gain ControlSignalsand Latch Modes Latch Mode GAIN STROBE LATCH MODE CONDITION Devicegainfollowsand latchesgaincontrolword (B0Edge-triggeredlatch Fallingedge Low toB5) onlyon GAIN STROBE fallingedge. Devicegainfollowsgaincontrolword (B0 toB5) when Level-triggeredlatch Low High GAIN STROBE and LATCH MODE arebothhigh. Devicegainlatcheswhen GAIN STROBE goes low. Devicegainislevel-triggeredon thegain-controlword No latch High High (B0 toB5) when LATCH MODE ishighand GAIN STROBE remainshigh.

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Gain□Strobe Latch□Mode Gain□Bits B5□to□B0 (MSB□to□LSB) Gain Latched□on Gain□Strobe Falling□Edge Latched□on Gain□Strobe High□Level No□Latch Follows Gain□Control□Word Gain□Strobe Latch□Mode Gain□Bits B5□to□B0 (MSB□to□LSB) Gain tSU tHOLD tLATENCY PGA870 www.ti.com SBOS436 –DECEMBER 2009 Table3 and Figure42 show a summary tableand timingdiagramsofthegainmodes, respectively.Figure43 illustratesa timingdiagram thatdefinesthe transitionsand timingof the set-upand hold times forboth level-triggeredand edge-triggeredlatchmodes. Figure42. Gain Mode Timing Figure43. Set-Up and Hold Times: Level-Triggeredand Edge-TriggeredLatch Modes Copyright© 2009,Texas InstrumentsIncorporated 17 ProductFolderLink(s):PGA870

+5□V 1k /c87 B0□to□B5

0.1 F/c109

From□50- Source /c87 VMID2 (1) GS (1) PD PGA870 B0□to□B5 PGA870 SBOS436 –DECEMBER 2009 www.ti.com Single-EndedtoDifferentialOperation Figure44 representsa single-endedtodifferentialconversiontestconfigurationwitha 50-Ω sourceand a 200-Ω load.The midsupplypinsVMID1 and VMID2 are properlybypassed;because thiscircuitisac-coupled,thesepins providethebiasingvoltagerequiredby thePGA870 inputstage.The LATCH MODE, GAIN STROBE, and PD pinsareconnectedtothesupplyvoltagethrougha pull-upresistor.The PD pinsethighpowers up thePGA870, whilesettingtheLATCH MODE and GAIN STROBE pinshighbypassesthelatchmode, allowinginstantaneous gainchanges as B5 toB0 change.On thenoninvertinginput,a 75-Ω resistancewas added toadaptthe150 Ω to 50 Ω and match the50-Ω source. Ifa differentialsignalsourceistobe dc-coupledtothedevice,itshouldhave a common-mode voltagethatis within0.2 V of the midsupplyreference.Ifthe inputcommon-mode/dc voltageis greaterthan 0.2 V from midsupply,then increaseddistortionand reduced performancecan result.The non-driveninputpin of the PGA870 shouldbe ac-coupledtogroundthrougha capacitor.Ifa single-endedsignalsourceisdc-coupledtoan inputpin,and the non-driveninputpinisgrounded,the PGA870 amplifiesthe desiredsignalas wellas the differencebetween theoffsetfromthePGA870 midsupplyreference,VMID1 . (1) LM = LATCH MODE pin(pin1),GS = GAIN STROBE pin(pin7). Figure44. Basic Connections forSingle-EndedtoDifferentialConversion

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+5□V 1k /c87 B0□to□B5 From□150- Differential□Source /c87 VMID2 (1) GS (1) PD PGA870 B0□to□B5 PGA870 www.ti.com SBOS436 –DECEMBER 2009 Differential-to-DifferentialOperation Differentialoperationof PGA870 isshown inFigure45. In thisexample,both inputpinsare connectedto a differential150-Ω source.The PGA870 isdrivinga typical200-Ω load.Both midsupplyvoltagepinsVMID1 and VMID2 arebypassed witha 0.1-μF capacitor.The LATCH MODE, GAIN STROBE, and PD pinsareconnectedto thepower supplyusinga 1-kΩ pull-upresistor.The PD pinsethighpowers up thePGA870, whilesettingthe LatchMode and theGain Strobepinshighbypassesthelatchmode, allowinginstantaneousgainchanges as B5 toB0 change. (1) LM = LATCH MODE pin(pin1),GS = GAIN STROBE pin(pin7). Figure45. Basic Connections forFullyDifferentialOperation PCB Layout Recommendations Complete informationaboutthePGA870EVM isfoundinthePGA870EVM User Guide,availablefordownload throughthe PGA870 productfolderon the TI web site.Printedcircuitboard (PCB) layoutshouldfollowthese generalguidelines: 1. Signalroutingshouldbe directand as shortas possibleintoand out of the deviceinputand outputpins. Routingthesignalpathbetween layersusingviasshouldbe avoidedifpossible. 2. The devicePowerPAD shouldbe connectedtoa solidgroundplanewithmultiplevias.The PowerPAD must be connectedtoelectricalground.ConsultthePGA870EVM User Guide fora layoutexample. 3. Ground orpower planesshouldbe removed fromdirectlyundertheamplifieroutputpins. 4. A 0.1-μF capacitorshouldbe placedbetween theVMID pinand groundneartothepin. 5. An outputresistorisrecommended ineach outputlead,placedas neartotheoutputpinsas possible. 6. Two 0.1-μF power-supplydecouplingcapacitorsshouldbe placedas near to the power-supplypinsas possible. 7. Two 10-μF power-supplydecouplingcapacitorsshouldbe placedwithin1 in(2,54cm) ofthedevice. 8. The digitalcontrolpinsuse CMOS logiclevelsforhighand low signals,butcan toleratebeingpulledhighto a +5-V power supply.The digitalcontrolpinsdo nothave internalpull-upresistors. Copyright© 2009,Texas InstrumentsIncorporated 19 ProductFolderLink(s):PGA870

Orderable Device Status(1) Package Type Package Drawing Pins Package Qty Eco Plan(2) Lead/Ball FinishMSL Peak Temp (3) PGA870IRHDR ACTIVE VQFN RHD 28 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR PGA870IRHDT ACTIVE VQFN RHD 28 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR (1)The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2)Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontentfor the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS):TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt):This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br):TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. PACKAGE OPTION ADDENDUM www.ti.com 24-Dec-2009 Addendum-Page 1

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