Amplifier

PGA870

National Semiconductor ...

High-Speed, Fully Differential, Programmable-Gain Amplifier

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Control□LogicPGA870 6bSignal□Source +5□V Bandpass Filter ADS6149 F =□250□MHzS Powerdown□1 Latch□Mode 1 Gain□Strobe□1 FPGA 6b□Gain□Adjust Fast□Gain□Control□Loop PGA870 www.ti.com SBOS436A –DECEMBER 2009–REVISED FEBRUARY 2011 High-Speed,FullyDifferential,Programmable-GainAmplifier Check forSamples: PGA870 1FEATURES DESCRIPTION 23• Wideband +5-V Operation:650-MHz Bandwidth The PGA870 is a wideband programmable-gain amplifier(PGA) forhigh-speedsignalchainand data• Low Impedance, VoltageMode Output acquisitionsystems. The PGA870 has been• Wide Gain Range: –11.5dB to+20 dB optimizedto providehigh bandwidth,low distortion,• Precise0.5-dBGain Steps and low noise,making itideallysuitedas a 14-bit Step-to-StepGain Error= ±0.03dB analog-to-digitalconverter(ADC) driverforwireless base stationsignalchainapplications.The wide gain• HD 2:–93 dBc at100 MHz range of –11.5 dB to +20 dB can be adjustedin• HD 3:–88 dBc at100 MHz 0.5-dBgainstepsthrougha 6-bitcontrolword applied• IMD 3:–98 dBc at100 MHz, –95 dBc at200 MHz to the parallelinterface.The gain controlinterface may be configuredas a level-triggeredlatchor an• OIP3:+47 dBm at100 MHz; edge-triggeredlatch,or itmay be placed in anExceeds +45 dBm forFrequenciesto300 MHz unlatched(transparent)mode. Inadditiontothe6-bit• FlexibleGain ControlInterface: gaincontrol,thePGA870 containsa power-down pin– Supports latchedand unlatchedoptions (PD) thatcan be used to put the device intoa low-current,power-down mode. In thismode, the– Gain may be setinpower-down state quiescentcurrentdropsto2 mA, butthegaincontrol– Fastsetup and hold times:2.5ns circuitryremains active,allowingthe gain of the• Low DisableCurrent:2 mA PGA870 to be set before device power-up. The

Pb-Free(RoHS-Compliant)and Green Package PGA870 is offered in a QFN-28 PowerPAD ™ package.

APPLICATIONS

RELATED PRODUCTS• Programmable Gain IFAmplifier: DEVICE DESCRIPTION– Differentialsignalchains Wideband,low-noise,low-distortion,fully– Single-endedtodifferentialconversion THS4509 differentialamplifier

FastGain ControlLoops for: THS7700 High-speed,fullydifferential16-bitADC driver – Test/measurement THS9000 50-MHz to400-MHz IF/RFAmplifier – Digitalradiosignalchains 14-Bit,250-MSPS ADC withDDRADS6149 LVDS/CMOS Outputs• ADC DriverforWirelessBase StationSignal Chains:GSM, WCDMA, MC-GSM ADS6145 14-Bit,125-MSPS ADC withDDR LVDS/CMOS Outputs• Radar/Ranging Systems ADS58C48 Quad channelIFreceiverwithSNRBoost 3G Pleasebe aware thatan importantnoticeconcerningavailability,standardwarranty,and use incriticalapplicationsofTexas Instrumentssemiconductorproductsand disclaimerstheretoappearsattheend ofthisdatasheet. 2PowerPAD isa trademarkofTexas Instruments. 3Allothertrademarksarethepropertyoftheirrespectiveowners. PRODUCTION DATA informationiscurrentas ofpublicationdate. © 2009–2011,Texas InstrumentsIncorporatedProductsconform to specificationsper the terms of the Texas Instrumentsstandardwarranty.Productionprocessingdoes not necessarilyincludetestingofallparameters.

SBOS436A –DECEMBER 2009–REVISED FEBRUARY 2011 www.ti.com This integratedcircuitcan be damaged by ESD. Texas Instrumentsrecommends thatallintegratedcircuitsbe handled with appropriateprecautions.Failuretoobserveproperhandlingand installationprocedurescan cause damage. ESD damage can rangefromsubtleperformancedegradationtocompletedevicefailure.Precisionintegratedcircuitsmay be more susceptibletodamage because verysmallparametricchanges couldcause thedevicenottomeet itspublishedspecifications. ORDERING INFORMATION (1) SPECIFIED PACKAGE TEMPERATURE PACKAGE ORDERING TRANSPORT MEDIA, PRODUCT PACKAGE-LEAD DESIGNATOR RANGE MARKING NUMBER QUANTITY PGA870 PGA870IRHDT Tape and Reel,250 PGA870 QFN-28 RHD –40°C to+85°C PGA870 PGA870IRHDR Tape and Reel,3000 (1) Forthemost currentpackage and orderinginformationsee thePackage OptionAddendum attheend ofthisdocument,orsee theTI web siteatwww.ti.com. ABSOLUTE MAXIMUM RATINGS (1) Over operatingfree-airtemperaturerange,unlessotherwisenoted. PGA870 UNIT Power supply 6 V Internalpower dissipation See ThermalCharacteristics Inputvoltagerange VS V Storagetemperaturerange –65 to+150 °C Maximum junctiontemperature(TJ) +150 °C Maximum junctiontemperature(TJ),continuousoperation,long-termreliability +140 °C Human body model (HBM) 2000 V ESD rating Charged devicemodel (CDM) 1000 V Machine model (MM) 200 V (1) Stressesabove theseratingsmay cause permanentdamage. Exposuretoabsolutemaximum conditionsforextendedperiodsmay degradedevicereliability.These arestressratingsonly,and functionaloperationofthedeviceattheseorany otherconditionsbeyond thosespecifiedisnotsupported. DISSIPATION RATINGS (1) POWER RATING (2) (TJ= +125°C) PACKAGE θJP(°C/W) θJA (°C/W) TA = +25°C TA = +85°C QFN-28 4.1 35 2.9W 0.87W (1) These datawere takenwiththeJEDEC High-KtestPCB. FortheJEDEC low-KtestPCB, θJA is350°C/W. (2) Power ratingisdeterminedwitha junctiontemperatureof+125°C. Thisisthepointwhere distortionstartstosubstantiallyincreaseand long-termreliabilitystartstobe reduced.Thermalmanagement ofthefinalprintedcircuitboardshouldstrivetokeep thejunction temperatureatorbelow+125° C forbestperformanceand reliability. 2 © 2009–2011,Texas InstrumentsIncorporated ProductFolderLink(s):PGA870

www.ti.com SBOS436A –DECEMBER 2009–REVISED FEBRUARY 2011 ELECTRICAL CHARACTERISTICS: VS+ = +5 V Boldfacelimitsaretestedat+25°C . AtTA= +25°C, VS+ = +5 V,differentialinputsignal,differentialVOUT = 2 VPP ,R L= 200 Ω differential,G = 20 dB,and inputand outputcommon-mode atinternalmidsupplyreference,unlessotherwisenoted. PGA870IRHD TEST PARAMETER CONDITIONS MIN TYP MAX UNITS LEVEL (1) AC PERFORMANCE Small-signalbandwidth G = 20 dB,VO = 100 mV PP 650 MHz C Large-signalbandwidth G = 20 dB,VO = 2 VPP 650 MHz C Bandwidthfor0.1-dBflatness 100 MHz C Slew rate(differential) 2-V step 2900 V/µs C Risetime 2-V step 0.55 ns C Falltime 2-V step 0.55 ns C Settlingtimeto1% 2-V step 3 ns C Settlingtimeto0.1% 2-V step 5 ns C Noisefigure 150-Ω system,Gain = +20 dB,f= 100 MHz 13 dB C Gain = +20 dB,f> 1 MHz 30 nV/√Hz C Output-referredvoltagenoise Gain = –11 dB,f> 1 MHz 40 nV/√Hz C HARMONIC DISTORTION Gain = +20 dB, VO = 2 VPP ,R L = 200 Ω f= 50 MHz –108 dBc C Second-orderharmonicdistortion f= 100 MHz –93 dBc C f= 200 MHz –71 dBc C f= 50 MHz –95 dBc C Third-orderharmonicdistortion f= 100 MHz –88 dBc C f= 200 MHz –75 dBc C f1(MHz) f2(MHz) C 49 51 -87 dBc CSecond-orderintermodulation 2-MHz tone distortion spacing 99 101 -90 dBc C 199 201 -89 dBc C 49 51 -103 dBc C 2-MHz toneThird-orderintermodulationdistortion 99 101 –98 dBc Cspacing 199 201 –95 dBc C 49 51 50 dBm C VOUT = 2 VPP ,Outputthird-orderintercept 99 101 47 dBm CR L = 200 Ω 199 201 45 dBm C DC TA= +25°C –30 ±5 30 mV A Outputoffsetvoltage TA= –40°C to+85°C –35 35 mV B Averageoffsetvoltagedrift TA= –40°C to+85°C 20 μV/°C B INPUT Inputreturnloss ZSYS = 150 Ω,frequency< 300MHz -40 dB B Differentialinputresistance 129 150 173 Ω B Differentialinputcapacitance 1.2 pF C Single-endedinputresistance 141 Ω B Common-mode rejectionratio TA= +25°C, Gain = 20 dB 54 76 dB A (1) Testlevels:(A)100% testedat+25°C. Over temperaturelimitssetby characterizationand simulation.(B)Limitssetby characterization and simulation.(C)Typicalvalue;onlyforinformation. © 2009–2011,Texas InstrumentsIncorporated 3 ProductFolderLink(s):PGA870

SBOS436A –DECEMBER 2009–REVISED FEBRUARY 2011 www.ti.com ELECTRICAL CHARACTERISTICS: VS+ = +5 V (continued) Boldfacelimitsaretestedat+25°C . AtTA= +25°C, VS+ = +5 V,differentialinputsignal,differentialVOUT = 2 VPP ,R L= 200 Ω differential,G = 20 dB,and inputand outputcommon-mode atinternalmidsupplyreference,unlessotherwisenoted. PGA870IRHD TEST PARAMETER CONDITIONS MIN TYP MAX UNITS LEVEL (1) OUTPUT TA= +25°C 3.5 3.7 V A Maximum outputvoltagehigh Each outputwith TA= –40°C to+85°C 3.4 V B 100 Ω to TA= +25°C 1.3 1.5 V AmidsupplyMinimum outputvoltagelow TA= –40°C to+85°C 1.6 V B TA= +25°C, R L = 200 Ω 4 4.8 VPP B Differentialoutputvoltageswing TA= –40°C to+85°C 3.6 VPP B Differentialoutputcurrentdrive TA= +25°C, R L = 20 Ω 40 50 mA P A Outputcommon-mode offsetfrom TA= +25°C, R L = 20 Ω –60 ±10 60 mV Amidsupply Differentialoutputimpedance f= 100 MHz 3.5/87 Ω /° B Differentialoutputimpedance model SeriesR OUT,EQ ,LOUT,EQ 0.3/3.8 Ω /nH B POWER SUPPLY Specifiedoperatingvoltage 4.75 5 5.25 V C TA= +25°C 138 143 148 mA A Quiescentcurrent TA= –40°C to+85°C 136 150 mA B Power-supplyrejectionratio(PSRR) TA= +25°C, Gain = 20 dB (2) 54 76 dB A POWER DOWN Devicepower-upvoltagethreshold Ensuredon above 2.1V 2.1 V A Devicepower-down voltagethreshold Ensuredoffbelow0.9V 0.9 V A TA= +25°C 2 4 mA A Power-down quiescentcurrent TA= –40°C to+85°C 4.8 mA B Forwardisolationinpower-down state f= 100 MHz -110 dB C PD pininputbiascurrent PD = VS– 0.5 μA B PD pininputimpedance 20 ||0.5 kΩ ||pF C Turn-ontimedelay Measured tooutputon 16 ns C Turn-offtimedelay Measured tooutputoff 60 ns C GAIN SETTING Gain range –11.5 +20 dB A Gain control:G0 toG5 6 Bits B Gain stepsize –11.5dB ≤ Gain ≤ +20 dB 0.50 dB A Absolutegainerror –0.35 ±0.05 0.35 dB A Gain erroroverentiregainrange Steptostepgainerror –0.10 ±0.03 0.10 dB A Gain temp coefficient 0.0018 0.0022 0.0026 dB/°C B Gain settlingtime 5 ns B DIGITAL INPUTS B0 toB5 and Latch Digitalthresholdlow 0.9 V A Digitalthresholdhigh 2.1 V A Currentinto/outofdigitalpins ±20 nA C Data setup timetoGAIN STROBE low 2.5 ns C Data holdtimeafterGAIN STROBE 0 ns Clow Latencytime 6.4 ns C (2) PSRR isdefinedwithrespecttoa differentialoutput. 4 © 2009–2011,Texas InstrumentsIncorporated ProductFolderLink(s):PGA870

LATCH□MODE (MSB)□B5 VS+ IN+ VMID2 V IN/c45 VS+ GAIN□STROBE GND V OUT+ GND OUT/c45 V GND 13 141211108 22232425262728 V MID1 GNDV GNDGNDGNDPD PowerPAD/c228 PGA870 www.ti.com SBOS436A –DECEMBER 2009–REVISED FEBRUARY 2011 PIN CONFIGURATION QFN-28 RHD PACKAGE (TOP VIEW) PIN ASSIGNMENTS PIN NUMBER PIN NAME DESCRIPTION Controlslatchedand unlatchedacquisitionofthegaincontrolword (B0 toB5).See theapplicationsectionGain1 LATCH MODE ControlModes fora detaileddescription. 2,6,11,16,20,25 VS+ +5V power supply

3 IN+ Noninvertinginput

Bufferoutputfortheinternalmidsupplyreference.Thispointistheoutputofan activebufferwhichisnotintended4 VMID2 todrivean externalload.Itshouldbe bypassedby a 0.1-μF capacitor.

5 IN– Invertinginput

7 GAIN STROBE Gain latchclockpin

8 B5 (MSB) Gain controlMSB

9 B4 Gain controlbit4

10 B3 Gain controlbit3

12 B2 Gain controlbit2

13 B1 Gain controlbit1

14 B0 (LSB) Gain controlbit0

17 OUT – Invertingoutput

15,18,21,22,23, GND Ground24,26

19 OUT+ Noninvertingoutput

27 PD Activelowpower-down fordeviceanalogcircuitry.Gain controlCMOS circuitryisstillactivewhen PD islow. Chipbypasspinforinternalmidsupplyreference.Thispointisthemidpointofa resistivevoltagedividerand isnot28 VMID1 intendedtofunctionas an input.Itshouldbe bypassedwitha 0.1-μF capacitor. ThermalPad PowerPAD Thermalcontactforheatdissipation.The thermalpad must be connectedtoelectricalground. © 2009–2011,Texas InstrumentsIncorporated 5 ProductFolderLink(s):PGA870

/c45 /c45 /c45 Gain□(dB) 10 100 1000 Frequency□(MHz) Gain□=□+5□dB Gain□= 11.5□dB/c45 Gain□Adjusted□in□0.5-dB□Steps V =□200□mVOUT PP Gain□(dB) 10 100 1000 Frequency□(MHz) Gain□=□+20□dB Gain□=□+5.5□dB Gain□Adjusted□in□0.5-dB□Steps V =□200□mVOUT PP /c45 /c45 /c45 /c45 Gain□(dB) 10 100 1000 Frequency□(MHz) Gain□=□20□dB Gain□=□10□dB Gain□=□0□dB Gain□= 6□dB/c45 Differential□Input V =□2□VOUT PP 20/c45 /c45 /c45 /c45 Gain□(dB) 10 100 1000 Frequency□(MHz) Gain□=□20□dB Gain□=□10□dB Gain□=□0□dB Gain□= 6□dB/c45 Single-Ended□Input V =□2□VOUT PP 10 100 1000 Frequency□(MHz) Gain□(dB) C =□820□pFL C =□470□pFL C =□94□pFL C =□44□pFL C = 10□pF L C = 20□pF L C = 16□pF L PGA870 ROS VOUT ROS CL CL 100 R ( ) /c87 OS 1 10 100 1000 Capacitive□Load□(pF) PGA870 ROS VOUT ROS CL CL PGA870 SBOS436A –DECEMBER 2009–REVISED FEBRUARY 2011 www.ti.com TYPICAL CHARACTERISTICS AtTA= +25°C, VS+ = +5 V,differentialinputsignal,differentialVOUT = 2 VPP ,R L = 200 Ω differential,G = +20 dB,and inputand outputcommon-mode atinternalmidsupplyreference,unlessotherwisenoted. SMALL-SIGNAL AC RESPONSE SMALL-SIGNAL AC RESPONSE Gain Adjustedfrom –11.5dB to+5 dB Gain Adjustedfrom +5.5dB to+20 dB Figure1. Figure2. LARGE-SIGNAL AC RESPONSE AT FOUR GAINS LARGE-SIGNAL AC RESPONSE AT FOUR GAINS DIFFERENTIAL INPUT SINGLE-ENDED INPUT Figure3. Figure4. DIFFERENTIAL FREQUENCY RESPONSE vs CAPACITIVE LOAD R OS vs CAPACITIVE LOAD Figure5. Figure6. 6 © 2009–2011,Texas InstrumentsIncorporated ProductFolderLink(s):PGA870

/c4512/c4510 /c458 /c456 /c454 /c452 0 2 4 6 8 10 12 14 16 18 20 Gain□Setting /c45 /c45 /c45 Gain□(dB) 50□MHz 100□MHz 200□MHz /c45 12/c45 10 /c45 8 /c45 6 /c45 4 /c45 2 0 2 4 6 8 10 12 14 16 18 20 Gain□Setting 0.15 0.10 0.05 0.05 /c45 /c45 /c45 /c45 0.10 Gain□Error□(dB) /c45 40 C/c176 +25 C/c176 +85 C/c176 /c4512/c4510 /c458 /c456 /c454 /c452 0 2 4 6 8 10 12 14 16 18 20 Gain□Setting 0.04 0.02 0.02 0.04 0.06 0.08 /c45 /c45 /c45 /c45 Gain□Error□(dB) 50□MHz 100□MHz 200□MHz 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0.5 1.0 /c45 /c45 Gain□Control□(V) 0 100 200 300 400 500 Time□(ns) 1.5 1.0 0.5 /c450.5 /c451.0 /c451.5 Amplifier□Output□(V) Gain□Control Gain□Code□=□111111 Gain□Code□=□000000Amplifier Output 2.5 2.0 1.5 1.0 0.5 0 1.0 0.5 0.5 1.0 /c45 /c45 Gain□Control,□Gain□Strobe□(V) Amplifier□Output□(V) Time□(50□ns/div) Gain□Code□= 111111 Gain□Code□= 000000 Gain□Strobe 2.5 2.0 1.5 1.0 0.5 0 1.0 0.5 0.5 1.0 /c45 /c45 Gain□Control,□Gain□Strobe□(V) Amplifier□Output□(V) Time□(50□ns/div) Gain□Code□=□111111 Gain□Code□= 000000 Gain Strobe PGA870 www.ti.com SBOS436A –DECEMBER 2009–REVISED FEBRUARY 2011 TYPICAL CHARACTERISTICS (continued) AtTA= +25°C, VS+ = +5 V,differentialinputsignal,differentialVOUT = 2 VPP ,R L = 200 Ω differential,G = +20 dB,and inputand outputcommon-mode atinternalmidsupplyreference,unlessotherwisenoted. STEP-TO-STEP GAIN ERROR vs GAIN SETTING LARGE-SIGNAL GAIN vs GAIN SETTING OVER TEMPERATURE Figure7. Figure8. STEP-TO-STEP GAIN ERROR vs GAIN SETTING OVER FREQUENCY GAIN STEP RESPONSE: NO LATCH Figure9. Figure10. GAIN STEP RESPONSE: LEVEL-TRIGGERED GAIN LATCH GAIN STEP RESPONSE: EDGE-TRIGGERED LATCH Figure11. Figure12. © 2009–2011,Texas InstrumentsIncorporated 7 ProductFolderLink(s):PGA870

/c45 /c45 /c45 /c45 /c45 /c45 /c45 100 IMD (dBc) 50 100 150 200 250 300 Frequency□(MHz) R =□100 /c87L R =□200 R =□500 R =□1□k L L L /c87 /c87 /c87 V =□2□VOUT PP F□=□2□MHz/c68 Gain□=□+10□dB /c45 80 100 102 104 106 108 110 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 IMD (dBc) 50 100 150 200 250 300 Frequency□(MHz) R =□100 /c87L R =□200 R =□500 R =□1□k L L L /c87 /c87 /c87 Dashed□lines:□Gain□= 6□dB/c45 Solid□lines:□Gain□=□+10□dB V =□2□VOUT PP F□=□2□MHz/c68 /c45 /c45 /c45 /c45 /c45 /c45 /c45 100 IMD (dBc) 50 100 150 200 250 300 Frequency□(MHz) R =□100 /c87L R =□200 R =□500 R =□1□k L L L /c87 /c87 /c87 V =□2□VOUT PP F□=□2□MHz/c68 Gain□=□+20□dB /c45 80 100 102 104 106 108 110 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 IMD (dBc) 50 100 150 200 250 300 Frequency□(MHz) R =□100 /c87L R =□200 R =□500 R =□1□k L L L /c87 /c87 /c87 Dashed□lines:□Gain□=□0□dB Solid□lines:□Gain□=□+20□dB V =□2□VOUT PP F□=□2□MHz/c68 OIP (dBm) 50 100 150 200 250 300 Frequency□(MHz) V =□2□V R =□200 OUT PP L /c87 Gain□=□+20□dB Gain□=□+10□dB Gain□=□0□dB Gain□= dB/c45 6 PGA870 SBOS436A –DECEMBER 2009–REVISED FEBRUARY 2011 www.ti.com TYPICAL CHARACTERISTICS (continued) AtTA= +25°C, VS+ = +5 V,differentialinputsignal,differentialVOUT = 2 VPP ,R L = 200 Ω differential,G = +20 dB,and inputand outputcommon-mode atinternalmidsupplyreference,unlessotherwisenoted. THIRD-ORDER INTERMODULATION DISTORTION SECOND-ORDER INTERMODULATION DISTORTION FOR TWO GAINS AND FOUR OUTPUT LOADS (VOUT = 2 FOR FOUR OUTPUT LOADS (VOUT = 2 VPP ) VPP ) Figure13. Figure14. THIRD-ORDER INTERMODULATION DISTORTION SECOND-ORDER INTERMODULATION DISTORTION FOR TWO GAINS AND FOUR OUTPUT LOADS (VOUT = 2 FOR FOUR OUTPUT LOADS (VOUT = 2 VPP ) VPP ) Figure15. Figure16. OUTPUT THIRD-ORDER INTERCEPT vs FREQUENCY (VOUT = 2 VPP ) Figure17. 8 © 2009–2011,Texas InstrumentsIncorporated ProductFolderLink(s):PGA870

/c45 /c45 /c45 /c45 /c45 /c45 /c45 100 IMD (dBc) 50 100 150 200 250 300 Frequency□(MHz) R =□100 /c87L R =□200 R =□500 R =□1□k L L L /c87 /c87 /c87 V =□3□VOUT PP F□=□2□MHz/c68 Gain□=□+10□dB /c45 74 100 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 IMD (dBc) 50 100 150 200 250 300 Frequency□(MHz) R =□100 /c87L R =□200 R =□500 R =□1□k L L L /c87 /c87 /c87 Dashed□lines:□Gain□= 6□dB/c45 Solid□lines:□Gain□=□+10□dB V =□3□VOUT PP F□=□2□MHz/c68 100 /c45 /c45 /c45 /c45 /c45 /c45 /c45 IMD (dBc) 50 100 150 200 250 300 Frequency□(MHz) R =□100 /c87L R =□200 R =□500 R =□1□k L L L /c87 /c87 /c87 V =□3□VOUT PP F□=□2□MHz/c68 Gain□=□+20□dB /c45 74 100 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 IMD (dBc) 50 100 150 200 250 300 Frequency□(MHz) R =□100 /c87L R =□200 R =□500 R =□1□k L L L /c87 /c87 /c87 Dashed□lines:□Gain□=□0□dB Solid□lines:□Gain□=□+20□dB V =□3□VOUT PP F□=□2□MHz/c68 OIP (dBm) 50 100 150 200 250 300 Frequency□(MHz) V =□3□V R =□200 OUT PP L /c87 Gain□=□+20□dB Gain□=□+10□dB Gain□=□0□dB Gain□= 6□dB/c45 PGA870 www.ti.com SBOS436A –DECEMBER 2009–REVISED FEBRUARY 2011 TYPICAL CHARACTERISTICS (continued) AtTA= +25°C, VS+ = +5 V,differentialinputsignal,differentialVOUT = 2 VPP ,R L = 200 Ω differential,G = +20 dB,and inputand outputcommon-mode atinternalmidsupplyreference,unlessotherwisenoted. THIRD-ORDER INTERMODULATION DISTORTION SECOND-ORDER INTERMODULATION DISTORTION FOR TWO GAINS AND FOUR OUTPUT LOADS (VOUT = 3 FOR FOUR OUTPUT LOADS (VOUT = 3 VPP ) VPP ) Figure18. Figure19. THIRD-ORDER INTERMODULATION DISTORTION SECOND-ORDER INTERMODULATION DISTORTION FOR TWO GAINS AND FOUR OUTPUT LOADS (VOUT = 3 FOR FOUR OUTPUT LOADS (VOUT = 3 VPP ) VPP ) Figure20. Figure21. OUTPUT THIRD-ORDER INTERCEPT vs FREQUENCY (VOUT = 3 VPP ) Figure22. © 2009–2011,Texas InstrumentsIncorporated 9 ProductFolderLink(s):PGA870

/c45 55 100 105 110 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 45 100 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 Second-Order□Harmonic□Distortion□(dBc) Third-Order□Harmonic□Distortion□(dBc) 50 100 150 200 250 300 Frequency□(MHz) Gain□= 6□dB/c45 Gain□=□0□dB Dashed□lines:□2nd□Harmonic Solid□lines:□3rd□Harmonic V =□2□V R =□100 OUT PP L /c87 Gain□=□+10□dB Gain□=□+20□dB /c45 55 100 105 110 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 45 100 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 Second-Order□Harmonic□Distortion□(dBc) Third-Order□Harmonic□Distortion□(dBc) 50 100 150 200 250 300 Frequency□(MHz) Gain□= 6□dB/c45 Gain□=□0□dB Dashed□lines:□2nd□Harmonic Solid□lines:□3rd□Harmonic V =□2□V R =□200 OUT PP L /c87 Gain□=□+10□dB Gain□=□+20□dB /c45 55 100 105 110 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 45 100 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 Second-Order□Harmonic□Distortion□(dBc) Third-Order□Harmonic□Distortion□(dBc) 50 100 150 200 250 300 Frequency□(MHz) Gain□= 6□dB/c45 Gain□=□0□dB Dashed□lines:□2nd□Harmonic Solid□lines:□3rd□Harmonic V =□2□V R =□500 OUT PP L /c87 Gain□=□+10□dB Gain□=□+20□dB /c45 55 100 105 110 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 45 100 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 Second-Order□Harmonic□Distortion□(dBc) Third-Order□Harmonic□Distortion□(dBc) 50 100 150 200 250 300 Frequency□(MHz) Dashed□lines:□2nd□Harmonic Solid□lines:□3rd□Harmonic V =□2□V R =□1□k OUT PP L /c87 Gain□= 6□dB/c45 Gain□=□0□dB Gain□=□+10□dB Gain□=□+20□dB PGA870 SBOS436A –DECEMBER 2009–REVISED FEBRUARY 2011 www.ti.com TYPICAL CHARACTERISTICS (continued) AtTA= +25°C, VS+ = +5 V,differentialinputsignal,differentialVOUT = 2 VPP ,R L = 200 Ω differential,G = +20 dB,and inputand outputcommon-mode atinternalmidsupplyreference,unlessotherwisenoted. HARMONIC DISTORTION vs FREQUENCY HARMONIC DISTORTION vs FREQUENCY (VOUT = 2 VPP ) (VOUT = 2 VPP ) Figure23. Figure24. HARMONIC DISTORTION vs FREQUENCY HARMONIC DISTORTION vs FREQUENCY (VOUT = 2 VPP ) (VOUT = 2 VPP ) Figure25. Figure26. 10 © 2009–2011,Texas InstrumentsIncorporated ProductFolderLink(s):PGA870

/c45 55 100 105 110 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 40 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 Second-Order□Harmonic□Distortion□(dBc) Third-Order□Harmonic□Distortion□(dBc) 50 100 150 200 250 300 Frequency□(MHz) Gain□= 6□dB/c45 Gain□=□0□dB Dashed□lines:□2nd□Harmonic Solid□lines:□3rd□Harmonic V =□3□V R =□100 OUT PP L /c87 Gain□=□+10□dB Gain□=□+20□dB /c45 55 100 105 110 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 40 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 Second-Order□Harmonic□Distortion□(dBc) Third-Order□Harmonic□Distortion□(dBc) 50 100 150 200 250 300 Frequency□(MHz) Gain□= 6□dB/c45 Gain□=□0□dB Dashed□lines:□2nd□Harmonic Solid□lines:□3rd□Harmonic V =□3□V R =□200 OUT PP L /c87 Gain□=□+10□dB Gain□=□+20□dB /c45 55 100 105 110 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 40 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 Second-Order□Harmonic□Distortion□(dBc) Third-Order□Harmonic□Distortion□(dBc) 50 100 150 200 250 300 Frequency□(MHz) Gain□= 6□dB/c45 Gain□=□0□dB Dashed□lines:□2nd□Harmonic Solid□lines:□3rd□Harmonic V =□3□V R =□500 OUT PP L /c87 Gain□=□+10□dB Gain□=□+20□dB /c45 55 100 105 110 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 40 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 /c45 Second-Order□Harmonic□Distortion□(dBc) Third-Order□Harmonic□Distortion□(dBc) 50 100 150 200 250 300 Frequency□(MHz) Gain□= 6□dB/c45 Gain□=□0□dB Dashed□lines:□2nd□Harmonic Solid□lines:□3rd□Harmonic V =□3□V R =□1□k OUT PP L /c87 Gain□=□+10□dB Gain□=□+20□dB PGA870 www.ti.com SBOS436A –DECEMBER 2009–REVISED FEBRUARY 2011 TYPICAL CHARACTERISTICS (continued) AtTA= +25°C, VS+ = +5 V,differentialinputsignal,differentialVOUT = 2 VPP ,R L = 200 Ω differential,G = +20 dB,and inputand outputcommon-mode atinternalmidsupplyreference,unlessotherwisenoted. HARMONIC DISTORTION vs FREQUENCY HARMONIC DISTORTION vs FREQUENCY (VOUT = 3 VPP ) (VOUT = 3 VPP ) Figure27. Figure28. HARMONIC DISTORTION vs FREQUENCY HARMONIC DISTORTION vs FREQUENCY (VOUT = 3 VPP ) (VOUT = 3 VPP ) Figure29. Figure30. © 2009–2011,Texas InstrumentsIncorporated 11 ProductFolderLink(s):PGA870

Noise□Figure□(dB) /c45 12 /c45 8 /c45 4 0 4 8 12 16 22 2018141062/c45 2/c45 6/c45 10 Gain□(dB) f□=□100□MHz R =□150SYS /c87 1000 100 Output Voltage Noise (nV/ ) /c63Hz 10 100 1 k 10 k 100 k 1 M 10 M 100 M Frequency (Hz) Gain = +20 dB Gain = 11.5 dB/c45 2.25 2.00 1.75 1.50 1.25 1.00 0.75 0.50 0.25 0.25/c45 1.5 1.2 0.9 0.6 0.3 0.3/c45 /c45 /c45 /c45 /c45 0.6 0.9 1.2 1.5 Disable□Signal□Amplitude□(V) Amplifier□Output□(V) 100 200 300 400 500 Time□(ns) Disable□Signal Amplifier□Output 1.5 1.0 0.5 0.5 1.0 1.5 /c45 /c45 /c45 0.15 0.10 0.05 0.05 0.10 0.15 /c45 /c45 /c45 Large-Signal□Differential□Output□(V) Small-Signal□Differential□Output□(V) 0 5 10 15 20 25 Time□(2.5□ns/div) Gain□=□20□dB,□R =□200 /c87L Right□Scale Left□Scale 160 150 140 130 120 110 100 20/c45 /c45 /c45 /c45 /c45 Input□Impedance□Magnitude□( ) /c87 Input□Impedance□Phase□( )/c176 Frequency□(Hz) Magnitude Phase /c45 /c45 /c45 /c45 /c45 100 120 140 Forward□Isolation□(dB) 0 100 200 300 400 500 Frequency□(MHz) PGA870 SBOS436A –DECEMBER 2009–REVISED FEBRUARY 2011 www.ti.com TYPICAL CHARACTERISTICS (continued) AtTA= +25°C, VS+ = +5 V,differentialinputsignal,differentialVOUT = 2 VPP ,R L = 200 Ω differential,G = +20 dB,and inputand outputcommon-mode atinternalmidsupplyreference,unlessotherwisenoted. OUTPUT VOLTAGE NOISE vs FREQUENCY NOISE FIGURE vs GAIN Figure31. Figure32. LARGE- AND SMALL-SIGNAL DISABLE STEP RESPONSE DIFFERENTIAL PULSE RESPONSE Figure33. Figure34. FORWARD ISOLATION vs FREQUENCY IN DISABLED MODE DIFFERENTIAL INPUT IMPEDANCE Figure35. Figure36. 12 © 2009–2011,Texas InstrumentsIncorporated ProductFolderLink(s):PGA870

/c45 /c45 /c45 /c45 /c45 Input□Return□Loss□(dB) 100□M 1□G Frequency□(Hz) Z =□150 /c87SYS 20□dB 10□dB 0□dB 6□dB/c45 35/c45 /c45 /c45 /c45 /c45 /c45 /c45 Input□Return□Loss□(dB) 10□M 100□M 1□G Frequency□(Hz) Z =□150 /c87SYS 20□dB 10□dB 0□dB 6□dB/c45 5.5 5.0 4.5 4.0 3.5 Differential□Output□Swing□(V) 100 1□k 10□k Differential□Load□Resistance,□R ( ) /c87LOAD 100 0.1 Output□Impedance□Magnitude□( ) /c87 10□k 100□k 1□M 10□M 100□M 300□M Frequency□(Hz) 100 Output□Impedance□Phase□( )/c176 Magnitude Phase Power-Supply□Rejection□Ratio□(dB)Common-Mode□Rejection□Ratio□(dB) Frequency□(Hz) CMRR PSRR PGA870 www.ti.com SBOS436A –DECEMBER 2009–REVISED FEBRUARY 2011 TYPICAL CHARACTERISTICS (continued) AtTA= +25°C, VS+ = +5 V,differentialinputsignal,differentialVOUT = 2 VPP ,R L = 200 Ω differential,G = +20 dB,and inputand outputcommon-mode atinternalmidsupplyreference,unlessotherwisenoted. DIFFERENTIAL INPUT RETURN LOSS SINGLE-ENDED INPUT RETURN LOSS vs FREQUENCY vs FREQUENCY Figure37. Figure38. DIFFERENTIAL OUTPUT SWING DIFFERENTIAL OUTPUT IMPEDANCE vs R LOAD Figure39. Figure40. PSRR AND CMRR vs FREQUENCY Figure41. © 2009–2011,Texas InstrumentsIncorporated 13 ProductFolderLink(s):PGA870

Gain□Control BIAS Control Gain Strobe Latch Mode (LSB) B1 B2 B3 B4 B5 (MSB) Disable OUT/c45 OUT+ PGA870 Gain□=□+20□dB PGA870 SBOS436A –DECEMBER 2009–REVISED FEBRUARY 2011 www.ti.com

APPLICATION INFORMATION

The PGA870 isa wideband,fullydifferential,programmable-gainamplifier.Lookingat the blockdiagram in Figure42,thePGA870 can be separatedintothefollowingfunctionalblocks:

InputAttenuator
BufferedMUX
OutputAmplifier
8-bitdigitalinterface
Power function Figure42. PGA870 Block Diagram InputAttenuator The inputstageofthePGA870 consistsofa logarithmicR2R ladderand presentsa 150-Ω loadtotheprevious stage.To minimizeinputreturnlossand noisefigure,itisrecommended toprovidea 150-Ω matchingforthat input.Thisinputcan be driveneitherdifferentiallyorsingle-ended. This resistiveinputnetworkisinternallybiasedto midsupplyby an internalbuffer(VMID2 on pin 4).Proper bypassingisrequiredon thisnode (0.1μF).The buffermidsupplyisgeneratedby a passiveresistornetwork (VMID1 on pin28).A 0.1-μF capacitorisexpectedon VMID1 foradequatebypassing.AlthoughVMID1 and VMID2 are externallyaccessible,neitherofthesepinsisintendedtobe externallydriven.Additionally,VMID2 isnotintended todrivethemidsupplyreferencetoanotherchip,butcan sourceapproximately200 μA ifrequired. Duringpower-down operation,theinputmaintainsitsnominaldifferentialresistance.However, VMD1 and VMID2 fallto0 V. The inputattenuatoriscontrolledviathethreemost significantbits(MSBs) ofthegaincontrol.Refer toTable1 forthestepsizeofeach ofthesethreeMSBs. InputAmplifierand BufferedMUX Followingtheinputattenuatorisa programmablebufferstage;thegainoftheprogrammablebufferiscontrolled by thethreeleastsignificantbits(LSBs)ofthegain-controlword.RefertoTable1 forthestepsizeofeach of thesethreeLSBs. Table1.Gain Bitsand Corresponding Gain Step Sizes(indB) (MSB) (LSB) B5 B4 B3 B2 B1 B0 16 8 4 2 1 0.5 14 © 2009–2011,Texas InstrumentsIncorporated ProductFolderLink(s):PGA870

www.ti.com SBOS436A –DECEMBER 2009–REVISED FEBRUARY 2011 Output Amplifier The PGA870 has a differential,voltage-modeoutputstagewitha differentialoutputresistanceofapproximately 0.3Ω and an inductivereactanceequivalentto3.8nH. The common-mode outputvoltagehas a nominalvalueof VMID2 .Thisoutputamplifierhas a nominalgainof+20 dB. The nominalloadis200 Ω,butthePGA870 can driveloadsas low as 100 Ω withonlyminorchanges tothe devicedistortion. The outputpinsgo toa high-impedancestatewhen thedeviceisthepower-down state(thatis,when PD islow). 8-bitDigitalInterface The 8-bitdigitalinterfaceiscomposed ofsixbits:threeMSBs thatcontroltheinputattenuationand threeLSBs thatcontroltheinputamplifierand bufferedMUX. Formore informationon thisparallelinterface,refertotheGain Controland LatchModes section. Power Function The PGA870 featuresa low-powerdisabledstatefortheanalogcircuitrywhen thepower-down (PD) pinislow. Inthedisabledstate,thedigitalcircuitryremainsactive,whichallowsthegaintobe setbeforedevicepower-up. There isno internalcircuitrytoprovidea nominalbiastothispin.Ifthispinistobe leftopen,itmust be biased withan externalpull-upresistor. Note thatwhen the PGA870 isin thislow-powermode, the gain can be programmed usingthe 8-bitdigital interface,the outputpinsgo to a high-impedancestate,and the voltageon the midsupplypinsbiasingthe attenuator(pin4 and pin28)goes to0 V. Gain Controland Latch Modes The PGA870 has sixbitsofgaincontrol(B5 toB0) thatgivean extendedgainrangefroma maximum gainof20 dB toa minimum gainof–11.5dB. The LSB (B0)representsa minimum gainchange (stepsize)of0.5dB, and theLSB (B5)representsa gainchange of16 dB. The equivalentgainstepsizeofeach gaincontrolbitisshown inTable1.The devicevoltagegaincan be expressedby Equation1: GaindB= 20 dB − 0.5dB × (NG − 63) (1) N G istheequivalentbase-10integernumber thatcorrespondstothebinarygaincontrolword.A summary ofthe 63 possibledevicegainsversusNG and thevaluesofB0 toB5 areshown inTable2. The highand low voltagethresholdsallowallofthegaincontrolpinstobe controlledby CMOS circuitry.There areno internalpull-upresistorson thegain-controlpins.Ifthepinsaretobe leftopen,theymust be biasedwith externalpull-upresistors. The PGA870 can be configuredso the devicegainiscontrolledby onlythe sixgainbits(no latch) when the GAIN STROBE pinand theGAIN MODE pinarebothheldhigh.Inthisoperatingmode, thedevicevoltagegain followsthe signalson pinsB0 to B5. Transientson the sixgainbitscan cause changes to the PGA870 gain whileinthismode, as well.To combat thispossibility,thePGA870 alsosupportstwo gainmodes where thegain bitdataareacquiredand latchedby signalson theGAIN STROBE pin. The deviceisconfiguredfora level-triggeredlatchwhen theLATCH MODE pinishigh;thisconfigurationallows the sixgain bitsto be acquiredand latchedonlyon a high signalon the GAIN STROBE. When the GAIN STROBE signalgoes low,thegain-controldataarelatchedand thePGA870 gainisindependentofthesixgain bitsuntiltheGAIN STROBE goes highagain. IfthePGA870 LATCH MODE pinislow,thedeviceisconfiguredforan edge-triggeredlatchthatacquiresand latchesthesixgain-controlbitsonlyon thefallingedge oftheGAIN STROBE signal. © 2009–2011,Texas InstrumentsIncorporated 15 ProductFolderLink(s):PGA870

SBOS436A –DECEMBER 2009–REVISED FEBRUARY 2011 www.ti.com Table2.PGA870 Gain and Corresponding Gain Word Values Gain Gain State Gain (MSB) (LSB) State Gain (MSB) (LSB) NG (dB) B5 B4 B3 B2 B1 B0 NG (dB) B5 B4 B3 B2 B1 B0 63 20 1 1 1 1 1 1 31 4 0 1 1 1 1 1 62 19.5 1 1 1 1 1 0 30 3.5 0 1 1 1 1 0 61 19 1 1 1 1 0 1 29 3 0 1 1 1 0 1 60 18.5 1 1 1 1 0 0 28 2.5 0 1 1 1 0 0 59 18 1 1 1 0 1 1 27 2 0 1 1 0 1 1 58 17.5 1 1 1 0 1 0 26 1.5 0 1 1 0 1 0 57 17 1 1 1 0 0 1 25 1 0 1 1 0 0 1 56 16.5 1 1 1 0 0 0 24 0.5 0 1 1 0 0 0 55 16 1 1 0 1 1 1 23 0 0 1 0 1 1 1 54 15.5 1 1 0 1 1 0 22 -0.5 0 1 0 1 1 0 53 15 1 1 0 1 0 1 21 -1 0 1 0 1 0 1 52 14.5 1 1 0 1 0 0 20 -1.5 0 1 0 1 0 0 51 14 1 1 0 0 1 1 19 -2 0 1 0 0 1 1 50 13.5 1 1 0 0 1 0 18 -2.5 0 1 0 0 1 0 49 13 1 1 0 0 0 1 17 -3 0 1 0 0 0 1 48 12.5 1 1 0 0 0 0 16 -3.5 0 1 0 0 0 0 47 12 1 0 1 1 1 1 15 -4 0 0 1 1 1 1 46 11.5 1 0 1 1 1 0 14 -4.5 0 0 1 1 1 0 45 11 1 0 1 1 0 1 13 -5 0 0 1 1 0 1 44 10.5 1 0 1 1 0 0 12 -5.5 0 0 1 1 0 0 43 10 1 0 1 0 1 1 11 -6 0 0 1 0 1 1 42 9.5 1 0 1 0 1 0 10 -6.5 0 0 1 0 1 0 41 9 1 0 1 0 0 1 9 -7 0 0 1 0 0 1 40 8.5 1 0 1 0 0 0 8 -7.5 0 0 1 0 0 0 39 8 1 0 0 1 1 1 7 -8 0 0 0 1 1 1 38 7.5 1 0 0 1 1 0 6 -8.5 0 0 0 1 1 0 37 7 1 0 0 1 0 1 5 -9 0 0 0 1 0 1 36 6.5 1 0 0 1 0 0 4 -9.5 0 0 0 1 0 0 35 6 1 0 0 0 1 1 3 -10 0 0 0 0 1 1 34 5.5 1 0 0 0 1 0 2 -10.5 0 0 0 0 1 0 33 5 1 0 0 0 0 1 1 -11 0 0 0 0 0 1 32 4.5 1 0 0 0 0 0 0 -11.5 0 0 0 0 0 0 Table3.Gain ControlSignalsand Latch Modes Latch Mode GAIN STROBE LATCH MODE CONDITION Devicegainfollowsand latchesgaincontrolword (B0Edge-triggeredlatch Fallingedge Low toB5) onlyon GAIN STROBE fallingedge. Devicegainfollowsgaincontrolword (B0 toB5) when Level-triggeredlatch Low High GAIN STROBE and LATCH MODE arebothhigh. Devicegainlatcheswhen GAIN STROBE goes low. Devicegainislevel-triggeredon thegain-controlword No latch High High (B0 toB5) when LATCH MODE ishighand GAIN STROBE remainshigh. 16 © 2009–2011,Texas InstrumentsIncorporated ProductFolderLink(s):PGA870

Gain□Strobe Latch□Mode Gain□Bits B5□to□B0 (MSB□to□LSB) Gain Latched□on Gain□Strobe Falling□Edge Latched□on Gain□Strobe High□Level No□Latch Follows Gain□Control□Word Gain□Strobe Latch□Mode Gain□Bits B5□to□B0 (MSB□to□LSB) Gain tSU tHOLD tLATENCY PGA870 www.ti.com SBOS436A –DECEMBER 2009–REVISED FEBRUARY 2011 Table3 and Figure43 show a summary tableand timingdiagramsofthegainmodes, respectively.Figure44 illustratesa timingdiagram thatdefinesthe transitionsand timingof the set-upand hold times forboth level-triggeredand edge-triggeredlatchmodes. Figure43. Gain Mode Timing Figure44. Set-Up and Hold Times: Level-Triggeredand Edge-TriggeredLatch Modes © 2009–2011,Texas InstrumentsIncorporated 17 ProductFolderLink(s):PGA870

+5□V 1k /c87 B0□to□B5

0.1 F/c109

From□50- Source /c87 VMID2 (1) GS (1) PD PGA870 B0□to□B5 PGA870 SBOS436A –DECEMBER 2009–REVISED FEBRUARY 2011 www.ti.com Single-EndedtoDifferentialOperation Figure45 representsa single-endedtodifferentialconversiontestconfigurationwitha 50-Ω sourceand a 200-Ω load.The midsupplypinsVMID1 and VMID2 are properlybypassed;because thiscircuitisac-coupled,thesepins providethebiasingvoltagerequiredby thePGA870 inputstage.The LATCH MODE, GAIN STROBE, and PD pinsareconnectedtothesupplyvoltagethrougha pull-upresistor.The PD pinsethighpowers up thePGA870, whilesettingtheLATCH MODE and GAIN STROBE pinshighbypassesthelatchmode, allowinginstantaneous gainchanges as B5 toB0 change.On thenoninvertinginput,a 75-Ω resistancewas added toadaptthe150 Ω to 50 Ω and match the50-Ω source. Ifa single-endedsignalsourceistobe dc-coupledtothedevice,itsvoltageswingshouldbe centeredaboutthe midsupplyreference,VMID1 .Iftheinputdc voltageisgreaterthan0.2V frommidsupply,thenincreaseddistortion and reducedperformancecan result.The non-driveninputpinofthePGA870 shouldbe ac-coupledtoground througha capacitor.In thisconfiguration,the PGA870 amplifiesthe differencebetween the dc-coupledinput signaland themidsupplyreference. (1) LM = LATCH MODE pin(pin1),GS = GAIN STROBE pin(pin7). Figure45. Basic Connections forSingle-EndedtoDifferentialConversion 18 © 2009–2011,Texas InstrumentsIncorporated ProductFolderLink(s):PGA870

+5□V 1k /c87 B0□to□B5 From□150- Differential□Source /c87 VMID2 (1) GS (1) PD PGA870 B0□to□B5 PGA870 www.ti.com SBOS436A –DECEMBER 2009–REVISED FEBRUARY 2011 Differential-to-DifferentialOperation Differentialoperationof PGA870 isshown inFigure46. In thisexample,both inputpinsare connectedto a differential150-Ω source.The PGA870 isdrivinga typical200-Ω load.Both midsupplyvoltagepinsVMID1 and VMID2 arebypassed witha 0.1-μF capacitor.The LATCH MODE, GAIN STROBE, and PD pinsareconnectedto thepower supplyusinga 1-kΩ pull-upresistor.The PD pinsethighpowers up thePGA870, whilesettingthe LatchMode and theGain Strobepinshighbypassesthelatchmode, allowinginstantaneousgainchanges as B5 toB0 change. Ifa differentialsignalsourceistobe dc-coupledtothedevice,itshouldhave a common-mode voltagethatis within0.2V ofthemidsupplyreference.Iftheinputcommon-mode isgreaterthan0.2V from midsupply,then increaseddistortionand reducedperformancecan result. (1) LM = LATCH MODE pin(pin1),GS = GAIN STROBE pin(pin7). Figure46. Basic Connections forFullyDifferentialOperation OperationwithSplitSupply ±2.5V The PGA870 can be operatedusinga split±2.5-Vsupply.Inthiscase,VS+ isconnectedto+2.5 V, and GND (and any otherpinnotedtobe connectedtoGND) isconnectedto–2.5V. As withany device,what theuser decidestoname thelevelsinthesystem isirrelevanttothePGA870. Inessence,itissimplya levelshiftofthe power pinsand allvoltagelevelsby –2.5V.Witha ±2.5-Vpower supply,theoutputcommon-mode voltageis0 V and inputand outputvoltagerangesare symmetricalaround 0 V. The power-down and gaincontrollogicinput thresholdsallshifttorelativeto–2.5V; thatis,thelogiclow thresholdof0.9V witha single5-V supplyshiftsto 1.6V with±2.5-Vsupplies,and thelogichighthresholdof2.1V witha single5-V supplyshiftsto–0.4V with ±2.5-Vsupplies.Level-shiftingthelogicsignalsmay requirea comparatorcircuitforeach logicsignalline. © 2009–2011,Texas InstrumentsIncorporated 19 ProductFolderLink(s):PGA870

+2.5 V +2.5 V /c452.5 V Logic to PGA870 Pin V = +2.5 V, V = 2.5 V/c45OH OL 2.5-V Input Logic V = 2.1 V, V = 0.9 VOH OL R R Bandpass Filter and Bias PGA870 RO RO ADC AIN/c45 AIN+ CM SNR = 10logAmp+Filter = 20logV e O Filterout 2( ( V e O Filterout( ( with: e = eFilterout NAmpout ENB PGA870 SBOS436A –DECEMBER 2009–REVISED FEBRUARY 2011 www.ti.com Figure47 shows one possiblecircuitusingone channelofthehigh-speed,4.5-nspropagationdelayTLV3502 . The switchingspeed oftheoutputlogicsignalislimitedby thepropagationdelayofthecomparator.Usingslower comparatorslimitsthe digitallogicspeed and can thuslimitthe gaincontrolspeed inautomaticgaincontrol applications. Figure47. Comparator CircuittoShiftLogic SignalstoPGA870 Operated on Split±2.5-VSupplies Using the PGA870 withsplit±2.5-Vsuppliesallowsforan inputsignalcenteredaround ground and setsthe outputcommon mode of the PGA870 to ground.The ADC InputCommon-Mode VoltageConsiderations: DC-Coupled Inputsectiondiscusseshow an outputcommon-mode voltageof 0 V providesless signal attenuationwhen usinga level-translatingresistornetworkto drivean ADC witha low inputcommon-mode voltageindc-coupledapplications. DrivingADCs The PGA870 isdesignedand optimizedto drivedifferentialinputADCs forthe lowestdistortionperformance. Figure48 shows a genericblockdiagramofthePGA870 drivingan ADC. The primaryinterfacecircuitbetween theamplifierand theADC isa noise-limitingand anti-aliasingfilterthatmay alsoprovidea means tobiasthe signaltotheinputcommon-mode voltagerequiredby theADC. Filtersrangefromsingle-orderrealRC polesto higher-orderLC filters,depending on the applicationrequirements.Output resistors(RO ) are shown on the amplifieroutputsto isolatethe amplifierfrom any capacitiveloadingpresentedby the filteras the PGA870 presentsa lowimpedance on itsoutputs. Figure48. GenericADC DriverBlock Diagram Key pointstoconsiderforsuccessfullyimplementingthePGA870 aredescribedinthefollowingsubsections. SNR Considerations Depending on the amplitudeof the signaland the bandwidthof the filter,the SNR of the amplifierand filter togethercan be calculated.Note thatthenoisefromtheamplifierisband-limitedby thefilterwiththeequivalent brick-wallfilterbandwidth.The amplifierand filternoisecan be calculatedusingEquation2. (2) 20 © 2009–2011,Texas InstrumentsIncorporated ProductFolderLink(s):PGA870

SNR = 20logSystem /c45 /c45SNRAmp+Filter 1010 /c45SNRADC 10+ 10 HDx = 20logSystem /c45 /c45HDxAmp+Filter 2010 /c45HDxADC 20+ 10 PGA870 www.ti.com SBOS436A –DECEMBER 2009–REVISED FEBRUARY 2011 eNAmpout istheoutputnoisedensityofthePGA870 (30nV/√Hz),ENB isthebrick-wallequivalentnoisebandwidth ofthefilter,and VO istheamplifieroutputsignal.For example,witha first-order(N = 1) bandpass or low-pass filterwith30-MHz cutoff,theENB is1.57• f–3dB = 1.57• 30 MHz = 47.1MHz. Forsecond-order(N = 2)filters,the ENB is1.22• f–3dB. As thefilterorderincreases,theENB approachesf–3dB (forN = 3,ENB = 1.15• f–3dB,and forN = 4,ENB = 1.13• f–3dB).Both VO and eFilteroutare in RMS voltages.For example,witha 2-VPP (0.707-VRMS ) outputsignaland 30-MHz first-orderfilter,theSNR oftheamplifierand filteris70.7dB witheFilterout= 30 nV/√Hz • √47.1MHz= 206 μVRMS . The signal-to-noiseratio(SNR) of the amplifier,filter,and ADC add inRMS fashionas shown inEquation3 (SNR valuesindB): (3) Using thisequation,one can see thatifthe SNR of the amplifier+ filterequalsthe SNR of the ADC, the combined SNR is3 dB lower(thatis,worse).For minimalimpact(lessthan1 dB) on theADC SNR, theSNR of theamplifierand filtertogethershouldbe ≥ 10 dB betterthantheADC SNR. The combined SNR calculatedin thismanner isaccuratetowithin±1 dB ofactualimplementation. SFDR Considerations The SFDR oftheamplifierisusuallysetby second-orderorthird-orderharmonicdistortionforsingle-toneinputs, and by second-orderor third-orderintermodulationdistortionfortwo-toneinputs.Harmonics and second-order intermodulationdistortioncan be filteredto some degree by the filter,but third-orderintermodulationspurious cannotbe filtered.The ADC generatesthesame distortionproductsas theamplifier;however,as a resultofthe samplingand clockfeedthrough,additionalspurs(notlinearlyrelatedtotheinputsignal)arealsoadded. When thespursfromtheamplifierand filtertogetherareknown,each individualspurcan be directlyadded tothe same spurfromtheADC as shown inEquation4 toestimatethecombined spur(spuramplitudesindBc): (4) Note thatEquation4 assumes the spurs are in phase, but generallyprovidesa good estimateof the final combined distortion. For example,ifthespuroftheamplifier+ filterequalsthespuroftheADC, thecombined spuris6 dB higher.To minimizetheamplifiercontribution(lessthan1 dB) totheoverallsystem distortion,itisimportantthatthespur from theamplifier+ filterbe ~15 dB betterthantheconverter.The combined spurcalculatedinthismanner is usuallyaccuratetowithin±6 dB ofactualimplementation,buthighervariationshave been observed,especially insecond-orderharmonicperformanceas a resultofphase shiftinthefilter. The worst-casespur calculationabove assumes thatthe amplifier/filterspur of interestisin phase withthe correspondingspurintheADC, such thatthetwo spuramplitudescan be added linearly.There are two phase shiftmechanisms thatcause themeasured distortionperformanceoftheamplifier-ADCchaintodeviatefromthe expectedperformancecalculatedusingEquation4:common-mode phase shiftand differentialphase shift. Common-mode phase shiftisthe phase shiftseen equallyin both branches of the differentialsignalpath, includingthefilter.Thiscommon-mode phase shiftnullifiesthebasicassumptionthattheamplifier/filterand ADC spur sourcesare inphase.Thisphase shiftcan leadto betterperformancethan predictedas the spursare phase shifted,and thereisthepotentialforcancellationas thephase shiftreaches180°.However, thereisa significantchallengewhen designingan amplifier-ADCinterfacecircuitto take advantage of common-mode phase shiftforcancellation:thephase characteristicoftheADC spursourcesare unknown, and thereforethe necessaryphase shiftinthefilterand signalpathforcancellationisunknown. © 2009–2011,Texas InstrumentsIncorporated 21 ProductFolderLink(s):PGA870

SBOS436A –DECEMBER 2009–REVISED FEBRUARY 2011 www.ti.com Differentialphase shiftisthedifferenceinthephase responsebetween thetwo branchesofthedifferentialfilter signalpath.Differentialphase shiftin the filteras a resultof mismatched components caused by nominal tolerancecan severelydegradetheeven-orderdistortionoftheamplifier-ADCchain.Thisconditionhas thesame effectas mismatched pathlengthsforthetwo differentialtraces,and causes more phase shiftinone paththan the other.Ideally,the phase responseover frequencythroughthe two sidesof a differentialsignalpath are identical,such thateven-orderharmonicsremain optimallyout of phase and cancelwhen the signalistaken differentially.However, ifone side has more phase shiftthan the other,then the even-orderharmonic cancellationisnotas effective. Single-orderRC filterscause very littledifferentialphase shiftwithnominal tolerancesof 5% or less,but higher-orderLC filtersare very sensitiveto component mismatch. For instance,a third-orderButterworth bandpass filterwith100-MHz centerfrequencyand 20-MHz bandwidthshows up to 20° differentialphase imbalanceina Spice Monte Carloanalysiswith2% component tolerances.Therefore,whilea prototypemay work,productionvarianceisunacceptable.In ac-coupledapplicationsthatrequiresecond- and higher-order filtersbetween thePGA870 and ADC, a transformeror balunisrecommended attheADC inputtorestorethe phase balance.For dc-coupledapplicationswhere a transformerorbalunattheADC inputcannotbe used,itis recommended touse first-orsecond-orderfilterstominimizetheeffectsofdifferentialphase shiftas a resultof component tolerance. ADC InputCommon-Mode VoltageConsiderations:AC-Coupled Input The inputcommon-mode voltagerange oftheADC must be respectedforproperoperation.Inan ac-coupled applicationbetween the amplifierand the ADC, the inputcommon-mode voltagebias of the ADC is accomplishedindifferentways dependingon thespecificADC. Some ADCs use internalbiasnetworks,and the analoginputsare automaticallybiasedtotherequiredinputcommon-mode voltageiftheinputsare ac-coupled withcapacitors(orifthe filterbetween the amplifierand ADC isa bandpass filter).Other ADCs supplythe requiredinputcommon-mode voltageas a referencevoltageoutputata CM pin.WiththesetypesofADCs, the ac-coupledinputsignalcan be re-biasedtotheinputcommon-mode voltageby connectingresistorsfrom each inputto the CM outputof the ADC, as shown inFigure49. However, the signalisattenuatedbecause of the voltagedividercreatedby R CM and R O . Figure49. BiasingAC-Coupled ADC InputswiththeADC CM Output The signalcan be re-biasedwhen ac coupling,and thereforetheoutputcommon-mode voltageoftheamplifieris a don’tcarefortheADC. 22 © 2009–2011,Texas InstrumentsIncorporated ProductFolderLink(s):PGA870

R = RP O V V V V ADC REF AMP CM /c45 /c45 GAIN = 2R || ZP IN 2R + 2R || ZO P IN R = 2R + 2R || ZL O P IN V =AMP_PP V GAIN ADC_FS PGA870 www.ti.com SBOS436A –DECEMBER 2009–REVISED FEBRUARY 2011 ADC InputCommon-Mode VoltageConsiderations:DC-Coupled Input DC-coupled applicationsvaryincomplexityand requirementsdependingon the ADC; one requirementisthe need to resolvethe mismatch between the common-mode voltageof the drivingamplifierand the ADC. For example,whilethePGA870 has a fixedoutputcommon-mode ofmidsupply,or2.5V on a single5-V supply,the ADS6149 requiresa nominal1.5-Vinputcommon-mode. The ADS58C48 and ADS4149 ,however,bothrequirea nominal 0.95-V inputcommon-mode. As Figure50 shows, a resistornetwork can be used to perform a common-mode levelshift.Thisresistornetworkconsistsof the amplifierseriesoutputresistorsand pull-upor pull-downresistorstoa referencevoltage.Thisresistornetworkintroducessignalattenuationthatmay prevent theuse ofthefull-scaleinputrangeoftheADC. ADCs withan inputcommon-mode closertothePGA870 output common-mode of2.5V areeasiertouse ina dc-coupledconfiguration,and requirelittleorno levelshifting. Figure50. ResistorNetwork toDC Level-ShiftCommon-Mode Voltage For common-mode analysisofthecircuitinFigure48,assume thatVAMP ± = VOCM (forthePGA870, 2.5V on a single5-V supply)and VADC ± = VCM (thespecificationfortheADC inputcommon-mode voltage).VREF ischosen to be a voltagewithinthe system greaterthan VCM (suchas the ADC or amplifieranalogsupply)or ground, dependingon whetherthevoltagemust be pulledup ordown, respectively,and R O ischosen tobe a reasonable value,such as 24.9Ω.Withtheseknown values,R P can be foundby usingEquation5. (5) Shiftingthecommon-mode withtheresistornetworkcomes attheexpense ofsignalattenuation.Modelingthe ADC inputas the parallelcombinationof a resistanceR IN and capacitanceC IN usingvaluestakenfrom the respectiveADC datasheet,theapproximatedifferentialinputimpedance,ZIN,fortheADC can be calculatedat thesignalfrequency.Thisimpedance createsa dividerwiththeresistornetwork,whose gain(attenuation)can be calculatedby Equation6: (6) The introductionoftheR P resistorsalsomodifiestheeffectiveloadseen by theamplifier.The effectiveloadseen by theamplifieristhencalculatedby Equation7. (7) The R P resistorsactinparalleltotheADC inputsuch thattheeffectiveload(thatis,theoutputcurrent)seen by the amplifieris increased.Higher currentloads limitthe PGA870 differentialoutputswing and the typical distortionperformanceisonlyspecifiedforloadimpedancesof100-Ω differentialand greater. Usingthegainand knowingthefull-scaleinputoftheADC, VADC_FS ,therequiredamplitudetodrivetheADC with thenetworkcan be calculatedwithEquation8. (8) © 2009–2011,Texas InstrumentsIncorporated 23 ProductFolderLink(s):PGA870

SBOS436A –DECEMBER 2009–REVISED FEBRUARY 2011 www.ti.com UsingtheADC examples givenpreviously,Table4 shows sample calculationsofthevalueofR P and VAMP_FS for full-scaledrive,and thenfor–1 dBFS. Table4.Example R P forVariousADCs ADC R IN ||C IN VAMP_PP at for0 VAMP_PP VAMP VCM VREF 170 MHz R O R P GAIN GAIN VADC_FS dBFS –1 dBFS ADC (VDC ) (VDC ) (VDC ) (Ω) (Ω) (Ω) (V/V) (dB) (VPP ) (VPP ) (VPP ) (1) PGA870 operatedwith±2.5-Vsupply. As Table 4 shows, the signalattenuationas a resultof the added resistornetworkincreasesas the required common-mode shiftincreases.For theADS6149, therequiredcommon-mode levelshiftis–1 V, from 2.5V to 1.5V, and thesignalattenuatesby 5.57dB. Thisdifferenceisa significantsignalloss,and theamplifieroutput must be increased(eitherby increasingthePGA870 inputorthePGA870 gain)tomake up forthelossinorder todrivethefull-scaleinputoftheADC forthehighestSNR. At thesame time,increasingtheamplifieroutput swingresultsindegradeddistortionperformanceas theamplifieroutputapproachesitsoutputrangelimits. For theADS58C48/ADS4149 case withthePGA870 operatedwitha single5-V supply,therequiredlevelshift is–1.55 V and the signalattenuatesby 9.21 dB. Thissignallosscannotbe fullyrecoveredby increasingthe PGA870 output:thedifferentialoutputswing requiredatthePGA870 outputtodrivethefull-scalerange ofthe ADS58C48/ADS4149 exceeds the PGA870 outputswing capability.Additionally,the distortionperformanceof the amplifierisdegraded as the outputswing increases.In theseconfigurations,the maximum recommended ADC inputis–6 dBFS inorderto limitthe impactof the additionalloading.Anotheroptionisto operatethe PGA870 witha split±2.5-Vsupply,withthe resultingcalculationsshown inthe lastrow of Table 4. For this situation,if+2.5V isused as theVREF pull-upvoltage,thePGA870 onlyneeds todrive3.33VPP atitsoutputto drivethe ADS58C48/ADS4149 inputto–1 dBFS. See the OperationwithSplitSupply±2.5V sectionformore detailson usingthePGA870 withsplitsupplies. As withany design,testingisrecommended tovalidatewhethertheresultmeets thespecificdesigngoals. PGA870 DrivingADS58C48 To illustratetheperformanceofthePGA870 as an ADC driver,thePGA870 istestedwiththeADS58C48 and bandpass filterdesignscenteredat an operatingfrequencyof 170 MHz. The ADS58C48 isa quad-channel, 11-bit,200-MSPS ADC withLVDS-compatibledigitaloutputson sixdata pairsper channel.The devicehas unbufferedanaloginputs.Thereareseveralkey informationpointstoconsiderwhen interfacingtothePGA870:

Unbufferedanaloginputswitha frequency-dependentinputimpedance ofZIN = R IN ||C IN
0.95-Vanaloginputcommon-mode voltage
SNR = 66.1dBFS (typ)atfIN = 17 0MHz
SFDR = 80 dBc (typ)atfIN = 170 MHz
HD 2 = 82 dBc (typ)atfIN = 170 MHz
HD 3 = 80 dBc (typ)atfIN = 170 MHz
IMD = 83 dBFS (typ)withtwo-toneinputfIN1 = 185 MHz, fIN2 = 190 MHz The ADS58C48EVM is designed forflexibleoptionsto ease design work. Used in conjunctionwith the TSW1200EVM High-SpeedADC LVDS EvaluationSystem,itreducesevaluationtimetohelpthedesignermove fromprototypetoproductionmore quickly. The ADS58C48EVM providesback-to-backinputtransformersforeach ofthefouranaloginputchannelsinorder toconvertsingle-endedtestsignalstodifferentialwhen drivingtheADCs directly.The Channel D pathon the EVM, however, providesan alternatepath (selectablevia jumper resistors)fordrivingthe channel withan onboard PGA870. In thispath,a single-endedinputtestsignalcan be convertedto differentialwitha single transformertodrivethePGA870 input.The EVM providesvariouscomponent pads between thePGA870 and ADS58C48 inputforimplementingvariousfiltertypes.For the latestschematicof the EVM, referto the ADS58C48EVM DesignPackage availablethroughtheADS58C48EVM productpage on theTIwebsite. 24 © 2009–2011,Texas InstrumentsIncorporated ProductFolderLink(s):PGA870

8.2 nH 25 /c87 100 nF C18 68 pF C17 100 nF ADC+ ADC/c45 ADC VCM PGA870 www.ti.com SBOS436A –DECEMBER 2009–REVISED FEBRUARY 2011 TestingthePGA870 witha First-OrderBandpass Filter Differentialphase shiftina differentialfilterbecause ofcomponent mismatches can leadtoseverelydegraded even-orderdistortionperformance.In applicationswhere good SFDR performanceat the expense of slight degradationinSNR isacceptable,a first-orderfiltercan provetobe lesssensitiveand providemore repeatable resultscompared tohigher-orderfilters. Figure 51 shows a simplifiedschematic of the PGA870 drivingChannel D of the ADS58C48 on an ADS58C48EVM witha first-orderbandpass filterdesigned for50-MHz bandwidthat a centerfrequencyof 170 MHz. As a resultof board parasitics,the measured –3-dB bandwidth of the filteris 70 MHz. The measured –1-dB bandwidthofthefilteris40 MHz. At 20 dB ofgain,theoutputvoltagenoisespecificationofthe PGA870 is30 nV/√Hz. With2-VPP differentialoutputswingand 70-MHz bandwidth,theexpectedSNR fromthe combined amplifierand filteris68.7dB. Added incombinationwiththeADS58C48 SNR, theexpectedSNR of theamplifier,filter,and ADC chainis64 dBFS. Figure51. First-OrderBandpass FilterSchematic Figure52 shows theresultingFFT plotcapturedusingtheTSW1200 softwarewiththePGA870 and first-order filterdrivingtheADS to–1 dBFS, witha single-toneinput170-MHz sinewave sampled at200 MSPS. The results show 81.7-dBcSFDR and 63.7-dBFS SNR; analysisoftheplotisprovidedinTable5.The PGA870 issettoa maximum gainof20 dB. Figure53 shows theFFT plotwiththePGA870 settoa gainof–4 dB, withtheinput signalamplitudeincreasedaccordinglytoachieve–1 dBFS attheADC input.The resultsshow 5 dB lowerSFDR at thisgain setting,which is expected at lower gains (see the Harmonic Distortionvs Frequency graphs, Figure23 throughFigure30);however,theSNR remainsthesame atapproximately63.8dBFS. © 2009–2011,Texas InstrumentsIncorporated 25 ProductFolderLink(s):PGA870

SBOS436A –DECEMBER 2009–REVISED FEBRUARY 2011 www.ti.com Figure52. FFT PlotofPGA870 (G = 20 dB) + First-OrderBandpass Filterand ADS58C48 with Single-ToneInputat170 MHz Figure53. FFT PlotofPGA870 (G = –4 dB) + First-OrderBandpass Filterand ADS58C48 with Single-ToneInputat170 MHz Table5.AnalysisofFFT forPGA870 (G = 20 dB) + First-OrderBandpass Filter and ADS58C48 at170 MHz vs TypicalADC Specifications CONFIGURATION ADC INPUT SNR HD 2 HD 3 PGA870 + First-order –1 dBFS 63.7dBFS –83.8dBc –81.7dBcBandpass Filter and ADS58C48 ADS58C48 Only –1 dBFS 66.1dBFS –82 dBc –80 dBc(typ) 26 © 2009–2011,Texas InstrumentsIncorporated ProductFolderLink(s):PGA870

www.ti.com SBOS436A –DECEMBER 2009–REVISED FEBRUARY 2011 Figure54 and Figure55 each show theFFT plotsforthesame first-orderbandpass filtercircuitwithtwo-tone inputs,witheach toneat–7 dBFS and thePGA870 settoa gainof20 dB. Figure54 shows theFFT fortwo-tone inputsat160 MHz and 170 MHz. The third-orderintermodulationdistortionproductsat150 MHz and 180 MHz arelessthan–86 dBc.Figure55 shows theFFT fortwo-toneinputsat168 MHz and 170 MHz. The highestspur isthethird-orderintermodulationproductat172 MHz at–85 dBFS. Figure54. FFT PlotofPGA870 (G = 20 dB) + First-OrderBandpass Filterand ADS58C48 withTwo-Tone Inputsat160 MHz and 170 MHz Figure55. FFT PlotofPGA870 (G = 20 dB) + First-OrderBandpass Filterand ADS58C48 withTwo-Tone Inputsat168 MHz and 170 MHz © 2009–2011,Texas InstrumentsIncorporated 27 ProductFolderLink(s):PGA870

49.9 /c87 R12 49.9 /c87 L15 8.2 nH 25 /c87 C22 15 nF C23 100 pF C20 3.3 pFC17 100 nF ADC+ ADC/c45 ADC VCM PGA870 SBOS436A –DECEMBER 2009–REVISED FEBRUARY 2011 www.ti.com TestingthePGA870 witha Second-Order Bandpass Filter For bettercombined SNR performance,narrowerbandwidthand/orhigher-orderfiltersarerequiredbetween the PGA870 and ADC. However,narrowfilterbandwidthand highe-orderfilterscause thesignalchainperformance todepend more stronglyon component toleranceand mismatch.Component valuesthatare5% offfromnominal can detunea narrowbandfiltertothepointthatthedesiredsignalsdo notfallwithintheusefulpassband and become attenuated.Mismatch between correspondingseriescomponents on thepositiveand negativesidesof thedifferentialfiltercan resultina differentialphase shiftthatdegradeseven-orderdistortionperformance.As mentionedinthe SFDR Considerationssection,a transformeror balunisrecommended at the ADC inputin these applicationsto restorethe phase balance in the inputsignalto the ADC. The resultsshown in this discussioninterfacethePGA870 and filterdirectlytotheADS58C48 input,and otherbuildsofthesame filteron thesame EVM showed over10 dB ofvariationindistortionperformance. Figure 56 shows a simplifiedschematic of the PGA870 drivingChannel D of the ADS58C48 on an ADS58C48EVM witha second-orderbandpass filterdesignedfor50-MHz bandwidthat a centerfrequencyof 170 MHz. The measured –3-dB bandwidthofthefilteris57 MHz. The measured –1-dB bandwidthofthefilteris 34 MHz. At a gainof 20 dB, the outputvoltagenoisespecificationof the PGA870 is30 nV/√Hz. With 2-VPP differentialoutputswing and 57-MHz bandwidth,the expectedSNR from the combined amplifierand filteris 70 dB.Added incombinationwiththetypicalADS58C48 SNR, theexpectedSNR oftheamplifier,filter,and ADC chainis64.5dBFS. Figure56. Second-Order Bandpass FilterSchematic Figure57 shows the resultingFFT plotcapturedusing the TSW1200 softwarewith the PGA870 and a second-orderfilterdrivingthe ADS to –1 dBFS, witha single-toneinput170-MHz sine wave sampled at 200 MSPS. The resultsshow 87.76-dBcSFDR and 65-dBFS SNR; analysisoftheplotisshown inTable6.The PGA870 issettoa maximum gainof20 dB.Figure58 shows theFFT plotwiththePGA870 setinsteadtoa gain of–4 dB, withtheinputsignalamplitudeincreasedaccordinglytoobtain–1 dBFS attheADC input.The results show about1 dB lowerSFDR atthisgainsettingand no change intheSNR. 28 © 2009–2011,Texas InstrumentsIncorporated ProductFolderLink(s):PGA870

www.ti.com SBOS436A –DECEMBER 2009–REVISED FEBRUARY 2011 Figure57. FFT PlotofPGA870 (G = 20 dB) + Second-Order Bandpass Filterand ADS58C48 with Single-ToneInputat170 MHz Figure58. FFT PlotofPGA870 (G = –4 dB) + Second-Order Bandpass Filterand ADS58C48 with Single-ToneInputat170 MHz Table6.AnalysisofFFT forPGA870 (G = 20 dB) + Second-Order Bandpass Filterand ADS58C48 at170 MHz vs TypicalADC Specifications CONFIGURATION ADC INPUT SNR HD 2 HD 3 PGA870 + Second-order –1 dBFS 65 dBFS –89.7dBc –90.8dBcBandpass Filter and ADS58C48 ADS58C48 Only –1 dBFS 66.1dBFS –82 dBc –80 dBc(typ) © 2009–2011,Texas InstrumentsIncorporated 29 ProductFolderLink(s):PGA870

SBOS436A –DECEMBER 2009–REVISED FEBRUARY 2011 www.ti.com Figure59 and Figure60 show the FFT plotsforthe same second-orderbandpass filtercircuitwithtwo-tone inputs,witheach toneat–7 dBFS and thePGA870 settoa gainof20 dB. Figure59 shows theFFT fortwo-tone inputsat160 MHz and 170 MHz. The third-orderintermodulationdistortionproductsat150 MHz and 180 MHz are lessthan –90 dBc, though the second-orderintermodulationdistortionproductat 10 MHz isat –82 dBc. Figure60 shows theFFT fortwo-toneinputsat168 MHz and 170 MHz. The near-inthird-orderintermodulation productsat 166 MHz and 172 MHz are less than –88 dBFS, and the highestspur is the second-order intermodulationproductat2 MHz at–81 dBFS. Figure59. FFT PlotofPGA870 (G = 20 dB) + Second-Order Bandpass Filterand ADS58C48 with Two-Tone Inputsat160 MHz and 170 MHz Figure60. FFT PlotofPGA870 (G = 20 dB) + Second-Order Bandpass Filterand ADS58C48 with Two-Tone Inputsat168 MHz and 170 MHz 30 © 2009–2011,Texas InstrumentsIncorporated ProductFolderLink(s):PGA870

www.ti.com SBOS436A –DECEMBER 2009–REVISED FEBRUARY 2011 PCB Layout Recommendations Complete informationaboutthePGA870EVM isfoundinthePGA870EVM User Guide,availablefordownload throughthe PGA870 productfolderon the TI web site.Printedcircuitboard (PCB) layoutshouldfollowthese generalguidelines: 1. Signalroutingshouldbe directand as shortas possibleintoand out of the deviceinputand outputpins. Routingthesignalpathbetween layersusingviasshouldbe avoidedifpossible. 2. The devicePowerPAD shouldbe connectedtoa solidgroundplanewithmultiplevias.The PowerPAD must be connectedtoelectricalground.ConsultthePGA870EVM User Guide fora layoutexample. 3. Ground orpower planesshouldbe removed fromdirectlyundertheamplifieroutputpins. 4. A 0.1-μF capacitorshouldbe placedbetween theVMID pinand groundneartothepin. 5. An outputresistorisrecommended ineach outputlead,placedas neartotheoutputpinsas possible. 6. Two 0.1-μF power-supplydecouplingcapacitorsshouldbe placedas near to the power-supplypinsas possible. 7. Two 10-μF power-supplydecouplingcapacitorsshouldbe placedwithin1 in(2,54cm) ofthedevice. 8. The digitalcontrolpinsuse CMOS logiclevelsforhighand low signals,butcan toleratebeingpulledhighto a +5-V power supply.The digitalcontrolpinsdo nothave internalpull-upresistors. © 2009–2011,Texas InstrumentsIncorporated 31 ProductFolderLink(s):PGA870

SBOS436A –DECEMBER 2009–REVISED FEBRUARY 2011 www.ti.com

REVISION HISTORY

NOTE: Page numbers forpreviousrevisionsmay differfrompage numbers inthecurrentversion. Changes from Original(December, 2009)toRevisionA Page 32 © 2009–2011,Texas InstrumentsIncorporated ProductFolderLink(s):PGA870

www.ti.com 11-Jan-2011 Addendum-Page 1 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead/ Ball Finish MSL Peak Temp (3) Samples (Requires Login) PGA870IRHDR ACTIVE VQFN RHD 28 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR Purchase Samples PGA870IRHDT ACTIVE VQFN RHD 28 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR Request Free Samples (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

*All dimensions are nominal Device Package Type Package Drawing Pins SPQ Reel Diameter (mm) Reel Width W1 (mm) (mm) (mm) (mm) (mm) W (mm) Pin1 Quadrant PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 Pack Materials-Page 1

*All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) PGA870IRHDR VQFN RHD 28 3000 367.0 367.0 35.0 PGA870IRHDT VQFN RHD 28 250 210.0 185.0 35.0 PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 Pack Materials-Page 2

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Product Information

PGA870 specifications and overview.

Summary

High-Speed, Fully Differential, Programmable-Gain Amplifier

Description

High-Speed, Fully Differential, Programmable-Gain Amplifier

Source title PGA870 Datasheet(PDF) - National Semiconductor (TI)

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