PGA202_00 TI1 | Alldatasheet

Document overview

  • Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
  • PDF pages: 11

Technical content

Covered by U.S. PATENT #4,883,422 PGA202/203

FEATURES

l DIGITALLY PROGRAMMABLE GAINS: DECADE MODEL—PGA202 GAINS OF 1, 10, 100, 1000 BINARY MODEL—PGA203 GAINS OF 1, 2, 4, 8 l LOW BIAS CURRENT: 50pA max l FAST SETTLING: 2µs to 0.01% l LOW NON-LINEARITY: 0.012% max l HIGH CMRR: 80dB min l NEW TRANSCONDUCTANCE CIRCUITRY l LOW COST

DESCRIPTION

The PGA202 is a monolithic instrumentation ampli- fier with digitally controlled gains of 1, 10, 100, and 1000. The PGA203 provides gains of 1, 2, 4, and 8. Both have TTL or CMOS-compatible inputs for easy microprocessor interface. Both have FET inputs and a new transconductance circuitry that keeps the band- width nearly constant with gain. Gain and offsets are laser trimmed to allow use without any external com- ponents. Both amplifiers are available in ceramic or plastic packages. The ceramic package is specified over the full industrial temperature range while the plastic package covers the commercial range. International Airport Industrial Park • Mailing Address: PO Box 11400 • Tucson, AZ 85734 • Street Address: 6730 S. Tucson Blvd. • Tucson, AZ 85706 Tel: (520) 746-1111 • Twx: 910-952-1111 • Cable: BBRCORP • Telex: 066-6491 • FAX: (520) 889-1510 • Immediate Product Info: (800) 548-6132

APPLICATIONS

l DATA ACQUISITION SYSTEMS l AUTO-RANGING CIRCUITS l DYNAMIC RANGE EXPANSION l REMOTE INSTRUMENTATION l TEST EQUIPMENT Digitally Controlled Programmable-Gain INSTRUMENTATION AMPLIFIER Front End and Logic Circuits I 11 4 Filter B Adjust +V IN A0 A1 Digital Common Sense VOUT VREF 5.3pF* 5.3pF* 30k *Ω *±20% 30k *Ω VOS 7+V IN Filter A © 1989 Burr-Brown Corporation PDS-1006C Printed in U.S.A. August, 1993 SBOS002

  • Same as the PGA202/203AG NOTES: (1) All specifications apply to both the PGA202 and the PGA203. Values given for a gain of 10 are the same for a gain of 8 and other values may be interpolated. (2) Measured with a 10k load. (3) The analog inputs are internally diode clamped. (4) Adjustable to zero. (5) VNOISE (RTI) = √(VN INPUT )2 + (VN OUTPUT /Gain)2. (6) Threshold voltages are referenced to Digital Common. (7) From input change or gain change. SPECIFICATIONS ELECTRICAL At +25°C, VCC = ±15V unless otherwise noted. PGA202/203AG (1) PGA202/203BG (1) PGA202/203KP (1) PARAMETER CONDITION MIN TYP MAX MIN TYP MAX MIN TYP MAX UNITS GAIN Error(2) G < 1000 0.05 0.25 * 0.15 * * % G = 1000 0.1 1 0.08 0.5 * * % Nonlinearity G < 1000 0.002 0.015 * 0.012 * * % Gain vs Temperature G < 100 3 25 * 15 * ppm/ °C G = 100 40 120 * 60 * ppm/ °C G = 1000 100 300 * 150 * ppm/ °C RATED OUTPUT Over Specified Temperature See Typical Perf. Curve ±9* ±10 V Impedance 0.5 * * Ω ANALOG INPUTS Common-Mode Range ±10 ±1 3 V Absolute Max Voltage(3) No Damage ±VCC ** V Impedance, Differential 10 || 3 * * G Ω || pF Common-Mode 10 || 1 * * G Ω || pF OFFSET VOLTAGE (RTI) Initial Offset at 25°C (4) ±(0.5 + ±(2 + * ±(1 + * * mV 5/G) 24/G) 12/G) vs Temperature ±(3 + ±(24 + * ±(12 + * µV/°C Offset vs Time 50 * * µV/Month Offset vs Supply 10 ≤ VCC ≤ 15 10 + 100 + * 50 + * * µV/V 250/G 900/G 450/G INPUT BIAS CURRENT Initial Bias Current: at 25°C1 0 5 0 * * * * p A at 85°C 640 3200 * * * * pA Initial Offset Current: at 25°C 5 2 5 p A at 85°C 320 1600 * * * * pA COMMON-MODE REJECTION RATIO G = 1 80 100 * * * * dB G = 10 86 110 * * * * dB G = 100 92 120 * * * * dB G = 1000 94 120 * * * * dB INPUT NOISE Noise Voltage 0.1 to 10Hz 1.7 * * µVp-p Noise Density at 10kHz(5) 12 * * nV/ √Hz OUTPUT NOISE Noise Voltage 0.1 to 10Hz 32 * * µVp-p Density at 1kHz(5) 400 * * nV/ √Hz DYNAMIC RESPONSE Frequency Response G < 1000 1000 * * kHz G = 1000 250 * * kHz Full Power Bandwidth G < 1000 400 * * kHz G = 1000 100 * * kHz Slew Rate 10 20 15 * * * V/ µs Settling Time (0.01%)(7) G < 1000 2 * * µs G = 1000 10 * * µs Overload Recovery Time(7) G < 1000 5 * * µs G = 1000 10 * * µs DIGITAL INPUTS Digital Common Range –V CC VCC – 8 * * * * V Input Low Threshold(6) 0.8 * * V Input Low Current 10 * * µA Input High Voltage 2.4 * * V Input High Current 10 * * µA POWER SUPPLY Rated Voltage ±15 * * V Quiescent Current 6.5 * * mA TEMPERATURE RANGE Specification –25 85 * * 0 70 °C Operating –55 125 * * –25 85 °C Storage –65 150 * * –40 100 °C θJA 100 * * °C/W

ABSOLUTE MAXIMUM RATINGSPIN CONFIGURATION Operating Temperature Range:

PACKAGE INFORMATION

MODEL PACKAGE NUMBER (1) PGA202KP 14-Pin Plastic DIP 010 PGA202AG 14-Pin Ceramic DIP 169 PGA202BG 14-Pin Ceramic DIP 169 PGA203KP 14-Pin Plastic DIP 010 PGA203AG 14-Pin Ceramic DIP 169 PGA203BG 14-Pin Ceramic DIP 169 NOTE: (1) For detailed drawing and dimension table, please see end of data sheet, or Appendix D of Burr-Brown IC Data Book. Top View DIP The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes no responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject to change without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant any BURR-BROWN product for use in life support devices and/or systems. TEMPERATURE OFFSET VOLTAGE MODEL GAINS PACKAGE RANGE MAX (mV) PGA202KP 1, 10, 100, 1000 Plastic DIP 0 °C to +70°C ±(2 + 24/G) PGA202AG 1, 10, 100, 1000 Ceramic DIP –25 °C to +85°C ±(2 + 24/G) PGA202BG 1, 10, 100, 1000 Ceramic DIP –25 °C to +85°C ±(1 + 12/G) PGA203KP 1, 2, 4, 8 Plastic DIP 0 °C to +70°C ±(2 + 24/G) PGA203AG 1, 2, 4, 8 Ceramic DIP –25 °C to +85°C ±(2 + 24/G) PGA203BG 1, 2, 4, 8 Ceramic DIP –25 °C to +85°C ±(1 + 12/G)

ORDERING INFORMATION

14 Digital Common

13 –V 12 V

11 V Sense

10 Filter B

9 V Adjust

+V 3 V 4 Filter A 5 V Adjust 6 –V 7 CC REF OS IN

Frequency (Hz) Noise (nV/√Hz) 102 103 104 INPUT NOISE vs FREQUENCY 11 0 1 0 2 103 10 1045 Frequency (Hz) Noise (nV/√Hz) 102 103 104 11 0 1 0 2 103 10 10 10 645 Frequency (Hz) PSRR (dB) PSRR vs FREQUENCY 160 120 –40 G = 1000G = 100 G = 10 G = 1 GAIN ERROR vs FREQUENCY 11 0 1 0 2 103 10 1045 Frequency (Hz) Gain Error (%) 10–1 10–2 10–3 G = 1000 G = 1 –20 –40 11 0 1 0 10 10 10 745 Frequency (Hz) Gain (dB) GAIN vs FREQUENCY TYPICAL PERFORMANCE CURVES TA = +25°C, VS = ±15V unless otherwise noted. 11 0 1 0 2 103 10 10 10 645 Frequency (Hz) CMRR (dB) CMRR vs FREQUENCY 160 120 –40 G = 100, 1000 G = 10 G = 1

Filter Capacitor (pF) Settling Time (µs) SETTLING TIME vs FILTER CAPACITOR 10 3010005000 1500 2000 V (V) Load ( ) OUTPUT SWING vs LOAD OUT Ω 12961 5 1 8 V (V) Power Supply (±V) OUTPUT SWING vs POWER SUPPLY OUT T = +25°CA T = –25°CA 12961 5 1 8 V (V) Power Supply (±V) INPUT RANGE vs POWER SUPPLY IN 12961 5 1 8 Input Bias Current (pA) Power Supply (±V) INPUT BIAS CURRENT vs POWER SUPPLY QUIESCENT CURRENT vs POWER SUPPLY 12961 5 1 8 I (mA) Power Supply (±V) Q TYPICAL PERFORMANCE CURVES (CONT) TA = +25°C, VS = ±15V unless otherwise noted.

QUIESCENT CURRENT vs TEMPERATURE –50 –25 0 25 50 75 100 IQ (mA) Temperature (°C) LARGE SIGNAL RESPONSE 1µs/Div 5V/Div OUTPUT SWING vs TEMPERATURE –50 –25 0 25 50 75 100 V (V)OUT Temperature (°C) SLEW RATE vs TEMPERATURE –50 –25 0 25 50 75 100 Temperature (°C) Slew Rate (V/µs) CURRENT LIMIT vs TEMPERATURE –50 –25 0 25 50 75 100 Temperature (°C) I (mA)LIM INPUT BIAS CURRENT vs TEMPERATURE –50 –25 0 25 50 75 100 Temperature (°C) Input Bias Current (pA) 103 102 TYPICAL PERFORMANCE CURVES (CONT) TA = +25°C, VS = ±15V unless otherwise noted. G = 10

Because the PGA202/203 have FET inputs, the bias currents drawn through input source resistors have a negligible effect on DC accuracy. The picoamp currents produce no more than microvolts through megohm sources. The inputs are also internally diode clamped to the supplies. Thus, input filtering and input series protection are easily achievable. A return path for the input bias currents must always be provided to prevent the charging of any stray capacitance. Otherwise, the amplifier could wander and saturate. A 1MΩ to 10M Ω resistor from the input to common will return floating sources such as thermocouples and AC-coupled inputs (see Applications Section, Figures 8 and 9.) DYNAMIC PERFORMANCE The PGA202 and the PGA203 are fast-settling FET input programmable gain instrumentation amplifiers. Careful at- tention to minimize stray capacitance is necessary to achieve specified performance. High source resistance will interact with the input capacitance to reduce speed and overall bandwidth. Also, to maintain stability, avoid capacitance from the output to the input or the offset adjust pins. Applications with balanced source impedance will provide the best performance. In some applications, mismatched source impedances may be required. If the impedance in the negative input exceeds that in the positive input, stray capacitance from the output will create a net negative feed- back and improve the stability of the circuit. If, however, the impedance in the positive input is greater, then the feedback due to stray capacitance will be positive and instability may result. The degree of positive feedback will, of course, depend on the source impedance imbalance as well as the board layout and the operating gain. The addition of a small bypass capacitor of about 5 to 50pF directly across the input terminals of the PGIA will generally eliminate any instabil- ity arising from these stray capacitances. CMR errors due to the source imbalance will also be reduced by the addition of this capacitor. The PGA202 and the PGA203 are designed for fast settling in response to changes in either the input voltage or the gain. The bandwidth and the settling times are mostly determined by the output stage and are therefore independent of gain, except at the highest gain of the PGA202 where other factors in the input stage begin to dominate. In addition to general purpose applications, the PGA202/203 are designed to handle two important and demanding classes of applications: inputs with high source impedances, and rapid scanning data acquisition systems requiring fast set- tling time. Because the user has access to output sense and output common pins, current sources can also be constructed with a minimum of external components. Some basic appli- cation circuits are shown in Figures 6 through 12. PGA203 ISO V OUT D Digital Opto- Coupler 102 IN R L FIGURE 6. Isolated Programmable Gain Instrumentation FIGURE 7. Auto Gain Ranging. FIGURE 8. AC-Coupled Differential Amplifier for

12 VOUT

Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgment, including those pertaining to warranty, patent infringement, and limitation of liability. TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily performed, except those mandated by government requirements. Customers are responsible for their applications using TI components. In order to minimize risks associated with the customer’s applications, adequate design and operating safeguards must be provided by the customer to minimize inherent or procedural hazards. TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other intellectual property right of TI covering or relating to any combination, machine, or process in which such semiconductor products or services might be or are used. TI’s publication of information regarding any third party’s products or services does not constitute TI’s approval, warranty or endorsement thereof. Copyright  2000, Texas Instruments Incorporated