PFF3000-12-069RD BEL | Alldatasheet
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Technical content
PFF3000-12-069RD is a 3 kW DC/DC front -end converter that provides a main output 12.5 VDC from 40 - 72 VDC bus voltages to power Intermediate Bus Ar chitectures (IBA) in high-performance and high-reliability servers, routers, and network switches. Features include very high efficiency, high reliability, low output voltage noise, and excellent dynamic response to load / input changes.
- Best-in-class, platinum equivalent efficiency
- Input voltage range: 40 - 72 VDC
- Up to 3 kW output power - 244 A output current
- Hot-plug capable
- Parallel operation with active analog current sharing
- 2 Status LEDs: DC input OK and warning / fault signaling
- High density design: 30.5 W/in3
- Form factor: 69 x 42 x 555 mm
- Full digital controls for improved performance
- RoHS Compliant
- Reverse polarity, over temperature, output overvoltage, and overcurrent protections
- I2C communication interface for control, programming, and monitoring with PMBus® protocol
- High Performance Servers
- Routers
- Switches Disclaimer: PMBus is a registered trademark of SMIF, Inc.
2 PFF3000-12-069RD
1 Front to Rear
component stresses, thus providing increased system reliability and very high efficiency. server integration with a matching airflow path. redundant power systems. The standby output (12V/2A) provides power to external power distribution and management controllers. Its protection with an active OR-ing device provides for maximum reliability. temperature and can be overridden through the I2C bus. Figure 1. PFF3000-12-0069RD Block Diagram
+86 755 298 85888 Europe, Middle East +353 61 225 977 North America +1 408 785 5200 © 2018 Bel Power Solutions & Protection BCD.00886_011 Stresses in excess of the absolute maximum ratings may cause performance degradation, adversely affect long-term reliability, and cause permanent damage to the supply. PARAMETER CONDITIONS / DESCRIPTION MIN MAX UNITS Vi maxc Maximum Input Continuous 75 VDC General Condition: TA = 0… 45 °C unless otherwise noted. PARAMETER DESCRIPTION / CONDITION MIN NOM MAX UNIT VI start Minimum operating input voltage Communication available, DSP running 35 VDC VI nom Nominal input voltage 53 VDC VI Input voltage Normal operation (from VI min to VI max) 40 72 VDC II Input current VI > VI min 85 A II pk Inrush current limitation From Vi min to Vi max, TA = 25°C 100 A VI on_uv Turn-on input voltage low Ramping up 42.5 43.5 VDC VI off_uV Turn-off input voltage low Ramping down 38.0 39.5 VDC VI on_ov Turn-on input voltage high Ramping down 68.5 69.5 VDC VI off_oV Turn-off input voltage high Ramping up 72.0 75.0 VDC Η Efficiency (fan power not included) VI nom, 0.2 ∙ I1 nom, V1 nom, TA = 25 °C 90.0 93.8 % VI nom, 0.5 ∙ I1 nom, V1 nom, TA = 25 °C 94.0 95 % VI nom, I1 nom, V1 nom, TA = 25 °C 91.0 93 %
4.1 INPUT FUSE
Fast-acting 100 A input fuse in series on minus DC rail inside the PSU protects against severe defects. The fuse is not accessible from the outside and is not therefore a serviceable part.
4.2 INRUSH CURRENT & REVERSE POLARITY PROTECTION
Internal bulk capacitors will be charged through NTC resistors connected from bulk cap minus pin to the DC rail minus, thus limiting the inrush current. After the inrush phase, NTC resistors are then shorted with MOSFETs connected in parallel. Inrush control is managed by the digital controller (DSP). Parallel connected MOSFETs in series to the DC minus rail input act as a reverse polarity blocking element (Fig. 1). In case of a short at the input voltage or input reverse polarity, these MOSFETs will open and prevent the bulk caps to be discharged via the input. Reverse polarity control is managed by a fast-acting analog circuit. NOTE: In order to keep max inrush current below II max, it is not recommended to repeat plug-in/-out operations within 20 s.
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4.3 INPUT UNDER-VOLTAGE
4.4 EFFICIENCY
by an optimized design and layout. Synchronous rectifiers on the output stage reduce losses in the high current output path. Fan speed is digitally controlled in order to keep all components below critical operating temperature. Figure 2. Efficiency vs. Load Current
+86 755 298 85888 Europe, Middle East +353 61 225 977 North America +1 408 785 5200 © 2018 Bel Power Solutions & Protection BCD.00886_011 PARAMETER DESCRIPTION / CONDITION MIN NOM MAX UNIT Main Output V1 V1 nom Nominal main output voltage 0.5 ∙ I1 nom, TA = 25 °C 12.5 VDC V1 set Main output voltage set-point accuracy 0.5 ∙ I1 nom, TA = 25 °C -0.5 +0.5 % V1 nom dV1 tot Total regulation VI min to VI max, 0 to 100% I1 nom, TA min to TA max -1.0 +1.0 % V1 nom P1 nom Nominal main output power V1 = V1 nom ± 1.0% V1 nom 3000 W I1 nom Nominal main output current V1 = V1 nom ± 1.0% V1 nom 244 A IV1 lim See table Protection IV1 ol Short time over load current V1 = 12.3 VDC, Ta min to Ta max, maximum duration 20 ms (See Section 5.2 and 6) 280 A IV1 ol lim Current limit during short time overload V1 See table Protection V1 pp Main output ripple voltage V1 nom, I1 nom, 20 MHz BW 160 mVpp dV1 Load Load regulation Vi nom, 0 – 100% I1 nom 170 mV dV1 droop Droop 0 – 100% I1 nom 0.7 mV/A dV1 Line Line regulation VI = VI min…VI max 0 mV dIshare Current sharing accuracy Deviation I1 tot / N, I1 > 30% I1 nom -5 +5 % dV1dyn Dynamic load regulation I1 = 10%...50% I1 nom, I1 tot = I1 + ΔI1, ΔI1 = 50 % I1 nom, dIo / dt = 1 A/µs, recovery within 1% of V1 nom -0.6 +0.6 V T1rec Recovery time 1 ms tV1_Pwr_On Start-up time from DC input V1 = 10.8 VDC See table on/ off signal timings tV1 rise Rise time (monotonic) V1 = 10%...90% V1 nom, 50% I1 nom 4.5 ms tV1_holdup Hold-up time 0.5 ∙ I1, VI = VI nom 2 ms Cload Capacitive loading TA = 25 °C 10000 µF Standby Output VSB VSB nom Nominal standby output voltage 0.5 ∙ ISB nom, TA = 25 °C 12.00 VDC VSB set Standby output set-point accuracy 0.5 ∙ ISB nom, TA = 25 °C -1.5 +1.5 % VSB nom dVSB tot Total regulation Vi min to Vi max, 0 to 100% ISB nom, TA min to TA max -1.5 +1.5 % VSB nom PSB nom Nominal standby output power VSB = VSB nom ± 0.5% VSB nom 24 W ISB nom Nominal standby output current VSB = VSB nom ± 0.5% VSB nom 2 A VSB pp Standby output ripple voltage VSB nom, ISB nom, 20 MHz BW 120 mVpp IVSB lim Current limit See table Protection tVSB lim Over load current limit time on VSB Time to hit hiccup when in over current See table Protection dVSB Load regulation 0 – 100% ISB nom 220 mV Droop 0 – 100% ISB nom 110 mV/A dVSBdyn Dynamic load regulation ISB = 5%...50% ISB nom, ISB tot = I1 + ΔI1, Δ ISB = 50 % ISB nom, dIo / dt = 1 A/µs, recovery within 1% of VSB nom -0.6 +0.6 V TSBrec Recovery time 5 ms tVSB_Pwr_On Start-up time from DC input VSB = 90% VSB nom See table on/ off signal timings tVSB rise Rise time (monotonic) VSB = 10%...90% VSB nom 0.1 ms tVSB_holdup Hold-up time Isb=0…2A, VI > 48V 5 260 ms Cload Capacitive loading TA = 25 °C 1000 µF General Condition: TA = 0…45 °C unless otherwise noted.
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5.1 OUTPUT VOLTAGE RIPPLE
of Table 1 and Table 2 should be used to reduce the output ripple voltage. The ripple voltage is measured with 20 MHz BWL, close to the external capacitors. Figure 3. Output Ripple Test Setup high quality factor the output ripple voltage may be increased in certain frequency ranges due to resonance effects. Table 1. Suitable Capacitors for V1 Table 2. Suitable Capacitors for VSB maximum load is applied to V1.
5.2 OUTPUT ISOLATION
applied voltage VI has not to exceed 75 Vpk in order to prevent catastrophic damage to the PSU. Figure 4. Turn-on at VI = VI-nom, I1 = I1-nom (2 ms/div) Figure 5. Turn-off at VI = VI-nom, I1 = I1-nom (2 ms/div) Figure 6. Load transient on V1, 12 A to 122 A (1 ms/div) Figure 7. Load transient on V1, 122 A to 12 A (1 ms/div) Figure 8. Load transient on V1, 122 A to 244 A (1 ms/div) Figure 9. Load transient on V1, 244 A to 122 A (1 ms/div) Figure 10. Inrush current, VI = VI-nom, I1 = I1-nom (200 ms/div) Figure 11. Short circuit on main output (500 µs/div)
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tech.support@psbel.com PARAMETER DESCRIPTION / CONDITION MIN NOM MAX UNIT Ta < 45°C Ta = 60 °C 1 IV1 ol lim Current limit during short time overload V1 IV1 SC Max Short Circuit Current V1 V1 < 3 V 350 2
1 See Figure 26 for linear power derating > 45°C
2 Limit set don’t include effects of main output capacitive discharge.
6.1 AUTOMATIC RETRY
Any fault condition on main output V 1 will shut down the main output and attempt to recover from the fault 5 times before latching off. The time between each restart attempt is 10 s. The fault latch and fault counter can be reset by disconnecting the input voltage or by toggling the PSON_L input. If the unit operates for more than 10 min with no failure, then the failure counter will be reset automatically. A failure on the standby output V SB will shut down both outputs, whereas a failure on main output V1 will only shut down this output, while VSB will continue to operate and communicate.
6.2 OVERVOLTAGE PROTECTION
The PSU provides a fixed threshold overvoltage (OV) protection, implemented with a hardware comparator. Once an overvoltage (OV) condition has been triggered, the supply will shut down and latch the fault condition.
6.3 UNDERVOLTAGE DETECTION
As both main and standby outputs are monitored, LEDs and the PWOK_L pin will warn if V1 or VSB exceed ± 7% of its nominal voltage. Output undervoltage protection is provided on both outputs. When either V1 or VSB falls below 93% of its nominal voltage, the output is inhibited.
6.4 OUTPUT OVER-CURRENT PROTECTION
Two different over current protection features are implemented on the main output. level IV1 lim will decrease if the ambient (inlet) temperature increases beyond 45 °C (see Figure 26). ol lim. When the output current is reduced below IV1 ol lim, the output voltage will return to its nominal value. Figure 12. Current limitation on main output immediately when standby current reaches or exceeds IVSB lim. After an off-time of 1s the output automatically tries to restart. If the overload condition is removed the output voltage will reach again its nominal value VSB = VSB nom ± 1%. At continuous overload condition the output will repeatedly trying to restart with 1s intervals. Figure 13. Current limitation on standby output
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tech.support@psbel.com PARAMETER DESCRIPTION / CONDITION MIN NOM MAX UNIT VI mon Input voltage VI min ≤ VI ≤ VI max -2.5 +2.5 % II mon Input current II > 25 A II ≤ 25 A -5.0 -1.25 +5.0 +1.25 A PI mon Input power PI > 1600 W PI ≤ 1600 W -5.0 -80 +5.0 +80 W V1 mon Main output voltage -2 +2 % I1 mon Main output current I1 > 134 A I1 ≤ 134 A -2.0 -2.68 +2.0 +2.68 A Po1 mon Main output power Po1 > 700 W Po1 ≤ 700 W -35 +5 +35 W VSB mon Standby voltage -2 +2 % ISB mon Standby current -0.2 0.2 A PSB mon Standby output power -2.4 2.4 W PARAMETER DESCRIPTION / CONDITION MIN NOM MAX UNIT PSKILL / PSKILL_IN / PSON_L inputs VIL Input low level voltage -0.2 +0.8 V VIH Input high level voltage 2.0 3.6 V IIL, H Maximum input sink or source current 0 1 mA Rpu PSKILL(_IN) Internal pull-up resistor on PSKILL 10 kΩ RpuPSON_L Internal pull-up resistor on PSON_L 10 kΩ PWOK_L output VOL Output level voltage Isink < 4 mA -0.2 0.4 V Vpu PWOK_L External pull-up voltage 12 V Rpu PWOK_L Recommended external pull-up resistor on PWOK_L at Vpu PWOK_L = 3.3 V 10 kΩ Low level output All outputs are turned on and within regulation High level output In standby mode or V1 / VSB have triggered a fault condition INOK_L output VOL Output low level voltage Isink < 4 mA -0.2 0.4 V VpuINOK_L External pull-up voltage 12 V Rpu INOK_L Recommended external pull-up resistor on INOK_L at Vpu INOK_L = 3.3 V 10 kΩ Low level output Input voltage is within range for PSU to operate High level output Input voltage is not within range for PSU to operate SMB_ALERT_L output VOL Output low level voltage Isink < 4 mA -0.2 0.4 V Vpu SMALT_L External pull-up voltage 12 V Rpu SMALT_L Recommended external pull-up resistor on SMB_ALERT_L at Vpu SMALT_L = 3.3 V 10 kΩ Low level output PSU is in warning or failure condition High level output PSU is ok
ELECTRICAL CHARACTERISTICS
8.2 INTERFACING WITH SIGNALS
power will not affect the signals of other PSUs running in parallel. circuits when the power supply is switched off.
8.3 LED STATUS - FRONT LEDs
Output LED is bi-colored green and yellow and shows DC output OK or a warning/fault status as listed in Table 1. Table 3. LED Status
8.4 PRESENT_L
pin should not exceed 10 mA. Figure 14. PRESENT_L signal pin
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8.5 PSKILL_L / PSKILL_IN_L INPUT
will remain on, regardless of the PSKILL_L input state. output will remain on, regardless of the PSKILL_L input state.
8.6 DC TURN-ON / DROP-OUTS / INOK_L
The INOK_L signal indicates whether the DC input voltage is within the o perating range and the power supply can turn on. up voltage to maximum 12.0 V.
8.7 PSON_L INPUT
used to clear any latched fault condition. Timing parameters are listed in Table 2.
8.8 PWOK_L SIGNAL
and VSB outputs are within regulation. This pin is active-low; timing parameters are listed in Table 2.
8.9 SIGNAL TIMING
Table 4. On-/Off- Signal Timings
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Table 5. Available power when multiple PSUs are operating
8.10 CURRENT SHARE
disconnect its ISHR_BUS pin from the share bus: this will prevent dragging the output down (or up) in such cases. to a value close to the Master by slightly increasing their output voltage. The output voltage inc rease is limited to +250 mV. Standby output uses an analog passive current-share method (droop-output voltage characteristic). Maximum available main and stand-by power in (non)-redundant topology is listed in Table 5.
8.11 SENSE INPUTS
polarized) during operation, then the unit will shut down immediately.
8.12 I2C / PMBus® COMMUNICATION
- 100 kΩ internal pull-up resistors
- SDA / SCL IOs must be pull-up externally to 3.3 ± 0.3 V
- Pull-up resistor should be 2 kΩ to 5 kΩ to ensure SMBUS compliant signal rise times
- Full SMBus clock speed of 100 kbps
- Clock stretching limited to 1 ms
- SCL low time-out of > 25 ms with recovery time within 10 ms
Figure 20. Physical layer of communication interface
1 Cb = Bus line capacitance in pF, typically in the range of 10 pF…400 pF, Rb = 100 Ω
Table 6. I2C / SMBus Specification Figure 21. I2C / SMBus Timing output (e.g. provided by a redundant unit); if only V1 is provided, communication is not possible.
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8.13 ADDRESS
The unit supports the PMBus® communication protocol with a fixed address at 0x20. The EEPROM is at fixed address = 0xA0.
8.14 CONTROLLER ACCESS
disabled; EEPROM_WP=LOW: write enabled. Figure 22. I2C Bus to Controller and EEPROM
8.15 EEPROM PROTOCOL
commands are defined, it is recommended to use the single byte write / read commands. should only occur after 5ms of the last STOP condition to allow the EEPROM to write the data into its memory. data byte at the specified location.
+86 755 298 85888 Europe, Middle East +353 61 225 977 North America +1 408 785 5200 © 2018 Bel Power Solutions & Protection BCD.00886_011
8.16 PMBus® PROTOCOL
The Power Management Bus (PMBus®) is an open standard protocol that defines means of communicating with power conversion and other devices. For more information, please see the System Management Interface Forum web site at: www.powerSIG.org. PMBus®command codes are not register addresses. They describe a specific command to be executed. PFF3000-12-069RD supply supports the following basic command structures:
- Clock stretching limited to 1 ms
- SCL low time-out of >25 ms with recovery within 10 ms
- Recognized any time Start/Stop bus conditions WRITE The write protocol is the SMBus 1.1 Write Byte/Word protocol. Note that the write protocol may end after the command byte or after the first data byte (Byte command) or then after sending 2 data bytes (Word command). In addition, Block write commands are supported with a total maximum length of 255 bytes. See PFF3000-12-069RA PMBus® Communication Manual BCA.00070 for further information. READ The read protocol is the SMBus 1.1 Read Byte/Word protocol. Note that the read protocol may request a single byte or word. In addition, Block read commands are supported with a total maximum length of 255 bytes. See PFF3000-12-069RD PMBus® Communication Manual BCA.00216 for further information. S Address W A Command A Data Low Byte1) A Data High Byte1) A P 1) Optional S Address W A Command A Byte 1 A Byte N A P Byte Count A S Address W A Command A Data (Low) Byte AS Address R A Data High Byte1) nA P 1) Optional S Address W A Command A Byte 1 A S Address R A Byte N nA PByte Count A
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8.17 GRAPHICAL USER INTERFACE
and will show them in the navigation tree. In, the monitoring view the power supply can be controlled and monitored. Figure 23. Monitoring dialog of the I2C utility (example) rpm is then adjusted to provide optimal cooling air and is a function of output power, inlet and internal MOSFETs temperature. Figure 24. Airflow direction
Figure 25. Fan speed vs. main output load Figure 26. Thermal power derating
10.1 IMMUNITY
NOTE: Most of the immunity requirements are derived from EN 55024:1998/A2:2003.
10.2 EMISSION
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tech.support@psbel.com PARAMETER DESCRIPTION / CONDITION CRITERION Agency Approvals UL 60950-1 Second Edition CAN / CSA- C22.2 No. 60950-1-07 Second Edition IEC 60950-1:2005 EN 60950-1:2006 Approved by independent body (see CE declaration) Isolation Strength Input (DCIN+ / DCIN-) to case (PE) Basic Input (DCIN+ / DCIN-) to output Basic Output to case (PE) Functional Creepage / Clearance Primary (DCIN+ / DCIN-) to protective earth (PE) According to safety standard Primary to secondary Electrical Strength Test Input to case According to safety standard Input to output Output and signals to case PARAMETER DESCRIPTION / CONDITION MIN NOM MAX UNIT TA Ambient temperature Vi min to Vi max, I1 nom, ISB nom at 4000 m 0 +40 * °C Vi min to Vi max, I1 nom, ISB nom at 1800 m 0 +45 °C TAext Extended temperature range Derated output +45 +55 °C TS Storage temperature Non - operational -40 +70 °C Altitude Operational, above sea level - 4000 m Relative humidity Operational: TA = 40 °C 7 85 % Non-Operational 5 93 % Na Audible noise Vi nom, 50 % Io nom, TA = 25 °C at by-stander position 60 dBA Cooling System back pressure 0.5 in H20 Shock IEC60068-2-27 Operational: 11ms, half-sine Non-Operational: 11ms, half-sine g pk Vibration IEC60068-2-27 Operational: Swept-sine, 5-500-5 Hz Non-Operational: Swept-sine, 5-500-5 Hz Random, 10-500 Hz 3.5 gpk Fall test IEC60068-2-32 Edge drop, Corner drop, topple 1 m NOTE: * System airflow will assist the PSU airflow PARAMETER DESCRIPTION / CONDITION MIN NOM MAX UNIT Dimensions Width 69 mm Height 42 mm Depth 555 mm m Weight 2.66 kg Maximum electric strength testing is performed in factory according to IEC / EN 60950 and UL 60950. Input - to - output electric strength tests should not be repeated in the field. Bel Power Solutions will not honour any warranty claims resulting from electric strength field tests.
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Figure 30. Front and rear view Table 7. Input Connector Pinout
14.1 INPUT CONNECTOR PINOUT
NOTE: * These pins should be connected to SGND on the system. See section 7 for pull-up resistor settings of signal pins - All signal pins are referred to SGND. Table 8. Output Connector Pinout
14.2 OUTPUT CONNECTOR PINOUT
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tech.support@psbel.com See also SPSPFF3-01 datasheet BDC.00887 The recommended pin configuration below is based on company’s own Shelf design and provided here as reference. Customer pin lengths within the range indicated is acceptable.
+86 755 298 85888 Europe, Middle East +353 61 225 977 North America +1 408 785 5200 © 2018 Bel Power Solutions & Protection BCD.00886_011 ITEM DESCRIPTION ORDERING PN SOURCE I2C Utility Windows Vista/7/8 compatible GUI to program, control and monitor PFE Front-Ends (and other I2C units) N/A belfuse.com/power-solutions REV DESCRIPTION PSU PRODUCT VERSION DATE AUTHOR
008 First release version Jan-2018 RK/MS
011 Product photo updated; Output and Protection table update; Added EEPROM
and PMBUS Protocol chapters; General unification with PFE3000 product Mar-2018 RK/MS NUCLEAR AND MEDICAL APPLICATIONS - Products are not designed or intended for use as critical components in life support systems, equipment used in hazardous environments, or nuclear control systems. TECHNICAL REVISIONS - The appearance of products, including safety agency certifications pictured on labels, may change depending on the date manufactured. Specifications are subject to change without notice. DOCUMENT NUMBER DESCRIPTION BCA.00447 PFF3000-12-069RD Installation Instruction BCA.00216 PFF3000-12-069RD PMBus® Communication Manual BCD.00887 Power Shelf SPSPFF3-01G datasheet BCD.00820 NAC2006-01 datasheet