PFE3600-12-069RA

PFE3600-12-069RA BEL | Alldatasheet

Document overview

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Technical content

PFE3600-12-069RA is a 36 00 Watt AC/DC power -factor-corrected (PFC) and DC -DC power supply that converts standard AC mains power or high voltage DC bus voltages into a main output of 12 VDC for powering intermediate bus architectures (IBA) in high performance and reliability servers, routers, and network switches. The PFE3600-12-069RA meets international safety standards and displays the CE-Mark for the European Low Voltage Directive (LVD). Key Features & Benefits

• Best-in-class, Platinum efficiency
• Wide input voltage range: 90 – 300 VAC
• AC input with power factor correction
• DC input voltage range: 192 – 400 VDC
• Hot-plug capable
• Parallel operation with active current sharing thru analog bus
• Full digital controls for improved performance
• High density design: 30.5 W/in3
• Small form factor: 69 x 42 x 555 mm
• I2C communication interface with PMBus® protocol for monitoring, control, and firmware update via bootloader
• Overtemperature, output overvoltage and overcurrent protection
• RoHS Compliant
• 2 Status LEDs: AC OK and DC OK with fault signaling
• US Patent Pending

Applications

• High Performance Servers
• Routers
• Switches Disclaimer: PMBus is a registered trademark of SMIF, Inc.

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1 Front to Rear

supply is fan cooled and ideally suited for server integration with a matching airflow path. unity power factor over a wide operating range. on the output ensures no reverse load current and renders the supply ideally suited for operation in redundant power systems. an active OR-ing device provides for maximum reliability. power demand and supply temperature and can be overridden through the I2C bus. Figure 1. PFE3600-12-0069RA Block Diagram

+86 755 298 85888 Europe, Middle East +353 61 225 977 North America +1 408 785 5200 © 2018 Bel Power Solutions & Protection BCD.00923_003 Stresses in excess of the absolute maximum ratings may cause performance degradation, adversely affect long-term reliability, and cause permanent damage to the supply. PARAMETER CONDITIONS / DESCRIPTION MIN MAX UNITS Vi maxc Maximum Input Continuous 300 VAC General Condition: TA = 0… 45 °C unless otherwise noted. PARAMETER DESCRIPTION / CONDITION MIN NOM MAX UNIT Vi nom AC Nominal Input Voltage 100 230 277 VAC Vi AC Input Voltage Ranges Normal operating (Vi min to Vi max) 90 300 VAC Vinom DC DC Nominal input voltage 240 380 VDC Vi DC DC Input voltage ranges Normal operating (Vi min to Vi max) 192 400 VDC Vi red Derated Input Voltage Range See Figure 20 and Figure 33 90 180 VAC Ii max Max Input Current Vi > 200 VAC, >100 VAC 20.5 Arms Ii p Inrush Current Limitation Vi min to Vi max, 0 ° TNTC = 25°C ( Figure 5) 50 Ap Fi Input Frequency 47 50/60 63 Hz PF Power Factor Vi nom, 50Hz, > 0.3 I1 nom 0.96 W/VA Vi on Turn-on Input Voltage2 Ramping up 85 88.5 90 VAC Vi off Turn-off Input Voltage2 Ramping down 80 85 85 VAC η Efficiency without Fan Vi nom, 0.1∙Ix nom, Vx nom, TA = 25°C 90.0 91.85 Vi nom, 0.2∙Ix nom, Vx nom, TA = 25°C 93.0 94.40 Vi nom, 0.5∙Ix nom, Vx nom, TA = 25°C 94.5 94.95 Vi nom, Ix nom, Vx nom, TA = 25°C 92.0 93.0 Thold Hold-up Time After last AC zero point, V1 > 10.8 V, VSB within regulation, Vi = 230 VAC, Px nom 10 ms 2 The Front-End is provided with a minimum hysteresis of 3 V during turn-on and turn-off within the ranges

4.1 INPUT FUSE

Quick-acting 30 A input fuses (6.3 × 32 mm) in series with both the L- and N-line inside the power supply protect against severe defects. The fuses are not accessible from the outside and are therefore not serviceable parts.

4.2 INRUSH CURRENT

The AC-DC power supply exhibits an X capacitance of only 4.3 μF, resulting in a low and short peak current, when the supply is connected to the mains. The internal bulk capacitor will be charged through an NTC which will limit the inrush current. NOTE: Do not repeat plug -in / out operations below 90 sec interval time at maximum input, high temperature condition, or else the internal in-rush current limiting device (NTC) may not sufficiently cool down and excessive inrush current or component failure(s) may result.

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4.3 INPUT UNDER-VOLTAGE

be inhibited. Once the input voltage returns within the normal operating range, the supply will return to normal operation again.

4.4 POWER FACTOR CORRECTION

4.5 EFFICIENCY

supplied from a high voltage DC source. Figure 2. AC Input Efficiency vs. Load Current Figure 3. DC Input Efficiency vs. Load Current Figure 4. Power Factor vs. Load Current Figure 5. Inrush Current, Vin = 230 VAC, 0°phase angle

+86 755 298 85888 Europe, Middle East +353 61 225 977 North America +1 408 785 5200 © 2018 Bel Power Solutions & Protection BCD.00923_003 PARAMETER DESCRIPTION / CONDITION MIN NOM MAX UNIT Main Output V1 V1 nom Nominal Output Voltage 0.5 ∙I1 nom, Tamb = 25 °C

12.3 VDC

V1 set Output Setpoint Accuracy -0.5 +0.5 % V1 nom dV1 tot Total Regulation Vi min to Vi max, 0 to 100% I1 nom, Ta min to Ta max -1 +1 % V1 nom P1 nom Nominal Output Power V1 = 12.3 VDC, Vin < 180 VAC 1400 W I1 nom Nominal Output Current V1 = 12.3 VDC, Vin < 180 VAC 114 ADC P1 nom Nominal Output Power V1 = 12.3 VDC, Vin > 180 VAC 3600 W I1 nom Nominal Output Current V1 = 12.3 VDC, Vin > 180 VAC 293 ADC IV1 ol Short time over load current V1 = 12.3 VDC, Vin > 180 VAC Ta min to Ta max, maximum duration 20 ms (See Section 5.2) 350 A v1 pp Output Ripple Voltage V1 nom, I1 nom, 20 MHz BW (See Section 5.1) 160 mVpp dV1 Load Load Regulation Vi = Vi nom, 0 - 100 % I1 nom 170 mV dV1 Line Line Regulation Vi =Vi min…Vi max 0 mV IV1 ol lim Current limitation Vi < 180 VAC, Ta < 45°C Vi < 180 VAC, Ta = 55 °C 3 Vi > 180 VAC, Ta < 45°C Vi > 180 VAC, Ta = 55 °C 3 120 298 223 127 329 254 ADC dIshare Current Sharing Deviation from I1 tot / N, I1 > 30% I1 nom -5% +5% A dVdyn Dynamic Load Regulation ΔI1 = 50% I1 nom, I1 = 5 … 100% I1 nom, dI1/dt = 1A/μs, f ΔI1 = 0.05...10 kHz, Duty ΔI1 = 10...90%, recovery within 1% of V1 final steady state -0.6 +0.6 V Trec Recovery Time 0.5 ms tAC V1 Start-up Time from AC V1 = 10.8 VDC (see Figure 7) 3 sec tV1 rise Rise Time V1 = 10…90% V1 nom (see Figure 8) 2.5 ms CLoad Capacitive Loading Ta = 25°C 30000 μF

3 See Figure 20 for linear derating > 45°C

VSB nom Nominal Output Voltage ISB nom, Tamb = 25°C

12 VDC

VSB set Output Setpoint Accuracy -0.5 +0.5 %VSBnom dVSB tot Total Regulation Vi min to Vi max, ISB nom, Ta min to Ta max -1 +1 %VSBnom PSB nom Nominal Output Power VSB = 12 VDC 60 W ISB nom Nominal Output Current VSB = 12 VDC 5 ADC VSB pp Output Ripple Voltage VSB nom, ISB nom, 20 MHz BW (See Section 5.1) 300 mVpp dVSB Droop 0 - 100 % ISB nom 400 mV IVSB lim Current Limitation 6 9 ADC dVSBdyn Dynamic Load Regulation ΔISB = 50% ISB nom, ISB = 5 … 100% ISB nom, dIo/dt = 1A/μs, f ΔI1 = 0.05...10kHz, Duty ΔI1 = 10...90%, recovery within 1% of VSB final steady state -0.6 +0.6 VSBnom Trec Recovery Time 0.5 ms tAC VSB Start-up Time from AC VSB = 90% VSB nom (see Figure 7) 3 sec tVSB rise Rise Time VSB = 10…90% VSB nom (see Figure 9)) 10 ms CLoad Capacitive Loading Tamb = 25°C 3000 μF General Condition: TA = 0…45 °C unless otherwise noted.

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tech.support@psbel.com

5.1 OUTPUT VOLTAGE RIPPLE

The internal output capaci tance at the power supply output (behind OR -ing element) is minimized to prevent disturbances during hot plug. In order to provide low output ripple voltage in the application, external capacitors should be added close to the power supply output. The setup of Figure 6 has been used to evaluate suitable capacitor types. The capacitor combinations of Table 1 and Table 2 should be used to reduce the output ripple voltage. The ripple voltage is measured with 20 MHz BWL, close to the external capacitors. PSU Load Vout Gnd L N Probe Scope 20MHz BW C Figure 6 - Output Ripple Test Setup NOTE: Care must be taken when using ceramic capacitors with a total capacitance of 1 µF to 50 µF on output V1, due to their high quality factor the output ripple voltage may be increased in certain frequency ranges due to resonance effects. External Capacitor V1 dV1max Unit 2Pcs 47µF/16V/X5R/1210 160 mVpp 1Pcs 1000µF/16V/Low ESR Aluminum/ø10x20 160 mVpp 1Pcs 270µF/16V/Conductive Polymer/ø8x12 160 mVpp 2Pcs 47µF/16V/X5R/1210 plus 1Pcs 270µF Conductive Polymer OR 1Pcs 1000µF Low ESR AlCap 90 mVpp External capacitor VSB dVSBmax Unit 1Pcs 10µF/16 V/X7R/1206 300 mVpp Table 1 - Suitable Capacitors for V1 Table 2 - Suitable Capacitors for VSB The output ripple voltage on VSB is influenced by the main output V1. Evaluating VSB output ripple must be done when maximum load is applied to V1.

5.2 SHORT TIME OVERLOAD

The main output h as the capability to allow load current up to 20% above the nominal output current rating for a maximum duration of 20 ms. This allows the system to consume extended power for short time dynamic processes.

5.3 OUTPUT ISOLATION

Main and standby output and al l signals are isolated from the chassis and protective earth connection, although the applied voltage must not exceed 100 Vpeak to prevent any damage of the supply. Internal to the supply the main output ground, standby output ground and signal ground are interconnected through 10 Ω resistors to prevent any circulating current within the supply. In order to prevent any potential difference in outputs or si gnals within the application these 3 grounds must be directly interconnected at system level. See also s ection 14 for pins to be interconnected.

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Figure 13. AC drop out 40 ms, full load (20 ms/div) Figure 14. AC drop out 40 ms, full load (200 ms/div),V1 restart Figure 15. Load transient V1, 3 to 125 A (500 μs/div) Figure 16. Load transient V1, 125 to 3 A (500 μs/div) Figure 17. Load transient V1, 122 to 244 A (500 μs/div) Figure 18. Load transient V1, 244 to 122 A (500 μs/div)

+86 755 298 85888 Europe, Middle East +353 61 225 977 North America +1 408 785 5200 © 2018 Bel Power Solutions & Protection BCD.00923_003 PARAMETER DESCRIPTION / CONDITION MIN NOM MAX UNIT F Input Fuses (L+N) Not user accessible, quick-acting (F) 30 A V1 OV OV Threshold V1 13.6 14.2 14.8 VDC tOV V1 OV Latch Off Time V1 1 ms VSB OV OV Threshold VSB 13.3 13.9 14.5 VDC tOV VSB OV Latch Off Time VSB 1 ms IV1 lim Current limitation Vi < 180 VAC, Ta < 45°C Vi < 180 VAC, Ta = 55 °C 4 Vi > 180 VAC, Ta < 45°C Vi > 180 VAC, Ta = 55 °C 4 120 92 127

99 A 298

tV1 lim Current limit blanking time Time to latch off when in over current 20 22 24 ms IV1 ol lim Current limit during short time overload V1 Maximum duration 20 ms 328 336 344 A IV1 SC Max Short Circuit Current V1 V1 < 3 V 420 5 A tV1 SC off Short circuit latch off time Time to latch off when in short circuit 10 ms IVSB lim Current limitation VSB 6 9 A tVSB lim Current limit blanking time Time to hit hiccup when in over current 1 ms TSD Over temperature on critical points Inlet Ambient Temperature PFC Primary Heatsink Temperature Secondary Sync Mosfet Temperature Secondary OR-ing Mosfet Temperature 120 125

4 See Figure 20 for linear derating > 45°

5 Limit set don’t include effects of main output capacitive discharge.

6.1 AUTOMATIC RETRY

For all fault conditions except current limitat ion on Standby output, the supply will shut down for 10 sec and restart automatically. The supply will auto-restart from a fault up to 5 times, after that it will latch off. The latch and restart counter can be cleared by recycling the input voltage or t he PSON_L input. A failure on the Standby output will shut down both Main and Standby outputs. A failure on the Main output will shut down only the Main output, while Standby continues to operate.

6.2 OVERVOLTAGE PROTECTION

The PFE front -ends provide a f ixed threshold overvoltage (OV) protection implemented with a HW comparator. Once an OV condition has been triggered, the supply will shut down and latch the fault condition.

6.3 UNDERVOLTAGE DETECTION

Both main and standby outputs are monitored. LED and P WOK_L pin signal if the output voltage exceeds ±7% of its nominal voltage. Output undervoltage protection is provided on both outputs. When either V1 or VSB falls below 93% of its nominal voltage, the output is inhibited.

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6.4 CURRENT LIMITATION

Two different over current protection features are implemented on the main output. A static over current protection will shut down the output, if the output current does exceed IV1 lim for more than 20 ms. If the output current is increased slowly this protection will shut down the supply. Figure 20 (see also Section 9 for additional information). and reaches IV1 ol lim, the supply will immediately reduce its output voltage to prevent the output current from exceeding IV1 ol lim. When the output current is reduced below IV1 ol lim, the output voltage will return to its nominal value. Figure 19. Current Limitation on V1 (Vi = 230VAC) Figure 20. Derating on V1 vs. Ta output will repeatedly trying to restart with 1s intervals. Figure 21. Current Limitation on VSB

+86 755 298 85888 Europe, Middle East +353 61 225 977 North America +1 408 785 5200 © 2018 Bel Power Solutions & Protection BCD.00923_003 PARAMETER DESCRIPTION / CONDITION MIN NOM MAX UNIT Vi mon Input RMS Voltage Vi min ≤ Vi ≤ Vi max -2.5 +2.5 % Ii mon Input RMS Current Ii > 4 Arms -5 +5 % Ii ≤ 4 Arms -0.2 +0.2 Arms Pi mon True Input Power Pi > 800 W -5 +5 % Pi ≤ 800 W -35 +35 W Ei mon Total Input Energy Pi > 800 W -5 +5 % Pi ≤ 800 W -35 +35 Wh V1 mon V1 Voltage -2 +2 % I1 mon V1 Current I1 > 30 A -2 +2 % I1 ≤ 30 A -0.6 +0.6 A Po nom Total Output Power Po > 250 W -5 +5 % Po ≤ 250 W -10 +10 W Eo mon Total Output Energy Po > 250 W -5 +5 % Po ≤ 250 W -10 +10 Wh VSB mon Standby Voltage -2 +2 % ISB mon Standby Current ISB ≤ ISB nom -0.3 +0.3 A

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tech.support@psbel.com PARAMETER DESCRIPTION / CONDITION MIN NOM MAX UNIT PSKILL / PSON_L inputs VIL Input low level voltage -0.2 0.8 V VIH Input high level voltage 2.0 3.6 V IIL, H Maximum input sink or source current 0 1 mA RpuPSKILL Internal pull up resistor on PSKILL 10 kΩ RpuPSON_L Internal pull up resistor on PSON_L 10 kΩ PWOK_L output VOL Output low level voltage Isink < 4 mA -0.2 0.4 V VpuPWOK_L External pull up voltage 12 V RpuPWOK_L Recommended external pull up resistor on PWOK_L at VpuPWOK_L = 3.3 V 10 kΩ Low level output All outputs are turned on and within regulation High level output In standby mode or V1/VSB have triggered a fault condition INOK_L output VOL Output low level voltage Isink < 4 mA -0.2 0.4 V VpuINOK_L External pull up voltage 12 V RpuINOK_L Recommended external pull up resistor on INOK_L at VpuINOK_L= 3.3 V 10 kΩ Low level output Input voltage is within range for PSU to operate High level output Input voltage is not within range for PSU to operate SMB_ALERT_L output VOL Output low level voltage Isink < 4 mA -0.2 0.4 V VpuSMB_ALERT_L External pull up voltage 12 V RpuSMB_ALERT_L Recommended external pull up resistor on SMB_ALERT_L at VpuSMB_ALERT_L= 3.3 V 10 kΩ Low level output PSU in warning or failure condition High level output PSU is ok

8.1 ELECTRICAL CHARACTERISTICS

8.2 INTERFACING WITH SIGNALS

A 15 V zener diode is added on all signal pins versus signal ground SGND to protect internal circuits from negative and high positive voltage. Signal pins of several supplies running in parallel can be interconnected directly. A supply having no input power will not affect the signals of the paralleled supplies. ISHARE pins must be interconnected without any additional components. Thi s in-/output also has a 15 V zener diode as a protection device and is disconnected from internal circuits when the power supply is switched off.

8.3 FRONT LEDs

of the LEDs see Table 3 listing the different LED status.

• The order of the criteria in the table corresponds to the testing precedence in the controller.

Table 3. LED Status

8.4 PRESENT_L

sink current on PRESENT_L pin should not exceed 10 mA. Figure 22. PRESENT_L signal pin

8.5 PSKILL INPUT

standby output will remain on regardless of the PSKILL input state.

8.6 AC TURN-ON / DROP-OUTS / INOK_L

active-low. The timing diagram is shown in Figure 23 and referenced in Table 4.

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Table 4. AC Turn-on / Dip Timing Figure 23. AC turn-on timing Figure 24. AC short dips Figure 25. AC long dips

8.7 PSON_L INPUT

The PSON_L is an internally pulled -up (3.3 V) input signal to enable / disable the main output V1 of the front -end. Table 5. PSON_L timing

8.8 PWOK_L SIGNAL

and V1 outputs are within regulation. This pin is active-low. The timing diagram is shown in Figure 26 and referenced in Table 6.

Table 7. Power available when PSU in redundant operation Figure 26. PSON_L turn-on/off timing Table 6. PWOK_L timing

8.9 CURRENT SHARE

its ISHARE pin from the share bus. This will prevent dragging the output down (or up) in such cases. The standby output uses a passive current share method (droop output voltage characteristic).

8.10 SENSE INPUTS

is 200 mV on the positive rail and 100 mV on the PGND rail. this case the power supply will shut down.

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Table 8. I2C / SMBus Specification

8.11 I2C / PMBus® COMMUNICATION

• There are 100 kΩ internal pull-up resistors
• The SDA/SCL IOs must be pull-up externally to 3.3 ± 0.3 V
• Pull-up resistor should be 2 – 5 kΩ to ensure SMBUS compliant signal rise times
• I2C clock speed up to 100 kbps
• Clock stretching limited to 1 ms
• SCL low time-out of >25 ms with recovery within 10 ms
• Recognizes any time Start/Stop bus conditions 3.3V Rpull-upTX RX SDA/SCL 3.3V 100kΩ PFE

Figure 27. Physical layer of communication interface investigate. This is a logical OR of the Shutdown and Warning events. unit). If only V1 is provided, communication is not possible.

Figure 28. I2C / SMBus Timing

8.12 ADDRESS

8.13 CONTROLLER AND EEPROM ACCESS

the EEPROM, the write protection needs to be disabled by setting EEPROM_WP input correctly. user memory. None of the bytes are used for the operation of the power supply. Figure 29. I2C Bus to DSP and EEPROM

8.14 EEPROM PROTOCOL

commands are defined, it is recommended to use the single byte write / read commands. should only occur after 5ms of the last STOP condition to allow the EEPROM to write the data into its memory. data byte at the specified location.

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8.15 PMBus® PROTOCOL

The Power Management Bus (PMBus®) is an open standard protocol that defines means of communicating with power conversion and other devices. For more information, please see the System Management Interface Forum web site at: www.powerSIG.org. PMBus® command codes are not register addresses. They describe a specific command to be executed. PFE3600-12-069RA supply supports the following basic command structures:

• Clock stretching limited to 1 ms
• SCL low time-out of >25 ms with recovery within 10 ms
• Recognized any time Start/Stop bus conditions WRITE The write protocol is the SMBus 1.1 Write Byte/Word protocol. Note that the write protocol may end after the command byte or after the first data byte (Byte command) or then after sending 2 data bytes (Word command). In addition, Block write commands are supported with a total maximum length of 255 bytes. See PFE3000-12-069RA PMBus® Communication Manual BCA.00070 for further information. READ The read protocol is the SMBus 1.1 Read Byte/Word protocol. Note that the read protocol may request a single byte or word. In addition, Block read commands are supported with a total maximum length of 255 bytes. See PFE3000-12-069RA PMBus® Communication Manual BCA.00070 for further information. S Address W A Command A Data Low Byte1) A Data High Byte1) A P 1) Optional S Address W A Command A Byte 1 A Byte N A P Byte Count A S Address W A Command A Data (Low) Byte AS Address R A Data High Byte1) nA P 1) Optional S Address W A Command A Byte 1 A S Address R A Byte N nA PByte Count A

8.16 GRAPHICAL USER INTERFACE

belfuse.com/power-solutions and supports the PMBus® protocol. tree. In the monitoring view the power supply can be controlled and monitored. Figure 30. Monitoring dialog of the I2C Utility designed for horizontal operation. and is a function of output power and the inlet temperature. Figure 31. Airflow Direction

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Figure 32. Fan speed vs. main output load for Figure 33. Thermal derating for PFE3600-12-069RA

10.1 IMMUNITY

NOTE: Most of the immunity requirements are derived from EN 55024:1998/A2:2003.

10.2 EMISSION

+86 755 298 85888 Europe, Middle East +353 61 225 977 North America +1 408 785 5200 © 2018 Bel Power Solutions & Protection BCD.00923_003 PARAMETER DESCRIPTION / CONDITION MIN NOM MAX UNIT Agency Approvals Approved to the latest edition of the following standards:

• IEC60950-1 2nd edition (CB)  pending
• EN60950-1 2nd Edition (Nemko)  pending
• UL/CSA0950-1 2nd Edition (cCSAus)  pending
• BSMI  pending
• EAC, TR-CU (Russia)  pending
• BIS, (India)  pending Isolation Strength Input (L/N) to case (PE) Input (L/N) to output Output to case (PE) Basic Reinforced Functional dC Creepage / Clearance Primary (L/N) to protective earth (PE) Primary to secondary Electrical Strength Test Input to case Input to output (tested by manufacturer only) 2121

4242 VDC

PARAMETER DESCRIPTION / CONDITION MIN NOM MAX UNIT TA Ambient Temperature Vi min to Vi max, I1 nom, ISB nom at 4000 m 0 +35 °C Vi min to Vi max, I1 nom, ISB nom at 1800 m 0 +45 °C TAext Extended Temp. Range Derated output (see Figure 20 and Figure 33) at 1800 m +45 +55 °C TS Storage Temperature Non-operational -40 +70 °C Altitude Operational, above Sea Level (see derating) - 4000 m Na Audible Noise Vi nom, 50% Io nom, TA = 25°C 60 dBA Cooling System Back Pressure 0.5 in-H20 PARAMETER DESCRIPTION / CONDITION MIN NOM MAX UNIT Dimensions Width 69 mm Heigth 42 mm Depth 555 mm m Weight 2.60 kg NOTE: A 3D step file of the power supply casing is available on request. Maximum electric strength testing is performed in the factory according to IEC/EN 60950, and UL 60950. Input-to-output electric strength tests should not be repeated in the field. Bel Power Solutions will not honor any warranty claims resulting from electric strength field tests.

22 PFE3600-12-069RA

Figure 34. Bottom view Figure 35. Side view Figure 36. Top view Figure 37. Front and Rear view

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• These pins should be connected to PGND on the system. See Section 8 for pull up resistor settings of signal pins.

Table 9. Pin assignment

+86 755 298 85888 Europe, Middle East +353 61 225 977 North America +1 408 785 5200 © 2018 Bel Power Solutions & Protection BCD.00923_003 The recommended pin configuration below is based on company’s own Shelf design and provided here as reference. Customer pin lengths within the range indicated is acceptable.

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Disclaimer: PMBus is a registered trademark of SMIF, Inc. Figure 28. I2C / SMBus Timing updated equipment used in hazardous environments, or nuclear control systems. the date manufactured. Specifications are subject to change without notice.