PF1005UDF12 KEC | Alldatasheet
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Technical content
- 6. 4 1/2 SEMICONDUCTOR TECHNICAL DATA PF1005UDF12 ESD/EMI Filter Revision No : 2 UDFN-12 MILLIMETERSDIM 2.50 1.80 0.10+_ LK J F 1.20 0.40 0.125 0.03+0.02/-0.03
0.20 Min
0.50 0.05+_ 0.30 0.10+_ 0.20 0.05+_ 0.25 0.05+_ TOP VIEW SIDE VIEW BOTTOM VIEW A B C H G K L J D E F A B C GH D 12 7 E Pin 1 1,12 : Filter channel 1 2,11 : Filter channel 2 3,10 : Filter channel 3 4,9 : Filter channel 4 5,8 : Filter channel 5 6,7 : Filter channel 6 GND PAD EQUIVALENT CIRCUIT CHARACTERISTIC SYMBOL RATING UNIT DC Power Per Resistor PR 100 mW Power Dissipation *PD 600 Junction Temperature Tj 150 Storage Temperature Tstg -55¡150 * Total Package Power Dissipation Type Name Lot No. MARKING ELECTRICAL CHARACTERISTICS (Ta=25¡É) 5pF 5pF 100ΩFILTERn* FILTERn* GND CHARACTERISTIC SYMBOL TEST CONDITION MIN. TYP. MAX. UNIT Reverse Stand-Off Voltage VRWM - - - 5 V Reverse Breakdown Voltage VBR It=1mA 6 - - V Reverse Leakage Current IR VRWM=3.3V - - 1.0 ¥ìA Cutoff Frequency fc-3dB VLine=0V, ZSOURCE=50§Ù, ZLOAD=50§Ù - 300 - MHz Channel Resistance RLINE Between Input and Output 80 100 120 §Ù Line Capacitance CLINE VLine=0V DC, 1MHz, Between I/O Pins and GND 12 15 18 pFVLine=2.5V, 1MHz, Between I/O Pins and GND 8 10 12 APPLICATION ¡¤I/O ESD protection for mobile handsets, notebook, PDAs, etc. ¡¤EMI filtering for data ports in cell phones, PDAs, notebook computers ¡¤EMI filtering for LCD, camera and chip-to-chip data lines
FEATURES
¡¤EMI/RFI filtering ¡¤ESD Protection to IEC 61000-4-2 Level 4 ¡¤Low insertion loss ¡¤Good attenuation of high frequency signals ¡¤Low clamping voltage ¡¤Low operating and leakage current ¡¤Six elements in one package
DESCRIPTION
PF1005UDF12 is an EMI filter array with electrostatic discharge (ESD) protection, which integrates six pi filters (C-R-C). These parts include ESD protection diodes on every pin, providing a very high level of protection for sensitive electronic components that may be subjected to electrostatic discharge. The PF1005UDF12 provides the recommended line termination while implementing a low pass filter to limit EMI levels and providing ESD protection which exceeds IEC 61000-4-2 level 4 standard. The UDFN package is a very effective PCB space occupation and a very thin package (0.4mm Pitch, 0.5mm height) MAXIMUM RATING (Ta=25¡É) RECOMMENEDED FOOTPRINT (dimensions in mm) 1.95 0.45 0.30 1.50
0.40 PITCH
0.40
- 6. 4 2/2 PF1005UDF12 Revision No : 2 DIODE VOLTAGE (V) 0.5 1.5 2.0 0.0 012345 1.0 NORMALIZED CAPACITANCE DIODE CAPACITANCE vs. INPUT VOLTAGE 100 102 104 106 108 110 -40 -20 0 2 04 06 08 0 RESISTANCE R (Ω) RLine - TEMPERATURE AMBIENT TEMPERATURE Ta ( )C ANALOG CROSSTALK CROSSTALK (dB) -150 -120 1 10 100 1000 6000 FREQUENCY (MHz) -90 -60 -30 S21 - FREQUENCY FREQUENCY (MHz) -20 -40 11 0 100 1000 6000 -30 -10 INSERTION LOSS (dB)